libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
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Macros | |
#define | SCB_CCR_STKALIGN (1 << 9) |
STKALIGN set to zero to break things :) More... | |
#define | SCB_CCR_BFHFNMIGN (1 << 8) |
BFHFNMIGN set to attempt ignoring faults in handlers. More... | |
#define | SCB_CCR_DIV_0_TRP (1 << 4) |
DIV_0_TRP set to trap on divide by zero. More... | |
#define | SCB_CCR_UNALIGN_TRP (1 << 3) |
UNALIGN_TRP set to trap on unaligned. More... | |
#define | SCB_CCR_USERSETMPEND (1 << 1) |
USERSETMPEND set to allow unprivileged access to STIR. More... | |
#define | SCB_CCR_NONBASETHRDENA (1 << 0) |
NONBASETHRDENA set to allow non base priority threads. More... | |
#define | SCB_CCR_BP (1 << 18) |
BP set to enable branch predictor. More... | |
#define | SCB_CCR_IC (1 << 17) |
IC set to enable instruction cache. More... | |
#define | SCB_CCR_DC (1 << 16) |
DC set to enable data cache. More... | |
#define SCB_CCR_BFHFNMIGN (1 << 8) |
#define SCB_CCR_BP (1 << 18) |
#define SCB_CCR_DIV_0_TRP (1 << 4) |
#define SCB_CCR_IC (1 << 17) |
#define SCB_CCR_NONBASETHRDENA (1 << 0) |
#define SCB_CCR_STKALIGN (1 << 9) |
#define SCB_CCR_UNALIGN_TRP (1 << 3) |