libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
RTC initialization and status register (RTC_ISR) values

Note: Bits [31:17] and [15] are reserved, and must be kept at reset value. More...

Collaboration diagram for RTC initialization and status register (RTC_ISR) values:

Macros

#define RTC_ISR_RECALPF   (1<<16)
 RECALPF: Recalib pending flag. More...
 
#define RTC_ISR_TAMP3F   (1<<15)
 TAMP3F: TAMPER3 detection flag (not on F4) More...
 
#define RTC_ISR_TAMP2F   (1<<14)
 TAMP2F: TAMPER2 detection flag. More...
 
#define RTC_ISR_TAMP1F   (1<<13)
 TAMP1F: TAMPER detection flag. More...
 
#define RTC_ISR_TSOVF   (1<<12)
 TSOVF: Timestamp overflow flag. More...
 
#define RTC_ISR_TSF   (1<<11)
 TSF: Timestamp flag. More...
 
#define RTC_ISR_WUTF   (1<<10)
 WUTF: Wakeup timer flag. More...
 
#define RTC_ISR_ALRBF   (1<<9)
 ALRBF: Alarm B flag. More...
 
#define RTC_ISR_ALRAF   (1<<8)
 ALRAF: Alarm A flag. More...
 
#define RTC_ISR_INIT   (1<<7)
 INIT: Initialization mode. More...
 
#define RTC_ISR_INITF   (1<<6)
 INITF: Initialization flag. More...
 
#define RTC_ISR_RSF   (1<<5)
 RSF: Registers sync flag. More...
 
#define RTC_ISR_INITS   (1<<4)
 INITS: Init status flag. More...
 
#define RTC_ISR_SHPF   (1<<3)
 SHPF: Shift operation pending. More...
 
#define RTC_ISR_WUTWF   (1<<2)
 WUTWF: Wakeup timer write flag. More...
 
#define RTC_ISR_ALRBWF   (1<<1)
 ALRBWF: Alarm B write flag. More...
 
#define RTC_ISR_ALRAWF   (1<<0)
 ALRAWF: Alarm A write flag. More...
 

Detailed Description

Note: Bits [31:17] and [15] are reserved, and must be kept at reset value.

Note: This register is write protected (except for RTC_ISR[13:8] bits).

Macro Definition Documentation

◆ RTC_ISR_ALRAF

#define RTC_ISR_ALRAF   (1<<8)

ALRAF: Alarm A flag.

Definition at line 266 of file rtc_common_l1f024.h.

◆ RTC_ISR_ALRAWF

#define RTC_ISR_ALRAWF   (1<<0)

ALRAWF: Alarm A write flag.

Definition at line 282 of file rtc_common_l1f024.h.

◆ RTC_ISR_ALRBF

#define RTC_ISR_ALRBF   (1<<9)

ALRBF: Alarm B flag.

Definition at line 264 of file rtc_common_l1f024.h.

◆ RTC_ISR_ALRBWF

#define RTC_ISR_ALRBWF   (1<<1)

ALRBWF: Alarm B write flag.

Definition at line 280 of file rtc_common_l1f024.h.

◆ RTC_ISR_INIT

#define RTC_ISR_INIT   (1<<7)

INIT: Initialization mode.

Definition at line 268 of file rtc_common_l1f024.h.

◆ RTC_ISR_INITF

#define RTC_ISR_INITF   (1<<6)

INITF: Initialization flag.

Definition at line 270 of file rtc_common_l1f024.h.

◆ RTC_ISR_INITS

#define RTC_ISR_INITS   (1<<4)

INITS: Init status flag.

Definition at line 274 of file rtc_common_l1f024.h.

◆ RTC_ISR_RECALPF

#define RTC_ISR_RECALPF   (1<<16)

RECALPF: Recalib pending flag.

Definition at line 250 of file rtc_common_l1f024.h.

◆ RTC_ISR_RSF

#define RTC_ISR_RSF   (1<<5)

RSF: Registers sync flag.

Definition at line 272 of file rtc_common_l1f024.h.

◆ RTC_ISR_SHPF

#define RTC_ISR_SHPF   (1<<3)

SHPF: Shift operation pending.

Definition at line 276 of file rtc_common_l1f024.h.

◆ RTC_ISR_TAMP1F

#define RTC_ISR_TAMP1F   (1<<13)

TAMP1F: TAMPER detection flag.

Definition at line 256 of file rtc_common_l1f024.h.

◆ RTC_ISR_TAMP2F

#define RTC_ISR_TAMP2F   (1<<14)

TAMP2F: TAMPER2 detection flag.

Definition at line 254 of file rtc_common_l1f024.h.

◆ RTC_ISR_TAMP3F

#define RTC_ISR_TAMP3F   (1<<15)

TAMP3F: TAMPER3 detection flag (not on F4)

Definition at line 252 of file rtc_common_l1f024.h.

◆ RTC_ISR_TSF

#define RTC_ISR_TSF   (1<<11)

TSF: Timestamp flag.

Definition at line 260 of file rtc_common_l1f024.h.

◆ RTC_ISR_TSOVF

#define RTC_ISR_TSOVF   (1<<12)

TSOVF: Timestamp overflow flag.

Definition at line 258 of file rtc_common_l1f024.h.

◆ RTC_ISR_WUTF

#define RTC_ISR_WUTF   (1<<10)

WUTF: Wakeup timer flag.

Definition at line 262 of file rtc_common_l1f024.h.

◆ RTC_ISR_WUTWF

#define RTC_ISR_WUTWF   (1<<2)

WUTWF: Wakeup timer write flag.

Definition at line 278 of file rtc_common_l1f024.h.