#include <libopencm3/cm3/memorymap.h>

Include dependency graph for efm32/ezr32wg/memorymap.h:

Macros
#define	PERIPH_BASE (0x40000000U)

#define	DI_BASE (0x0FE08000U)

#define	DI_CMU_LFRCOCTRL MMIO32(DI_BASE + 0x020)

#define	DI_CMU_HFRCOCTRL MMIO32(DI_BASE + 0x028)

#define	DI_CMU_AUXHFRCOCTRL MMIO32(DI_BASE + 0x030)

#define	DI_ADC0_CAL MMIO32(DI_BASE + 0x040)

#define	DI_ADC0_BIASPROG MMIO32(DI_BASE + 0x048)

#define	DI_DAC0_CAL MMIO32(DI_BASE + 0x050)

#define	DI_DAC0_BIASPROG MMIO32(DI_BASE + 0x058)

#define	DI_ACMP0_CTRL MMIO32(DI_BASE + 0x060)

#define	DI_ACMP1_CTRL MMIO32(DI_BASE + 0x068)

#define	DI_CMU_LCDCTRL MMIO32(DI_BASE + 0x078)

#define	DI_DAC0_OPACTRL MMIO32(DI_BASE + 0x0A0)

#define	DI_DAC0_OPAOFFSET MMIO32(DI_BASE + 0x0A8)

#define	DI_EMU_BUINACT MMIO32(DI_BASE + 0x0B0)

#define	DI_EMU_BUACT MMIO32(DI_BASE + 0x0B8)

#define	DI_EMU_BUBODBUVINCAL MMIO32(DI_BASE + 0x0C0)

#define	DI_EMU_BUBODUNREGCAL MMIO32(DI_BASE + 0x0C8)

#define	DI_MCM_REV_MIN MMIO8(DI_BASE + 0x1AA)

#define	DI_MCM_REV_MAJ MMIO8(DI_BASE + 0x1AB)

#define	DI_RADIO_REV_MIN MMIO8(DI_BASE + 0x1AC)

#define	DI_RADIO_REV_MAJ MMIO8(DI_BASE + 0x1AD)

#define	DI_RADIO_OPN MMIO8(DI_BASE + 0x1AE)

#define	DI_DI_CRC MMIO16(DI_BASE + 0x1B0)

#define	DI_CAL_TEMP_0 MMIO8(DI_BASE + 0x1B2)

#define	DI_ADC0_CAL_1V25 MMIO16(DI_BASE + 0x1B4)

#define	DI_ADC0_CAL_2V5 MMIO16(DI_BASE + 0x1B6)

#define	DI_ADC0_CAL_VDD MMIO16(DI_BASE + 0x1B8)

#define	DI_ADC0_CAL_5VDIFF MMIO16(DI_BASE + 0x1BA)

#define	DI_ADC0_CAL_2XVDD MMIO16(DI_BASE + 0x1BC)

#define	DI_ADC0_TEMP_0_READ_1V25 MMIO16(DI_BASE + 0x1BE)

#define	DI_DAC0_CAL_1V25 MMIO32(DI_BASE + 0x1C8)

#define	DI_DAC0_CAL_2V5 MMIO32(DI_BASE + 0x1CC)

#define	DI_DAC0_CAL_VDD MMIO32(DI_BASE + 0x1D0)

#define	DI_AUXHFRCO_CALIB_BAND_1 MMIO8(DI_BASE + 0x1D4)

#define	DI_AUXHFRCO_CALIB_BAND_7 MMIO8(DI_BASE + 0x1D5)

#define	DI_AUXHFRCO_CALIB_BAND_11 MMIO8(DI_BASE + 0x1D6)

#define	DI_AUXHFRCO_CALIB_BAND_14 MMIO8(DI_BASE + 0x1D7)

#define	DI_AUXHFRCO_CALIB_BAND_21 MMIO8(DI_BASE + 0x1D8)

#define	DI_AUXHFRCO_CALIB_BAND_28 MMIO8(DI_BASE + 0x1D9)

#define	DI_HFRCO_CALIB_BAND_1 MMIO8(DI_BASE + 0x1DC)

#define	DI_HFRCO_CALIB_BAND_7 MMIO8(DI_BASE + 0x1DD)

#define	DI_HFRCO_CALIB_BAND_11 MMIO8(DI_BASE + 0x1DE)

#define	DI_HFRCO_CALIB_BAND_14 MMIO8(DI_BASE + 0x1DF)

#define	DI_HFRCO_CALIB_BAND_21 MMIO8(DI_BASE + 0x1E0)

#define	DI_HFRCO_CALIB_BAND_28 MMIO8(DI_BASE + 0x1E1)

#define	DI_MEM_INFO_PAGE_SIZE MMIO8(DI_BASE + 0x1E7)

#define	DI_RADIO_ID MMIO16(DI_BASE + 0x1EE)

#define	DI_UNIQUE_0 MMIO32(DI_BASE + 0x1F0)

#define	DI_UNIQUE_1 MMIO32(DI_BASE + 0x1F4)

#define	DI_MEM_INFO_FLASH MMIO16(DI_BASE + 0x1F8)

#define	DI_MEM_INFO_RAM MMIO16(DI_BASE + 0x1FA)

#define	DI_PART_NUMBER MMIO16(DI_BASE + 0x1FC)

#define	DI_PART_FAMILY MMIO8(DI_BASE + 0x1FE)

#define	DI_PROD_REV MMIO8(DI_BASE + 0x1FF)

#define	AES_BASE (PERIPH_BASE + 0xE0000)

#define	RMU_BASE (PERIPH_BASE + 0xCA000)

#define	CMU_BASE (PERIPH_BASE + 0xC8000)

#define	EMU_BASE (PERIPH_BASE + 0xC6000)

#define	USB_BASE (PERIPH_BASE + 0xC4000)

#define	DMA_BASE (PERIPH_BASE + 0xC2000)

#define	MSC_BASE (PERIPH_BASE + 0xC0000)

#define	LESENSE_BASE (PERIPH_BASE + 0x8C000)

#define	WDOG_BASE (PERIPH_BASE + 0x88000)

#define	PCNT2_BASE (PERIPH_BASE + 0x86800)

#define	PCNT1_BASE (PERIPH_BASE + 0x86400)

#define	PCNT0_BASE (PERIPH_BASE + 0x86000)

#define	LEUART1_BASE (PERIPH_BASE + 0x84400)

#define	LEUART0_BASE (PERIPH_BASE + 0x84000)

#define	LETIMER0_BASE (PERIPH_BASE + 0x82000)

#define	BURTC_BASE (PERIPH_BASE + 0x81000)

#define	RTC_BASE (PERIPH_BASE + 0x80000)

#define	PRS_BASE (PERIPH_BASE + 0xCC000)

#define	TIMER3_BASE (PERIPH_BASE + 0x10C00)

#define	TIMER2_BASE (PERIPH_BASE + 0x10800)

#define	TIMER1_BASE (PERIPH_BASE + 0x10400)

#define	TIMER0_BASE (PERIPH_BASE + 0x10000)

#define	UART1_BASE (PERIPH_BASE + 0x0E400)

#define	UART0_BASE (PERIPH_BASE + 0x0E000)

#define	USART2_BASE (PERIPH_BASE + 0x0C800)

#define	USART1_BASE (PERIPH_BASE + 0x0C400)

#define	USARTRF0_BASE (PERIPH_BASE + 0x0C000)

#define	I2C1_BASE (PERIPH_BASE + 0x0A400)

#define	I2C0_BASE (PERIPH_BASE + 0x0A000)

#define	GPIO_BASE (PERIPH_BASE + 0x06000)

#define	DAC0_BASE (PERIPH_BASE + 0x04000)

#define	ADC0_BASE (PERIPH_BASE + 0x02000)

#define	ACMP1_BASE (PERIPH_BASE + 0x01400)

#define	ACMP0_BASE (PERIPH_BASE + 0x01000)

#define	VCMP_BASE (PERIPH_BASE + 0x00000)

Macro Definition Documentation

◆ ACMP0_BASE

#define ACMP0_BASE (PERIPH_BASE + 0x01000)

Definition at line 118 of file efm32/ezr32wg/memorymap.h.

◆ ACMP1_BASE

#define ACMP1_BASE (PERIPH_BASE + 0x01400)

Definition at line 117 of file efm32/ezr32wg/memorymap.h.

◆ ADC0_BASE

#define ADC0_BASE (PERIPH_BASE + 0x02000)

Definition at line 116 of file efm32/ezr32wg/memorymap.h.

◆ AES_BASE

#define AES_BASE (PERIPH_BASE + 0xE0000)

Definition at line 85 of file efm32/ezr32wg/memorymap.h.

◆ BURTC_BASE

#define BURTC_BASE (PERIPH_BASE + 0x81000)

Definition at line 100 of file efm32/ezr32wg/memorymap.h.

◆ CMU_BASE

#define CMU_BASE (PERIPH_BASE + 0xC8000)

Definition at line 87 of file efm32/ezr32wg/memorymap.h.

◆ DAC0_BASE

#define DAC0_BASE (PERIPH_BASE + 0x04000)

Definition at line 115 of file efm32/ezr32wg/memorymap.h.

◆ DI_ACMP0_CTRL

#define DI_ACMP0_CTRL MMIO32(DI_BASE + 0x060)

Definition at line 38 of file efm32/ezr32wg/memorymap.h.

◆ DI_ACMP1_CTRL

#define DI_ACMP1_CTRL MMIO32(DI_BASE + 0x068)

Definition at line 39 of file efm32/ezr32wg/memorymap.h.

◆ DI_ADC0_BIASPROG

#define DI_ADC0_BIASPROG MMIO32(DI_BASE + 0x048)

Definition at line 35 of file efm32/ezr32wg/memorymap.h.

◆ DI_ADC0_CAL

#define DI_ADC0_CAL MMIO32(DI_BASE + 0x040)

Definition at line 34 of file efm32/ezr32wg/memorymap.h.

◆ DI_ADC0_CAL_1V25

#define DI_ADC0_CAL_1V25 MMIO16(DI_BASE + 0x1B4)

Definition at line 54 of file efm32/ezr32wg/memorymap.h.

◆ DI_ADC0_CAL_2V5

#define DI_ADC0_CAL_2V5 MMIO16(DI_BASE + 0x1B6)

Definition at line 55 of file efm32/ezr32wg/memorymap.h.

◆ DI_ADC0_CAL_2XVDD

#define DI_ADC0_CAL_2XVDD MMIO16(DI_BASE + 0x1BC)

Definition at line 58 of file efm32/ezr32wg/memorymap.h.

◆ DI_ADC0_CAL_5VDIFF

#define DI_ADC0_CAL_5VDIFF MMIO16(DI_BASE + 0x1BA)

Definition at line 57 of file efm32/ezr32wg/memorymap.h.

◆ DI_ADC0_CAL_VDD

#define DI_ADC0_CAL_VDD MMIO16(DI_BASE + 0x1B8)

Definition at line 56 of file efm32/ezr32wg/memorymap.h.

◆ DI_ADC0_TEMP_0_READ_1V25

#define DI_ADC0_TEMP_0_READ_1V25 MMIO16(DI_BASE + 0x1BE)

Definition at line 59 of file efm32/ezr32wg/memorymap.h.

◆ DI_AUXHFRCO_CALIB_BAND_1

#define DI_AUXHFRCO_CALIB_BAND_1 MMIO8(DI_BASE + 0x1D4)

Definition at line 63 of file efm32/ezr32wg/memorymap.h.

◆ DI_AUXHFRCO_CALIB_BAND_11

#define DI_AUXHFRCO_CALIB_BAND_11 MMIO8(DI_BASE + 0x1D6)

Definition at line 65 of file efm32/ezr32wg/memorymap.h.

◆ DI_AUXHFRCO_CALIB_BAND_14

#define DI_AUXHFRCO_CALIB_BAND_14 MMIO8(DI_BASE + 0x1D7)

Definition at line 66 of file efm32/ezr32wg/memorymap.h.

◆ DI_AUXHFRCO_CALIB_BAND_21

#define DI_AUXHFRCO_CALIB_BAND_21 MMIO8(DI_BASE + 0x1D8)

Definition at line 67 of file efm32/ezr32wg/memorymap.h.

◆ DI_AUXHFRCO_CALIB_BAND_28

#define DI_AUXHFRCO_CALIB_BAND_28 MMIO8(DI_BASE + 0x1D9)

Definition at line 68 of file efm32/ezr32wg/memorymap.h.

◆ DI_AUXHFRCO_CALIB_BAND_7

#define DI_AUXHFRCO_CALIB_BAND_7 MMIO8(DI_BASE + 0x1D5)

Definition at line 64 of file efm32/ezr32wg/memorymap.h.

◆ DI_BASE

#define DI_BASE (0x0FE08000U)

Definition at line 28 of file efm32/ezr32wg/memorymap.h.

◆ DI_CAL_TEMP_0

#define DI_CAL_TEMP_0 MMIO8(DI_BASE + 0x1B2)

Definition at line 53 of file efm32/ezr32wg/memorymap.h.

◆ DI_CMU_AUXHFRCOCTRL

#define DI_CMU_AUXHFRCOCTRL MMIO32(DI_BASE + 0x030)

Definition at line 33 of file efm32/ezr32wg/memorymap.h.

◆ DI_CMU_HFRCOCTRL

#define DI_CMU_HFRCOCTRL MMIO32(DI_BASE + 0x028)

Definition at line 32 of file efm32/ezr32wg/memorymap.h.

◆ DI_CMU_LCDCTRL

#define DI_CMU_LCDCTRL MMIO32(DI_BASE + 0x078)

Definition at line 40 of file efm32/ezr32wg/memorymap.h.

◆ DI_CMU_LFRCOCTRL

#define DI_CMU_LFRCOCTRL MMIO32(DI_BASE + 0x020)

Definition at line 31 of file efm32/ezr32wg/memorymap.h.

◆ DI_DAC0_BIASPROG

#define DI_DAC0_BIASPROG MMIO32(DI_BASE + 0x058)

Definition at line 37 of file efm32/ezr32wg/memorymap.h.

◆ DI_DAC0_CAL

#define DI_DAC0_CAL MMIO32(DI_BASE + 0x050)

Definition at line 36 of file efm32/ezr32wg/memorymap.h.

◆ DI_DAC0_CAL_1V25

#define DI_DAC0_CAL_1V25 MMIO32(DI_BASE + 0x1C8)

Definition at line 60 of file efm32/ezr32wg/memorymap.h.

◆ DI_DAC0_CAL_2V5

#define DI_DAC0_CAL_2V5 MMIO32(DI_BASE + 0x1CC)

Definition at line 61 of file efm32/ezr32wg/memorymap.h.

◆ DI_DAC0_CAL_VDD

#define DI_DAC0_CAL_VDD MMIO32(DI_BASE + 0x1D0)

Definition at line 62 of file efm32/ezr32wg/memorymap.h.

◆ DI_DAC0_OPACTRL

#define DI_DAC0_OPACTRL MMIO32(DI_BASE + 0x0A0)

Definition at line 41 of file efm32/ezr32wg/memorymap.h.

◆ DI_DAC0_OPAOFFSET

#define DI_DAC0_OPAOFFSET MMIO32(DI_BASE + 0x0A8)

Definition at line 42 of file efm32/ezr32wg/memorymap.h.

◆ DI_DI_CRC

#define DI_DI_CRC MMIO16(DI_BASE + 0x1B0)

Definition at line 52 of file efm32/ezr32wg/memorymap.h.

◆ DI_EMU_BUACT

#define DI_EMU_BUACT MMIO32(DI_BASE + 0x0B8)

Definition at line 44 of file efm32/ezr32wg/memorymap.h.

◆ DI_EMU_BUBODBUVINCAL

#define DI_EMU_BUBODBUVINCAL MMIO32(DI_BASE + 0x0C0)

Definition at line 45 of file efm32/ezr32wg/memorymap.h.

◆ DI_EMU_BUBODUNREGCAL

#define DI_EMU_BUBODUNREGCAL MMIO32(DI_BASE + 0x0C8)

Definition at line 46 of file efm32/ezr32wg/memorymap.h.

◆ DI_EMU_BUINACT

#define DI_EMU_BUINACT MMIO32(DI_BASE + 0x0B0)

Definition at line 43 of file efm32/ezr32wg/memorymap.h.

◆ DI_HFRCO_CALIB_BAND_1

#define DI_HFRCO_CALIB_BAND_1 MMIO8(DI_BASE + 0x1DC)

Definition at line 69 of file efm32/ezr32wg/memorymap.h.

◆ DI_HFRCO_CALIB_BAND_11

#define DI_HFRCO_CALIB_BAND_11 MMIO8(DI_BASE + 0x1DE)

Definition at line 71 of file efm32/ezr32wg/memorymap.h.

◆ DI_HFRCO_CALIB_BAND_14

#define DI_HFRCO_CALIB_BAND_14 MMIO8(DI_BASE + 0x1DF)

Definition at line 72 of file efm32/ezr32wg/memorymap.h.

◆ DI_HFRCO_CALIB_BAND_21

#define DI_HFRCO_CALIB_BAND_21 MMIO8(DI_BASE + 0x1E0)

Definition at line 73 of file efm32/ezr32wg/memorymap.h.

◆ DI_HFRCO_CALIB_BAND_28

#define DI_HFRCO_CALIB_BAND_28 MMIO8(DI_BASE + 0x1E1)

Definition at line 74 of file efm32/ezr32wg/memorymap.h.

◆ DI_HFRCO_CALIB_BAND_7

#define DI_HFRCO_CALIB_BAND_7 MMIO8(DI_BASE + 0x1DD)

Definition at line 70 of file efm32/ezr32wg/memorymap.h.

◆ DI_MCM_REV_MAJ

#define DI_MCM_REV_MAJ MMIO8(DI_BASE + 0x1AB)

Definition at line 48 of file efm32/ezr32wg/memorymap.h.

◆ DI_MCM_REV_MIN

#define DI_MCM_REV_MIN MMIO8(DI_BASE + 0x1AA)

Definition at line 47 of file efm32/ezr32wg/memorymap.h.

◆ DI_MEM_INFO_FLASH

#define DI_MEM_INFO_FLASH MMIO16(DI_BASE + 0x1F8)

Definition at line 79 of file efm32/ezr32wg/memorymap.h.

◆ DI_MEM_INFO_PAGE_SIZE

#define DI_MEM_INFO_PAGE_SIZE MMIO8(DI_BASE + 0x1E7)

Definition at line 75 of file efm32/ezr32wg/memorymap.h.

◆ DI_MEM_INFO_RAM

#define DI_MEM_INFO_RAM MMIO16(DI_BASE + 0x1FA)

Definition at line 80 of file efm32/ezr32wg/memorymap.h.

◆ DI_PART_FAMILY

#define DI_PART_FAMILY MMIO8(DI_BASE + 0x1FE)

Definition at line 82 of file efm32/ezr32wg/memorymap.h.

◆ DI_PART_NUMBER

#define DI_PART_NUMBER MMIO16(DI_BASE + 0x1FC)

Definition at line 81 of file efm32/ezr32wg/memorymap.h.

◆ DI_PROD_REV

#define DI_PROD_REV MMIO8(DI_BASE + 0x1FF)

Definition at line 83 of file efm32/ezr32wg/memorymap.h.

◆ DI_RADIO_ID

#define DI_RADIO_ID MMIO16(DI_BASE + 0x1EE)

Definition at line 76 of file efm32/ezr32wg/memorymap.h.

◆ DI_RADIO_OPN

#define DI_RADIO_OPN MMIO8(DI_BASE + 0x1AE)

Definition at line 51 of file efm32/ezr32wg/memorymap.h.

◆ DI_RADIO_REV_MAJ

#define DI_RADIO_REV_MAJ MMIO8(DI_BASE + 0x1AD)

Definition at line 50 of file efm32/ezr32wg/memorymap.h.

◆ DI_RADIO_REV_MIN

#define DI_RADIO_REV_MIN MMIO8(DI_BASE + 0x1AC)

Definition at line 49 of file efm32/ezr32wg/memorymap.h.

◆ DI_UNIQUE_0

#define DI_UNIQUE_0 MMIO32(DI_BASE + 0x1F0)

Definition at line 77 of file efm32/ezr32wg/memorymap.h.

◆ DI_UNIQUE_1

#define DI_UNIQUE_1 MMIO32(DI_BASE + 0x1F4)

Definition at line 78 of file efm32/ezr32wg/memorymap.h.

◆ DMA_BASE

#define DMA_BASE (PERIPH_BASE + 0xC2000)

Definition at line 90 of file efm32/ezr32wg/memorymap.h.

◆ EMU_BASE

#define EMU_BASE (PERIPH_BASE + 0xC6000)

Definition at line 88 of file efm32/ezr32wg/memorymap.h.

◆ GPIO_BASE

#define GPIO_BASE (PERIPH_BASE + 0x06000)

Definition at line 114 of file efm32/ezr32wg/memorymap.h.

◆ I2C0_BASE

#define I2C0_BASE (PERIPH_BASE + 0x0A000)

Definition at line 113 of file efm32/ezr32wg/memorymap.h.

◆ I2C1_BASE

#define I2C1_BASE (PERIPH_BASE + 0x0A400)

Definition at line 112 of file efm32/ezr32wg/memorymap.h.

◆ LESENSE_BASE

#define LESENSE_BASE (PERIPH_BASE + 0x8C000)

Definition at line 92 of file efm32/ezr32wg/memorymap.h.

◆ LETIMER0_BASE

#define LETIMER0_BASE (PERIPH_BASE + 0x82000)

Definition at line 99 of file efm32/ezr32wg/memorymap.h.

◆ LEUART0_BASE

#define LEUART0_BASE (PERIPH_BASE + 0x84000)

Definition at line 98 of file efm32/ezr32wg/memorymap.h.

◆ LEUART1_BASE

#define LEUART1_BASE (PERIPH_BASE + 0x84400)

Definition at line 97 of file efm32/ezr32wg/memorymap.h.

◆ MSC_BASE

#define MSC_BASE (PERIPH_BASE + 0xC0000)

Definition at line 91 of file efm32/ezr32wg/memorymap.h.

◆ PCNT0_BASE

#define PCNT0_BASE (PERIPH_BASE + 0x86000)

Definition at line 96 of file efm32/ezr32wg/memorymap.h.

◆ PCNT1_BASE

#define PCNT1_BASE (PERIPH_BASE + 0x86400)

Definition at line 95 of file efm32/ezr32wg/memorymap.h.

◆ PCNT2_BASE

#define PCNT2_BASE (PERIPH_BASE + 0x86800)

Definition at line 94 of file efm32/ezr32wg/memorymap.h.

◆ PERIPH_BASE

#define PERIPH_BASE (0x40000000U)

Definition at line 25 of file efm32/ezr32wg/memorymap.h.

◆ PRS_BASE

#define PRS_BASE (PERIPH_BASE + 0xCC000)

Definition at line 102 of file efm32/ezr32wg/memorymap.h.

◆ RMU_BASE

#define RMU_BASE (PERIPH_BASE + 0xCA000)

Definition at line 86 of file efm32/ezr32wg/memorymap.h.

◆ RTC_BASE

#define RTC_BASE (PERIPH_BASE + 0x80000)

Definition at line 101 of file efm32/ezr32wg/memorymap.h.

◆ TIMER0_BASE

#define TIMER0_BASE (PERIPH_BASE + 0x10000)

Definition at line 106 of file efm32/ezr32wg/memorymap.h.

◆ TIMER1_BASE

#define TIMER1_BASE (PERIPH_BASE + 0x10400)

Definition at line 105 of file efm32/ezr32wg/memorymap.h.

◆ TIMER2_BASE

#define TIMER2_BASE (PERIPH_BASE + 0x10800)

Definition at line 104 of file efm32/ezr32wg/memorymap.h.

◆ TIMER3_BASE

#define TIMER3_BASE (PERIPH_BASE + 0x10C00)

Definition at line 103 of file efm32/ezr32wg/memorymap.h.

◆ UART0_BASE

#define UART0_BASE (PERIPH_BASE + 0x0E000)

Definition at line 108 of file efm32/ezr32wg/memorymap.h.

◆ UART1_BASE

#define UART1_BASE (PERIPH_BASE + 0x0E400)

Definition at line 107 of file efm32/ezr32wg/memorymap.h.

◆ USART1_BASE

#define USART1_BASE (PERIPH_BASE + 0x0C400)

Definition at line 110 of file efm32/ezr32wg/memorymap.h.

◆ USART2_BASE

#define USART2_BASE (PERIPH_BASE + 0x0C800)

Definition at line 109 of file efm32/ezr32wg/memorymap.h.

◆ USARTRF0_BASE

#define USARTRF0_BASE (PERIPH_BASE + 0x0C000)

Definition at line 111 of file efm32/ezr32wg/memorymap.h.

◆ USB_BASE

#define USB_BASE (PERIPH_BASE + 0xC4000)

Definition at line 89 of file efm32/ezr32wg/memorymap.h.

◆ VCMP_BASE

#define VCMP_BASE (PERIPH_BASE + 0x00000)

Definition at line 119 of file efm32/ezr32wg/memorymap.h.

◆ WDOG_BASE

#define WDOG_BASE (PERIPH_BASE + 0x88000)

Definition at line 93 of file efm32/ezr32wg/memorymap.h.

Macros