libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
dac_common.h
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1/** @addtogroup dac_defines
2 */
3/*
4 * This file is part of the libopencm3 project.
5 *
6 * Copyright (C) 2015 Kuldeep Singh Dhaka <kuldeepdhaka9@gmail.com>
7 *
8 * This library is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU Lesser General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
12 *
13 * This library is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU Lesser General Public License for more details.
17 *
18 * You should have received a copy of the GNU Lesser General Public License
19 * along with this library. If not, see <http://www.gnu.org/licenses/>.
20 */
21
22#pragma once
23
27
28/**@{*/
29
30#define DAC_CTRL(base) MMIO32((base) + 0x00)
31#define DAC_STATUS(base) MMIO32((base) + 0x04)
32#define DAC_CHx_CTRL(base, x) MMIO32((base) + 0x08 + (0x04 * (x)))
33#define DAC_CH0CTRL(base) DAC_CHx_CTRL(base, 0)
34#define DAC_CH1CTRL(base) DAC_CHx_CTRL(base, 1)
35#define DAC_IEN(base) MMIO32((base) + 0x010)
36#define DAC_IF(base) MMIO32((base) + 0x014)
37#define DAC_IFS(base) MMIO32((base) + 0x018)
38#define DAC_IFC(base) MMIO32((base) + 0x01C)
39#define DAC_CH0DATA(base) MMIO32((base) + 0x020)
40#define DAC_CH1DATA(base) MMIO32((base) + 0x024)
41#define DAC_COMBDATA(base) MMIO32((base) + 0x028)
42#define DAC_CAL(base) MMIO32((base) + 0x02C)
43#define DAC_BIASPROG(base) MMIO32((base) + 0x030)
44#define DAC_OPACTRL(base) MMIO32((base) + 0x054)
45#define DAC_OPAOFFSET(base) MMIO32((base) + 0x058)
46#define DAC_OPA0MUX(base) MMIO32((base) + 0x05C)
47#define DAC_OPA1MUX(base) MMIO32((base) + 0x060)
48#define DAC_OPA2MUX(base) MMIO32((base) + 0x064)
49
50/* DAC_CTRL */
51#define DAC_CTRL_REFRSEL_SHIFT (20)
52#define DAC_CTRL_REFRSEL_MASK (0x3 << DAC_CTRL_REFRSEL_SHIFT)
53#define DAC_CTRL_REFRSEL(v) \
54 (((v) << DAC_CTRL_REFRSEL_SHIFT) & DAC_CTRL_REFRSEL_MASK)
55#define DAC_CTRL_REFRSEL_8CYCLES 0
56#define DAC_CTRL_REFRSEL_16CYCLES 1
57#define DAC_CTRL_REFRSEL_32CYCLES 2
58#define DAC_CTRL_REFRSEL_64CYCLES 3
59
60#define DAC_CTRL_PRESC_SHIFT (16)
61#define DAC_CTRL_PRESC_MASK (0x7 << DAC_CTRL_PRESC_SHIFT)
62#define DAC_CTRL_PRESC(v) \
63 (((v) << DAC_CTRL_PRESC_SHIFT) & DAC_CTRL_PRESC_MASK)
64#define DAC_CTRL_PRESC_DIV1 0
65#define DAC_CTRL_PRESC_DIV2 1
66#define DAC_CTRL_PRESC_DIV4 2
67#define DAC_CTRL_PRESC_DIV8 3
68#define DAC_CTRL_PRESC_DIV16 4
69#define DAC_CTRL_PRESC_DIV32 5
70#define DAC_CTRL_PRESC_DIV64 6
71#define DAC_CTRL_PRESC_DIV128 7
72#define DAC_CTRL_PRESC_NODIV DAC_CTRL_PRESC_DIV1
73
74#define DAC_CTRL_REFSEL_SHIFT (8)
75#define DAC_CTRL_REFSEL_MASK (0x3 << DAC_CTRL_REFSEL_SHIFT)
76#define DAC_CTRL_REFSEL(v) \
77 (((v) << DAC_CTRL_REFSEL_SHIFT) & DAC_CTRL_REFSEL_MASK)
78#define DAC_CTRL_REFSEL_1V25 0
79#define DAC_CTRL_REFSEL_2V5 1
80#define DAC_CTRL_REFSEL_VDD 2
81
82#define DAC_CTRL_CH0PRESCRST (1 << 7)
83#define DAC_CTRL_OUTENPRS (1 << 6)
84
85#define DAC_CTRL_OUTMODE_SHIFT (4)
86#define DAC_CTRL_OUTMODE_MASK (0x3 << DAC_CTRL_OUTMODE_SHIFT)
87#define DAC_CTRL_OUTMODE(v) \
88 (((v) << DAC_CTRL_OUTMODE_SHIFT) & DAC_CTRL_OUTMODE_MASK)
89#define DAC_CTRL_OUTMODE_DISABLE 0
90#define DAC_CTRL_OUTMODE_PIN 1
91#define DAC_CTRL_OUTMODE_ADC 2
92#define DAC_CTRL_OUTMODE_PINADC 3
93
94#define DAC_CTRL_CONVMODE_SHIFT (2)
95#define DAC_CTRL_CONVMODE_MASK (0x3 << DAC_CTRL_CONVMODE_SHIFT)
96#define DAC_CTRL_CONVMODE(v) \
97 (((v) << DAC_CTRL_CONVMODE_SHIFT) & DAC_CTRL_CONVMODE_MASK)
98#define DAC_CTRL_CONVMODE_CONTINUOUS 0
99#define DAC_CTRL_CONVMODE_SAMPLEHOLD 1
100#define DAC_CTRL_CONVMODE_SAMPLEOFF 2
101
102#define DAC_CTRL_SINMODE (1 << 1)
103#define DAC_CTRL_DIFF (1 << 0)
104
105/* DAC_STATUS */
106#define DAC_STATUS_CH1DV (1 << 1)
107#define DAC_STATUS_CH0DV (1 << 0)
108
109/* DAC_CH_CTRL */
110#define DAC_CH_CTRL_PRSSEL_SHIFT (4)
111#define DAC_CH_CTRL_PRSSEL_MASK (0xF << DAC_CH_CTRL_PRSSEL_SHIFT)
112#define DAC_CH_CTRL_PRSSEL(v) \
113 (((v) << DAC_CH_CTRL_PRSSEL_SHIFT) & DAC_CH_CTRL_PRSSEL_MASK)
114#define DAC_CH_CTRL_PRSSEL_PRSCHx(x) DAC_CH_CTRL_PRSSEL(x)
115#define DAC_CH_CTRL_PRSSEL_PRSCH0 0
116#define DAC_CH_CTRL_PRSSEL_PRSCH1 1
117#define DAC_CH_CTRL_PRSSEL_PRSCH2 2
118#define DAC_CH_CTRL_PRSSEL_PRSCH3 3
119#define DAC_CH_CTRL_PRSSEL_PRSCH4 4
120#define DAC_CH_CTRL_PRSSEL_PRSCH5 5
121#define DAC_CH_CTRL_PRSSEL_PRSCH6 6
122#define DAC_CH_CTRL_PRSSEL_PRSCH7 7
123#define DAC_CH_CTRL_PRSSEL_PRSCH8 8
124#define DAC_CH_CTRL_PRSSEL_PRSCH9 9
125#define DAC_CH_CTRL_PRSSEL_PRSCH10 10
126#define DAC_CH_CTRL_PRSSEL_PRSCH11 11
127
128#define DAC_CH_CTRL_PRSEN (1 << 2)
129#define DAC_CH_CTRL_REFREN (1 << 1)
130#define DAC_CH_CTRL_EN (1 << 0)
131
132/* DAC_CH0CTRL */
133#define DAC_CH0CTRL_PRSSEL_SHIFT DAC_CH_CTRL_PRSSEL_SHIFT
134#define DAC_CH0CTRL_PRSSEL_MASK DAC_CH_CTRL_PRSSEL_MASK
135#define DAC_CH0CTRL_PRSSEL(v) DAC_CH_CTRL_PRSSEL(v)
136#define DAC_CH0CTRL_PRSSEL_PRSCHx(x) DAC_CH_CTRL_PRSSEL_PRSCHx(x)
137#define DAC_CH0CTRL_PRSSEL_PRSCH0 DAC_CH0CTRL_PRSSEL_PRSCH0
138#define DAC_CH0CTRL_PRSSEL_PRSCH1 DAC_CH_CTRL_PRSSEL_PRSCH1
139#define DAC_CH0CTRL_PRSSEL_PRSCH2 DAC_CH_CTRL_PRSSEL_PRSCH2
140#define DAC_CH0CTRL_PRSSEL_PRSCH3 DAC_CH_CTRL_PRSSEL_PRSCH3
141#define DAC_CH0CTRL_PRSSEL_PRSCH4 DAC_CH_CTRL_PRSSEL_PRSCH4
142#define DAC_CH0CTRL_PRSSEL_PRSCH5 DAC_CH_CTRL_PRSSEL_PRSCH5
143#define DAC_CH0CTRL_PRSSEL_PRSCH6 DAC_CH_CTRL_PRSSEL_PRSCH6
144#define DAC_CH0CTRL_PRSSEL_PRSCH7 DAC_CH_CTRL_PRSSEL_PRSCH7
145#define DAC_CH0CTRL_PRSSEL_PRSCH8 DAC_CH_CTRL_PRSSEL_PRSCH8
146#define DAC_CH0CTRL_PRSSEL_PRSCH9 DAC_CH_CTRL_PRSSEL_PRSCH9
147#define DAC_CH0CTRL_PRSSEL_PRSCH10 DAC_CH_CTRL_PRSSEL_PRSCH10
148#define DAC_CH0CTRL_PRSSEL_PRSCH11 DAC_CH_CTRL_PRSSEL_PRSCH11
149
150#define DAC_CH0CTRL_PRSEN DAC_CH_CTRL_PRSEN
151#define DAC_CH0CTRL_REFREN DAC_CH_CTRL_REFREN
152#define DAC_CH0CTRL_EN DAC_CH_CTRL_EN
153
154/* DAC_CH1CTRL */
155#define DAC_CH1CTRL_PRSSEL_SHIFT DAC_CH_CTRL_PRSSEL_SHIFT
156#define DAC_CH1CTRL_PRSSEL_MASK DAC_CH_CTRL_PRSSEL_MASK
157#define DAC_CH1CTRL_PRSSEL(v) DAC_CH_CTRL_PRSSEL(v)
158#define DAC_CH1CTRL_PRSSEL_PRSCHx(x) DAC_CH_CTRL_PRSSEL_PRSCHx(x)
159#define DAC_CH1CTRL_PRSSEL_PRSCH0 DAC_CH_CTRL_PRSSEL_PRSCH0
160#define DAC_CH1CTRL_PRSSEL_PRSCH1 DAC_CH_CTRL_PRSSEL_PRSCH1
161#define DAC_CH1CTRL_PRSSEL_PRSCH2 DAC_CH_CTRL_PRSSEL_PRSCH2
162#define DAC_CH1CTRL_PRSSEL_PRSCH3 DAC_CH_CTRL_PRSSEL_PRSCH3
163#define DAC_CH1CTRL_PRSSEL_PRSCH4 DAC_CH_CTRL_PRSSEL_PRSCH4
164#define DAC_CH1CTRL_PRSSEL_PRSCH5 DAC_CH_CTRL_PRSSEL_PRSCH5
165#define DAC_CH1CTRL_PRSSEL_PRSCH6 DAC_CH_CTRL_PRSSEL_PRSCH6
166#define DAC_CH1CTRL_PRSSEL_PRSCH7 DAC_CH_CTRL_PRSSEL_PRSCH7
167#define DAC_CH1CTRL_PRSSEL_PRSCH8 DAC_CH_CTRL_PRSSEL_PRSCH8
168#define DAC_CH1CTRL_PRSSEL_PRSCH9 DAC_CH_CTRL_PRSSEL_PRSCH9
169#define DAC_CH1CTRL_PRSSEL_PRSCH10 DAC_CH_CTRL_PRSSEL_PRSCH10
170#define DAC_CH1CTRL_PRSSEL_PRSCH11 DAC_CH_CTRL_PRSSEL_PRSCH11
171
172#define DAC_CH1CTRL_PRSEN DAC_CH_CTRL_PRSEN
173#define DAC_CH1CTRL_REFREN DAC_CH_CTRL_REFREN
174#define DAC_CH1CTRL_EN DAC_CH_CTRL_EN
175
176/* DAC_IEN */
177#define DAC_IEN_CH1UF (5 << 0)
178#define DAC_IEN_CH0UF (4 << 0)
179#define DAC_IEN_CH1 (1 << 1)
180#define DAC_IEN_CH0 (1 << 0)
181
182/* DAC_IF */
183#define DAC_IF_CH1UF (5 << 0)
184#define DAC_IF_CH0UF (4 << 0)
185#define DAC_IF_CH1 (1 << 1)
186#define DAC_IF_CH0 (1 << 0)
187
188/* DAC_IFS */
189#define DAC_IFS_CH1UF (5 << 0)
190#define DAC_IFS_CH0UF (4 << 0)
191#define DAC_IFS_CH1 (1 << 1)
192#define DAC_IFS_CH0 (1 << 0)
193
194/* DAC_IFC */
195#define DAC_IFC_CH1UF (5 << 0)
196#define DAC_IFC_CH0UF (4 << 0)
197#define DAC_IFC_CH1 (1 << 1)
198#define DAC_IFC_CH0 (1 << 0)
199
200/* DAC_CAL */
201#define DAC_CAL_GAIN_SHIFT (16)
202#define DAC_CAL_GAIN_MASK (0x7F << DAC_CAL_GAIN_SHIFT)
203#define DAC_CAL_GAIN(v) \
204 (((v) << DAC_CAL_GAIN_SHIFT) & DAC_CAL_GAIN_MASK)
205
206#define DAC_CAL_CH1OFFSET_SHIFT (8)
207#define DAC_CAL_CH1OFFSET_MASK (0x3F << DAC_CAL_CH1OFFSET_SHIFT)
208#define DAC_CAL_CH1OFFSET(v) \
209 (((v) << DAC_CAL_CH1OFFSET_SHIFT) & DAC_CAL_CH1OFFSET_MASK)
210
211#define DAC_CAL_CH0OFFSET_SHIFT (0)
212#define DAC_CAL_CH0OFFSET_MASK (0x3F << DAC_CAL_CH0OFFSET_SHIFT)
213#define DAC_CAL_CH0OFFSET(v) \
214 (((v) << DAC_CAL_CH0OFFSET_SHIFT) & DAC_CAL_CH0OFFSET_MASK)
215
216/* DAC_BIASPROG */
217#define DAC_BIASPROG_OPA2HALFBIAS (1 << 14)
218
219#define DAC_BIASPROG_OPA2BIASPROG_SHIFT (8)
220#define DAC_BIASPROG_OPA2BIASPROG_MASK (0xF << DAC_BIASPROG_OPA2BIASPROG_SHIFT)
221#define DAC_BIASPROG_OPA2BIASPROG(v) \
222 ((((v) << DAC_BIASPROG_OPA2BIASPROG_SHIFT)) & \
223 DAC_BIASPROG_OPA2BIASPROG_MASK)
224
225#define DAC_BIASPROG_HALFBIAS (1 << 6)
226
227#define DAC_BIASPROG_BIASPROG_SHIFT (0)
228#define DAC_BIASPROG_BIASPROG_MASK (0xF << DAC_BIASPROG_BIASPROG_SHIFT)
229#define DAC_BIASPROG_BIASPROG(v) \
230 ((((v) << DAC_BIASPROG_BIASPROG_SHIFT)) & DAC_BIASPROG_BIASPROG_MASK)
231
232/* DAC_OPACTRL */
233#define DAC_OPACTRL_OPA2SHORT (1 << 24)
234#define DAC_OPACTRL_OPA1SHORT (1 << 23)
235#define DAC_OPACTRL_OPA0SHORT (1 << 22)
236
237#define DAC_OPACTRL_OPA2LPFDIS_SHIFT (16)
238#define DAC_OPACTRL_OPA2LPFDIS_MASK (0x3 << DAC_OPACTRL_OPA2LPFDIS_SHIFT)
239#define DAC_OPACTRL_OPA2LPFDIS(v) \
240 (((v) << DAC_OPACTRL_OPA2LPFDIS_SHIFT) & DAC_OPACTRL_OPA2LPFDIS_MASK)
241#define DAC_OPACTRL_OPA2LPFDIS_PLPFDIS 0b01
242#define DAC_OPACTRL_OPA2LPFDIS_NLPFDIS 0b10
243
244#define DAC_OPACTRL_OPA1LPFDIS_SHIFT (14)
245#define DAC_OPACTRL_OPA1LPFDIS_MASK (0x3 << DAC_OPACTRL_OPA1LPFDIS_SHIFT)
246#define DAC_OPACTRL_OPA1LPFDIS(v) \
247 (((v) << DAC_OPACTRL_OPA1LPFDIS_SHIFT) & DAC_OPACTRL_OPA1LPFDIS_MASK)
248#define DAC_OPACTRL_OPA1LPFDIS_PLPFDIS 0b01
249#define DAC_OPACTRL_OPA1LPFDIS_NLPFDIS 0b10
250
251#define DAC_OPACTRL_OPA0LPFDIS_SHIFT (14)
252#define DAC_OPACTRL_OPA0LPFDIS_MASK (0x3 << DAC_OPACTRL_OPA0LPFDIS_SHIFT)
253#define DAC_OPACTRL_OPA0LPFDIS(v) \
254 (((v) << DAC_OPACTRL_OPA0LPFDIS_SHIFT) & DAC_OPACTRL_OPA0LPFDIS_MASK)
255#define DAC_OPACTRL_OPA0LPFDIS_PLPFDIS 0b01
256#define DAC_OPACTRL_OPA0LPFDIS_NLPFDIS 0b10
257
258#define DAC_OPACTRL_OPA2HCMDIS (1 << 8)
259#define DAC_OPACTRL_OPA1HCMDIS (1 << 7)
260#define DAC_OPACTRL_OPA0HCMDIS (1 << 6)
261
262#define DAC_OPACTRL_OPA2EN (1 << 2)
263#define DAC_OPACTRL_OPA1EN (1 << 1)
264#define DAC_OPACTRL_OPA0EN (1 << 0)
265
266/* DAC_OPA0MUX */
267#define DAC_OPA0MUX_RESSEL_SHIFT (28)
268#define DAC_OPA0MUX_RESSEL_MASK (0x7 << DAC_OPA0MUX_RESSEL_SHIFT)
269#define DAC_OPA0MUX_RESSEL_RESSEL(v) \
270 ((((v) << DAC_OPA0MUX_RESSEL_SHIFT)) & DAC_OPA0MUX_RESSEL_MASK)
271#define DAC_OPA0MUX_RESSEL_RESSEL_RESx(x) DAC_OPA0MUX_RESSEL_RESSEL(x)
272#define DAC_OPA0MUX_RESSEL_RESSEL_RES0 DAC_OPA0MUX_RESSEL_RESSEL_RESx(0)
273#define DAC_OPA0MUX_RESSEL_RESSEL_RES1 DAC_OPA0MUX_RESSEL_RESSEL_RESx(1)
274#define DAC_OPA0MUX_RESSEL_RESSEL_RES2 DAC_OPA0MUX_RESSEL_RESSEL_RESx(2)
275#define DAC_OPA0MUX_RESSEL_RESSEL_RES3 DAC_OPA0MUX_RESSEL_RESSEL_RESx(3)
276#define DAC_OPA0MUX_RESSEL_RESSEL_RES4 DAC_OPA0MUX_RESSEL_RESSEL_RESx(4)
277#define DAC_OPA0MUX_RESSEL_RESSEL_RES5 DAC_OPA0MUX_RESSEL_RESSEL_RESx(5)
278#define DAC_OPA0MUX_RESSEL_RESSEL_RES6 DAC_OPA0MUX_RESSEL_RESSEL_RESx(6)
279#define DAC_OPA0MUX_RESSEL_RESSEL_RES7 DAC_OPA0MUX_RESSEL_RESSEL_RESx(7)
280
281#define DAC_OPA0MUX_NEXTOUT (1 << 26)
282
283#define DAC_OPA0MUX_OUTMODE_SHIFT (22)
284#define DAC_OPA0MUX_OUTMODE_MASK (0x3 << DAC_OPA0MUX_OUTMODE_SHIFT)
285#define DAC_OPA0MUX_OUTMODE(v) \
286 (((v) << DAC_OPA0MUX_OUTMODE_SHIFT) & DAC_OPA0MUX_OUTMODE_MASK)
287#define DAC_OPA0MUX_OUTMODE_DISABLE 0
288#define DAC_OPA0MUX_OUTMODE_MAIN 1
289#define DAC_OPA0MUX_OUTMODE_ALT 2
290#define DAC_OPA0MUX_OUTMODE_ALL 3
291
292#define DAC_OPA0MUX_OUTPEN_SHIFT (18)
293#define DAC_OPA0MUX_OUTPEN_MASK (0x1F << DAC_OPA0MUX_OUTPEN_SHIFT)
294#define DAC_OPA0MUX_OUTPEN(v) \
295 (((v) << DAC_OPA0MUX_OUTPEN_SHIFT) & DAC_OPA0MUX_OUTPEN_MASK)
296#define DAC_OPA0MUX_OUTPEN_OUT0 DAC_OPA0MUX_OUTPEN(1 << 0)
297#define DAC_OPA0MUX_OUTPEN_OUT1 DAC_OPA0MUX_OUTPEN(1 << 1)
298#define DAC_OPA0MUX_OUTPEN_OUT2 DAC_OPA0MUX_OUTPEN(1 << 2)
299#define DAC_OPA0MUX_OUTPEN_OUT3 DAC_OPA0MUX_OUTPEN(1 << 3)
300#define DAC_OPA0MUX_OUTPEN_OUT4 DAC_OPA0MUX_OUTPEN(1 << 4)
301
302#define DAC_OPA0MUX_NPEN (1 << 13)
303#define DAC_OPA0MUX_PPEN (1 << 12)
304
305#define DAC_OPA0MUX_RESINMUX_SHIFT (8)
306#define DAC_OPA0MUX_RESINMUX_MASK (0x7 << DAC_OPA0MUX_RESINMUX_SHIFT)
307#define DAC_OPA0MUX_RESINMUX(v) \
308 (((v) << DAC_OPA0MUX_RESINMUX_SHIFT) & DAC_OPA0MUX_RESINMUX_MASK)
309#define DAC_OPA0MUX_RESINMUX_DISABLE 0
310#define DAC_OPA0MUX_RESINMUX_OPA0INP 1
311#define DAC_OPA0MUX_RESINMUX_NEGPAD 2
312#define DAC_OPA0MUX_RESINMUX_POSPAD 3
313#define DAC_OPA0MUX_RESINMUX_VSS 4
314
315#define DAC_OPA0MUX_NEGSEL_SHIFT (4)
316#define DAC_OPA0MUX_NEGSEL_MASK (0x3 << DAC_OPA0MUX_NEGSEL_SHIFT)
317#define DAC_OPA0MUX_NEGSEL(v) \
318 (((v) << DAC_OPA0MUX_NEGSEL_SHIFT) & DAC_OPA0MUX_NEGSEL_MASK)
319#define DAC_OPA0MUX_NEGSEL_DISABLE 0
320#define DAC_OPA0MUX_NEGSEL_UG 1
321#define DAC_OPA0MUX_NEGSEL_OPATAP 2
322#define DAC_OPA0MUX_NEGSEL_NEGPAD 3
323
324#define DAC_OPA0MUX_POSSEL_SHIFT (0)
325#define DAC_OPA0MUX_POSSEL_MASK (0x7 << DAC_OPA0MUX_POSSEL_SHIFT)
326#define DAC_OPA0MUX_POSSEL(v) \
327 (((v) << DAC_OPA0MUX_POSSEL_SHIFT) & DAC_OPA0MUX_POSSEL_MASK)
328#define DAC_OPA0MUX_POSSEL_DISABLE 0
329#define DAC_OPA0MUX_POSSEL_DAC 1
330#define DAC_OPA0MUX_POSSEL_POSPAD 2
331#define DAC_OPA0MUX_POSSEL_OPA0INP 3
332#define DAC_OPA0MUX_POSSEL_OPATAP 4
333
334/* DAC_OPA1MUX */
335#define DAC_OPA1MUX_RESSEL_SHIFT (28)
336#define DAC_OPA1MUX_RESSEL_MASK (0x7 << DAC_OPA1MUX_RESSEL_SHIFT)
337#define DAC_OPA1MUX_RESSEL_RESSEL(v) \
338 ((((v) << DAC_OPA1MUX_RESSEL_SHIFT)) & DAC_OPA1MUX_RESSEL_MASK)
339#define DAC_OPA1MUX_RESSEL_RESSEL_RESx(x) DAC_OPA1MUX_RESSEL_RESSEL(x)
340#define DAC_OPA1MUX_RESSEL_RESSEL_RES0 DAC_OPA1MUX_RESSEL_RESSEL_RESx(0)
341#define DAC_OPA1MUX_RESSEL_RESSEL_RES1 DAC_OPA1MUX_RESSEL_RESSEL_RESx(1)
342#define DAC_OPA1MUX_RESSEL_RESSEL_RES2 DAC_OPA1MUX_RESSEL_RESSEL_RESx(2)
343#define DAC_OPA1MUX_RESSEL_RESSEL_RES3 DAC_OPA1MUX_RESSEL_RESSEL_RESx(3)
344#define DAC_OPA1MUX_RESSEL_RESSEL_RES4 DAC_OPA1MUX_RESSEL_RESSEL_RESx(4)
345#define DAC_OPA1MUX_RESSEL_RESSEL_RES5 DAC_OPA1MUX_RESSEL_RESSEL_RESx(5)
346#define DAC_OPA1MUX_RESSEL_RESSEL_RES6 DAC_OPA1MUX_RESSEL_RESSEL_RESx(6)
347#define DAC_OPA1MUX_RESSEL_RESSEL_RES7 DAC_OPA1MUX_RESSEL_RESSEL_RESx(7)
348
349#define DAC_OPA1MUX_NEXTOUT (1 << 26)
350
351#define DAC_OPA1MUX_OUTMODE_SHIFT (22)
352#define DAC_OPA1MUX_OUTMODE_MASK (0x3 << DAC_OPA1MUX_OUTMODE_SHIFT)
353#define DAC_OPA1MUX_OUTMODE(v) \
354 (((v) << DAC_OPA1MUX_OUTMODE_SHIFT) & DAC_OPA1MUX_OUTMODE_MASK)
355#define DAC_OPA1MUX_OUTMODE_DISABLE 0
356#define DAC_OPA1MUX_OUTMODE_MAIN 1
357#define DAC_OPA1MUX_OUTMODE_ALT 2
358#define DAC_OPA1MUX_OUTMODE_ALL 3
359
360#define DAC_OPA1MUX_OUTPEN_SHIFT (18)
361#define DAC_OPA1MUX_OUTPEN_MASK (0x1F << DAC_OPA1MUX_OUTPEN_SHIFT)
362#define DAC_OPA1MUX_OUTPEN(v) \
363 (((v) << DAC_OPA1MUX_OUTPEN_SHIFT) & DAC_OPA1MUX_OUTPEN_MASK)
364#define DAC_OPA1MUX_OUTPEN_OUT0 DAC_OPA1MUX_OUTPEN(1 << 0)
365#define DAC_OPA1MUX_OUTPEN_OUT1 DAC_OPA1MUX_OUTPEN(1 << 1)
366#define DAC_OPA1MUX_OUTPEN_OUT2 DAC_OPA1MUX_OUTPEN(1 << 2)
367#define DAC_OPA1MUX_OUTPEN_OUT3 DAC_OPA1MUX_OUTPEN(1 << 3)
368#define DAC_OPA1MUX_OUTPEN_OUT4 DAC_OPA1MUX_OUTPEN(1 << 4)
369
370#define DAC_OPA1MUX_NPEN (1 << 13)
371#define DAC_OPA1MUX_PPEN (1 << 12)
372
373#define DAC_OPA1MUX_RESINMUX_SHIFT (8)
374#define DAC_OPA1MUX_RESINMUX_MASK (0x7 << DAC_OPA1MUX_RESINMUX_SHIFT)
375#define DAC_OPA1MUX_RESINMUX(v) \
376 (((v) << DAC_OPA1MUX_RESINMUX_SHIFT) & DAC_OPA1MUX_RESINMUX_MASK)
377#define DAC_OPA1MUX_RESINMUX_DISABLE 0
378#define DAC_OPA1MUX_RESINMUX_OPA0INP 1
379#define DAC_OPA1MUX_RESINMUX_NEGPAD 2
380#define DAC_OPA1MUX_RESINMUX_POSPAD 3
381#define DAC_OPA1MUX_RESINMUX_VSS 4
382
383#define DAC_OPA1MUX_NEGSEL_SHIFT (4)
384#define DAC_OPA1MUX_NEGSEL_MASK (0x3 << DAC_OPA1MUX_NEGSEL_SHIFT)
385#define DAC_OPA1MUX_NEGSEL(v) \
386 (((v) << DAC_OPA1MUX_NEGSEL_SHIFT) & DAC_OPA1MUX_NEGSEL_MASK)
387#define DAC_OPA1MUX_NEGSEL_DISABLE 0
388#define DAC_OPA1MUX_NEGSEL_UG 1
389#define DAC_OPA1MUX_NEGSEL_OPATAP 2
390#define DAC_OPA1MUX_NEGSEL_NEGPAD 3
391
392#define DAC_OPA1MUX_POSSEL_SHIFT (0)
393#define DAC_OPA1MUX_POSSEL_MASK (0x7 << DAC_OPA1MUX_POSSEL_SHIFT)
394#define DAC_OPA1MUX_POSSEL(v) \
395 (((v) << DAC_OPA1MUX_POSSEL_SHIFT) & DAC_OPA1MUX_POSSEL_MASK)
396#define DAC_OPA1MUX_POSSEL_DISABLE 0
397#define DAC_OPA1MUX_POSSEL_DAC 1
398#define DAC_OPA1MUX_POSSEL_POSPAD 2
399#define DAC_OPA1MUX_POSSEL_OPA0INP 3
400#define DAC_OPA1MUX_POSSEL_OPATAP 4
401
402
403/* DAC_OPA2MUX */
404#define DAC_OPA2MUX_RESSEL_SHIFT (28)
405#define DAC_OPA2MUX_RESSEL_MASK (0x7 << DAC_OPA2MUX_RESSEL_SHIFT)
406#define DAC_OPA2MUX_RESSEL_RESSEL(v) \
407 ((((v) << DAC_OPA2MUX_RESSEL_SHIFT)) & DAC_OPA2MUX_RESSEL_MASK)
408#define DAC_OPA2MUX_RESSEL_RESSEL_RESx(x) DAC_OPA2MUX_RESSEL_RESSEL(x)
409#define DAC_OPA2MUX_RESSEL_RESSEL_RES0 DAC_OPA2MUX_RESSEL_RESSEL_RESx(0)
410#define DAC_OPA2MUX_RESSEL_RESSEL_RES1 DAC_OPA2MUX_RESSEL_RESSEL_RESx(1)
411#define DAC_OPA2MUX_RESSEL_RESSEL_RES2 DAC_OPA2MUX_RESSEL_RESSEL_RESx(2)
412#define DAC_OPA2MUX_RESSEL_RESSEL_RES3 DAC_OPA2MUX_RESSEL_RESSEL_RESx(3)
413#define DAC_OPA2MUX_RESSEL_RESSEL_RES4 DAC_OPA2MUX_RESSEL_RESSEL_RESx(4)
414#define DAC_OPA2MUX_RESSEL_RESSEL_RES5 DAC_OPA2MUX_RESSEL_RESSEL_RESx(5)
415#define DAC_OPA2MUX_RESSEL_RESSEL_RES6 DAC_OPA2MUX_RESSEL_RESSEL_RESx(6)
416#define DAC_OPA2MUX_RESSEL_RESSEL_RES7 DAC_OPA2MUX_RESSEL_RESSEL_RESx(7)
417
418#define DAC_OPA2MUX_NEXTOUT (1 << 26)
419
420#define DAC_OPA2MUX_OUTMODE (1 << 22)
421
422#define DAC_OPA2MUX_OUTPEN_SHIFT (14)
423#define DAC_OPA2MUX_OUTPEN_MASK (0x3 << DAC_OPA2MUX_OUTPEN_SHIFT)
424#define DAC_OPA2MUX_OUTPEN(v) \
425 (((v) << DAC_OPA2MUX_OUTPEN_SHIFT) & DAC_OPA2MUX_OUTPEN_MASK)
426#define DAC_OPA2MUX_OUTPEN_OUT0 0
427#define DAC_OPA2MUX_OUTPEN_OUT1 1
428
429#define DAC_OPA2MUX_NPEN (1 << 13)
430#define DAC_OPA2MUX_PPEN (1 << 12)
431
432#define DAC_OPA2MUX_RESINMUX_SHIFT (8)
433#define DAC_OPA2MUX_RESINMUX_MASK (0x7 << DAC_OPA2MUX_RESINMUX_SHIFT)
434#define DAC_OPA2MUX_RESINMUX(v) \
435 (((v) << DAC_OPA2MUX_RESINMUX_SHIFT) & DAC_OPA2MUX_RESINMUX_MASK)
436#define DAC_OPA2MUX_RESINMUX_DISABLE 0
437#define DAC_OPA2MUX_RESINMUX_OPA1INP 1
438#define DAC_OPA2MUX_RESINMUX_NEGPAD 2
439#define DAC_OPA2MUX_RESINMUX_POSPAD 3
440#define DAC_OPA2MUX_RESINMUX_VSS 4
441
442#define DAC_OPA2MUX_NEGSEL_SHIFT (4)
443#define DAC_OPA2MUX_NEGSEL_MASK (0x3 << DAC_OPA2MUX_NEGSEL_SHIFT)
444#define DAC_OPA2MUX_NEGSEL(v) \
445 (((v) << DAC_OPA2MUX_NEGSEL_SHIFT) & DAC_OPA2MUX_NEGSEL_MASK)
446#define DAC_OPA2MUX_NEGSEL_DISABLE 0
447#define DAC_OPA2MUX_NEGSEL_UG 1
448#define DAC_OPA2MUX_NEGSEL_OPATAP 2
449#define DAC_OPA2MUX_NEGSEL_NEGPAD 3
450
451#define DAC_OPA2MUX_POSSEL_SHIFT (0)
452#define DAC_OPA2MUX_POSSEL_MASK (0x7 << DAC_OPA2MUX_POSSEL_SHIFT)
453#define DAC_OPA2MUX_POSSEL(v) \
454 (((v) << DAC_OPA2MUX_POSSEL_SHIFT) & DAC_OPA2MUX_POSSEL_MASK)
455#define DAC_OPA2MUX_POSSEL_DISABLE 0
456#define DAC_OPA2MUX_POSSEL_DAC 1
457#define DAC_OPA2MUX_POSSEL_POSPAD 2
458#define DAC_OPA2MUX_POSSEL_OPA1INP 3
459#define DAC_OPA2MUX_POSSEL_OPATAP 4
460
461/* DAC0 */
462#define DAC0 DAC0_BASE
463#define DAC0_CTRL DAC_CTRL(DAC0)
464#define DAC0_STATUS DAC_STATUS(DAC0)
465#define DAC0_CH0CTRL DAC_CH0CTRL(DAC0)
466#define DAC0_CH1CTRL DAC_CH1CTRL(DAC0)
467#define DAC0_IEN DAC_IEN(DAC0)
468#define DAC0_IF DAC_IF(DAC0)
469#define DAC0_IFS DAC_IFS(DAC0)
470#define DAC0_IFC DAC_IFC(DAC0)
471#define DAC0_CH0DATA DAC_CH0DATA(DAC0)
472#define DAC0_CH1DATA DAC_CH1DATA(DAC0)
473#define DAC0_COMBDATA DAC_COMBDATA(DAC0)
474#define DAC0_CAL DAC_CAL(DAC0)
475#define DAC0_BIASPROG DAC_BIASPROG(DAC0)
476#define DAC0_OPACTRL DAC_OPACTRL(DAC0)
477#define DAC0_OPAOFFSET DAC_OPAOFFSET(DAC0)
478#define DAC0_OPAOFFSET DAC_OPAOFFSET(DAC0)
479#define DAC0_OPA1MUX DAC_OPA1MUX(DAC0)
480#define DAC0_OPA2MUX DAC_OPA2MUX(DAC0)
481
482/** @defgroup dac_ch DAC Channel Number
483@ingroup dac_defines
484
485@{*/
486enum dac_ch {
488 DAC_CH1
490/**@}*/
491
493
494void dac_set_refresh_cycle(uint32_t dac_base, uint32_t refrsel);
495void dac_set_clock_prescaler(uint32_t dac_base, uint32_t presc);
496void dac_set_reference(uint32_t dac_base, uint32_t refsel);
497void dac_set_out_mode(uint32_t dac_base, uint32_t outmode);
498void dac_set_conversion_mode(uint32_t dac_base, uint32_t convmode);
499void dac_enable_sine(uint32_t dac_base);
500void dac_disable_sine(uint32_t dac_base);
501
502void dac_set_prs_trigger(uint32_t dac_base, enum dac_ch dac_chan,
503 enum prs_ch prs_chan);
504void dac_enable_prs_trigger(uint32_t dac_base, enum dac_ch ch);
505void dac_disable_prs_trigger(uint32_t dac_base, enum dac_ch ch);
506void dac_enable_auto_refresh(uint32_t dac_base, enum dac_ch ch);
507void dac_disable_auto_refresh(uint32_t dac_base, enum dac_ch ch);
508
509void dac_enable_channel(uint32_t dac_base, enum dac_ch ch);
510void dac_disable_channel(uint32_t dac_base, enum dac_ch ch);
511
513
514/**@}*/
#define END_DECLS
Definition: common.h:34
#define BEGIN_DECLS
Definition: common.h:33
Dispatcher for the base address definitions, depending on the particular Gecko family.
dac_ch
Definition: dac_common.h:486
@ DAC_CH1
Definition: dac_common.h:488
@ DAC_CH0
Definition: dac_common.h:487
void dac_enable_prs_trigger(uint32_t dac_base, enum dac_ch ch)
Enable PRS triggerring.
Definition: dac_common.c:120
void dac_set_clock_prescaler(uint32_t dac_base, uint32_t presc)
Set DAC clock prescaler.
Definition: dac_common.c:47
void dac_set_prs_trigger(uint32_t dac_base, enum dac_ch dac_chan, enum prs_ch prs_chan)
Set PRS trigger source on DAC channel.
Definition: dac_common.c:106
void dac_disable_auto_refresh(uint32_t dac_base, enum dac_ch ch)
Disable auto refresh.
Definition: dac_common.c:150
void dac_enable_sine(uint32_t dac_base)
Enable Sine wave on output.
Definition: dac_common.c:86
void dac_enable_auto_refresh(uint32_t dac_base, enum dac_ch ch)
Enable auto refresh.
Definition: dac_common.c:140
void dac_disable_sine(uint32_t dac_base)
Disable Sine wave on output.
Definition: dac_common.c:95
void dac_set_reference(uint32_t dac_base, uint32_t refsel)
Set DAC reference.
Definition: dac_common.c:57
void dac_set_out_mode(uint32_t dac_base, uint32_t outmode)
Set DAC output mode.
Definition: dac_common.c:67
void dac_disable_prs_trigger(uint32_t dac_base, enum dac_ch ch)
Disable PRS triggerring.
Definition: dac_common.c:130
void dac_set_conversion_mode(uint32_t dac_base, uint32_t convmode)
Set conversion mode.
Definition: dac_common.c:77
void dac_disable_channel(uint32_t dac_base, enum dac_ch ch)
Disable channel.
Definition: dac_common.c:170
void dac_set_refresh_cycle(uint32_t dac_base, uint32_t refrsel)
Set DAC refresh cycle.
Definition: dac_common.c:37
void dac_enable_channel(uint32_t dac_base, enum dac_ch ch)
Enable channel.
Definition: dac_common.c:160
prs_ch
Definition: prs_common.h:331