libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
RCC_CFGR Deprecated dividers

Older compatible definitions to ease migration. More...

Collaboration diagram for RCC_CFGR Deprecated dividers:

Macros

#define RCC_CFGR_ADCPRE_PCLK2_DIV2   0x0
 
#define RCC_CFGR_ADCPRE_PCLK2_DIV4   0x1
 
#define RCC_CFGR_ADCPRE_PCLK2_DIV6   0x2
 
#define RCC_CFGR_ADCPRE_PCLK2_DIV8   0x3
 
#define RCC_CFGR_PPRE2_HCLK_NODIV   0x0
 
#define RCC_CFGR_PPRE2_HCLK_DIV2   0x4
 
#define RCC_CFGR_PPRE2_HCLK_DIV4   0x5
 
#define RCC_CFGR_PPRE2_HCLK_DIV8   0x6
 
#define RCC_CFGR_PPRE2_HCLK_DIV16   0x7
 
#define RCC_CFGR_PPRE1_HCLK_NODIV   0x0
 
#define RCC_CFGR_PPRE1_HCLK_DIV2   0x4
 
#define RCC_CFGR_PPRE1_HCLK_DIV4   0x5
 
#define RCC_CFGR_PPRE1_HCLK_DIV8   0x6
 
#define RCC_CFGR_PPRE1_HCLK_DIV16   0x7
 
#define RCC_CFGR_HPRE_SYSCLK_NODIV   0x0
 
#define RCC_CFGR_HPRE_SYSCLK_DIV2   0x8
 
#define RCC_CFGR_HPRE_SYSCLK_DIV4   0x9
 
#define RCC_CFGR_HPRE_SYSCLK_DIV8   0xa
 
#define RCC_CFGR_HPRE_SYSCLK_DIV16   0xb
 
#define RCC_CFGR_HPRE_SYSCLK_DIV64   0xc
 
#define RCC_CFGR_HPRE_SYSCLK_DIV128   0xd
 
#define RCC_CFGR_HPRE_SYSCLK_DIV256   0xe
 
#define RCC_CFGR_HPRE_SYSCLK_DIV512   0xf
 

Detailed Description

Older compatible definitions to ease migration.

Deprecated:
Use _CFGR_xPRE_DIVn form instead, across all families

Macro Definition Documentation

◆ RCC_CFGR_ADCPRE_PCLK2_DIV2

#define RCC_CFGR_ADCPRE_PCLK2_DIV2   0x0

Definition at line 230 of file gd32/f1x0/rcc.h.

◆ RCC_CFGR_ADCPRE_PCLK2_DIV4

#define RCC_CFGR_ADCPRE_PCLK2_DIV4   0x1

Definition at line 231 of file gd32/f1x0/rcc.h.

◆ RCC_CFGR_ADCPRE_PCLK2_DIV6

#define RCC_CFGR_ADCPRE_PCLK2_DIV6   0x2

Definition at line 232 of file gd32/f1x0/rcc.h.

◆ RCC_CFGR_ADCPRE_PCLK2_DIV8

#define RCC_CFGR_ADCPRE_PCLK2_DIV8   0x3

Definition at line 233 of file gd32/f1x0/rcc.h.

◆ RCC_CFGR_HPRE_SYSCLK_DIV128

#define RCC_CFGR_HPRE_SYSCLK_DIV128   0xd

Definition at line 253 of file gd32/f1x0/rcc.h.

◆ RCC_CFGR_HPRE_SYSCLK_DIV16

#define RCC_CFGR_HPRE_SYSCLK_DIV16   0xb

Definition at line 251 of file gd32/f1x0/rcc.h.

◆ RCC_CFGR_HPRE_SYSCLK_DIV2

#define RCC_CFGR_HPRE_SYSCLK_DIV2   0x8

Definition at line 248 of file gd32/f1x0/rcc.h.

◆ RCC_CFGR_HPRE_SYSCLK_DIV256

#define RCC_CFGR_HPRE_SYSCLK_DIV256   0xe

Definition at line 254 of file gd32/f1x0/rcc.h.

◆ RCC_CFGR_HPRE_SYSCLK_DIV4

#define RCC_CFGR_HPRE_SYSCLK_DIV4   0x9

Definition at line 249 of file gd32/f1x0/rcc.h.

◆ RCC_CFGR_HPRE_SYSCLK_DIV512

#define RCC_CFGR_HPRE_SYSCLK_DIV512   0xf

Definition at line 255 of file gd32/f1x0/rcc.h.

◆ RCC_CFGR_HPRE_SYSCLK_DIV64

#define RCC_CFGR_HPRE_SYSCLK_DIV64   0xc

Definition at line 252 of file gd32/f1x0/rcc.h.

◆ RCC_CFGR_HPRE_SYSCLK_DIV8

#define RCC_CFGR_HPRE_SYSCLK_DIV8   0xa

Definition at line 250 of file gd32/f1x0/rcc.h.

◆ RCC_CFGR_HPRE_SYSCLK_NODIV

#define RCC_CFGR_HPRE_SYSCLK_NODIV   0x0

Definition at line 247 of file gd32/f1x0/rcc.h.

◆ RCC_CFGR_PPRE1_HCLK_DIV16

#define RCC_CFGR_PPRE1_HCLK_DIV16   0x7

Definition at line 245 of file gd32/f1x0/rcc.h.

◆ RCC_CFGR_PPRE1_HCLK_DIV2

#define RCC_CFGR_PPRE1_HCLK_DIV2   0x4

Definition at line 242 of file gd32/f1x0/rcc.h.

◆ RCC_CFGR_PPRE1_HCLK_DIV4

#define RCC_CFGR_PPRE1_HCLK_DIV4   0x5

Definition at line 243 of file gd32/f1x0/rcc.h.

◆ RCC_CFGR_PPRE1_HCLK_DIV8

#define RCC_CFGR_PPRE1_HCLK_DIV8   0x6

Definition at line 244 of file gd32/f1x0/rcc.h.

◆ RCC_CFGR_PPRE1_HCLK_NODIV

#define RCC_CFGR_PPRE1_HCLK_NODIV   0x0

Definition at line 241 of file gd32/f1x0/rcc.h.

◆ RCC_CFGR_PPRE2_HCLK_DIV16

#define RCC_CFGR_PPRE2_HCLK_DIV16   0x7

Definition at line 239 of file gd32/f1x0/rcc.h.

◆ RCC_CFGR_PPRE2_HCLK_DIV2

#define RCC_CFGR_PPRE2_HCLK_DIV2   0x4

Definition at line 236 of file gd32/f1x0/rcc.h.

◆ RCC_CFGR_PPRE2_HCLK_DIV4

#define RCC_CFGR_PPRE2_HCLK_DIV4   0x5

Definition at line 237 of file gd32/f1x0/rcc.h.

◆ RCC_CFGR_PPRE2_HCLK_DIV8

#define RCC_CFGR_PPRE2_HCLK_DIV8   0x6

Definition at line 238 of file gd32/f1x0/rcc.h.

◆ RCC_CFGR_PPRE2_HCLK_NODIV

#define RCC_CFGR_PPRE2_HCLK_NODIV   0x0

Definition at line 235 of file gd32/f1x0/rcc.h.