libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
Macros | Enumerations | Functions
System Control
LM4F Defines

Defined Constants and Types for the LM4F System Control More...

Collaboration diagram for System Control:

Macros

#define SYSCTL_DID0_OFFSET   0x000
 
#define SYSCTL_DID0   MMIO32(SYSCTL_BASE + SYSCTL_DID0_OFFSET)
 
#define SYSCTL_DID1_OFFSET   0x004
 
#define SYSCTL_DID1   MMIO32(SYSCTL_BASE + SYSCTL_DID1_OFFSET)
 
#define SYSCTL_PBORCTL_OFFSET   0x030
 
#define SYSCTL_PBORCTL   MMIO32(SYSCTL_BASE + SYSCTL_PBORCTL_OFFSET)
 
#define SYSCTL_LDORCTL_OFFSET   0x034
 
#define SYSCTL_LDORCTL   MMIO32(SYSCTL_BASE + SYSCTL_LDORCTL_OFFSET)
 
#define SYSCTL_RIS_OFFSET   0x050
 
#define SYSCTL_RIS   MMIO32(SYSCTL_BASE + SYSCTL_RIS_OFFSET)
 
#define SYSCTL_IMC_OFFSET   0x054
 
#define SYSCTL_IMC   MMIO32(SYSCTL_BASE + SYSCTL_IMC_OFFSET)
 
#define SYSCTL_MISC_OFFSET   0x058
 
#define SYSCTL_MISC   MMIO32(SYSCTL_BASE + SYSCTL_MISC_OFFSET)
 
#define SYSCTL_RESC_OFFSET   0x05C
 
#define SYSCTL_RESC   MMIO32(SYSCTL_BASE + SYSCTL_RESC_OFFSET)
 
#define SYSCTL_RCC_OFFSET   0x060
 
#define SYSCTL_RCC   MMIO32(SYSCTL_BASE + SYSCTL_RCC_OFFSET)
 
#define SYSCTL_PLLCFG_OFFSET   0x064
 
#define SYSCTL_PLLCFG   MMIO32(SYSCTL_BASE + SYSCTL_PLLCFG_OFFSET)
 
#define SYSCTL_GPIOHBCTL_OFFSET   0x06C
 
#define SYSCTL_GPIOHBCTL   MMIO32(SYSCTL_BASE + SYSCTL_GPIOHBCTL_OFFSET)
 
#define SYSCTL_RCC2_OFFSET   0x070
 
#define SYSCTL_RCC2   MMIO32(SYSCTL_BASE + SYSCTL_RCC2_OFFSET)
 
#define SYSCTL_MOSCCTL_OFFSET   0x07C
 
#define SYSCTL_MOSCCTL   MMIO32(SYSCTL_BASE + SYSCTL_MOSCCTL_OFFSET)
 
#define SYSCTL_DSLPCLKCFG_OFFSET   0x144
 
#define SYSCTL_DSLPCLKCFG   MMIO32(SYSCTL_BASE + SYSCTL_DSLPCLKCFG_OFFSET)
 
#define SYSCTL_SYSPROP_OFFSET   0x14C
 
#define SYSCTL_SYSPROP   MMIO32(SYSCTL_BASE + SYSCTL_SYSPROP_OFFSET)
 
#define SYSCTL_PIOSCCAL_OFFSET   0x150
 
#define SYSCTL_PIOSCCAL   MMIO32(SYSCTL_BASE + SYSCTL_PIOSCCAL_OFFSET)
 
#define SYSCTL_PIOSCSTAT_OFFSET   0x154
 
#define SYSCTL_PIOSCSTAT   MMIO32(SYSCTL_BASE + SYSCTL_PIOSCSTAT_OFFSET)
 
#define SYSCTL_PLLFREQ0_OFFSET   0x160
 
#define SYSCTL_PLLFREQ0   MMIO32(SYSCTL_BASE + SYSCTL_PLLFREQ0_OFFSET)
 
#define SYSCTL_PLLFREQ1_OFFSET   0x164
 
#define SYSCTL_PLLFREQ1   MMIO32(SYSCTL_BASE + SYSCTL_PLLFREQ1_OFFSET)
 
#define SYSCTL_PLLSTAT_OFFSET   0x168
 
#define SYSCTL_PLLSTAT   MMIO32(SYSCTL_BASE + SYSCTL_PLLSTAT_OFFSET)
 
#define SYSCTL_PPWD_OFFSET   0x300
 
#define SYSCTL_PPWD   MMIO32(SYSCTL_BASE + SYSCTL_PPWD_OFFSET)
 
#define SYSCTL_PPTIMER_OFFSET   0x304
 
#define SYSCTL_PPTIMER   MMIO32(SYSCTL_BASE + SYSCTL_PPTIMER_OFFSET)
 
#define SYSCTL_PPGPIO_OFFSET   0x308
 
#define SYSCTL_PPGPIO   MMIO32(SYSCTL_BASE + SYSCTL_PPGPIO_OFFSET)
 
#define SYSCTL_PPDMA_OFFSET   0x30C
 
#define SYSCTL_PPDMA   MMIO32(SYSCTL_BASE + SYSCTL_PPDMA_OFFSET)
 
#define SYSCTL_PPHIB_OFFSET   0x314
 
#define SYSCTL_PPHIB   MMIO32(SYSCTL_BASE + SYSCTL_PPHIB_OFFSET)
 
#define SYSCTL_PPUART_OFFSET   0x318
 
#define SYSCTL_PPUART   MMIO32(SYSCTL_BASE + SYSCTL_PPUART_OFFSET)
 
#define SYSCTL_PPSSI_OFFSET   0x31C
 
#define SYSCTL_PPSSI   MMIO32(SYSCTL_BASE + SYSCTL_PPSSI_OFFSET)
 
#define SYSCTL_PPI2C_OFFSET   0x320
 
#define SYSCTL_PPI2C   MMIO32(SYSCTL_BASE + SYSCTL_PPI2C_OFFSET)
 
#define SYSCTL_PPUSB_OFFSET   0x328
 
#define SYSCTL_PPUSB   MMIO32(SYSCTL_BASE + SYSCTL_PPUSB_OFFSET)
 
#define SYSCTL_PPCAN_OFFSET   0x334
 
#define SYSCTL_PPCAN   MMIO32(SYSCTL_BASE + SYSCTL_PPCAN_OFFSET)
 
#define SYSCTL_PPADC_OFFSET   0x338
 
#define SYSCTL_PPADC   MMIO32(SYSCTL_BASE + SYSCTL_PPADC_OFFSET)
 
#define SYSCTL_PPACMP_OFFSET   0x33C
 
#define SYSCTL_PPACMP   MMIO32(SYSCTL_BASE + SYSCTL_PPACMP_OFFSET)
 
#define SYSCTL_PPPWM_OFFSET   0x340
 
#define SYSCTL_PPPWM   MMIO32(SYSCTL_BASE + SYSCTL_PPPWM_OFFSET)
 
#define SYSCTL_PPQEI_OFFSET   0x344
 
#define SYSCTL_PPQEI   MMIO32(SYSCTL_BASE + SYSCTL_PPQEI_OFFSET)
 
#define SYSCTL_PPEEPROM_OFFSET   0x358
 
#define SYSCTL_PPEEPROM   MMIO32(SYSCTL_BASE + SYSCTL_PPEEPROM_OFFSET)
 
#define SYSCTL_PPWTIMER_OFFSET   0x35C
 
#define SYSCTL_PPWTIMER   MMIO32(SYSCTL_BASE + SYSCTL_PPWTIMER_OFFSET)
 
#define SYSCTL_SRWD_OFFSET   0x500
 
#define SYSCTL_SRWD   MMIO32(SYSCTL_BASE + SYSCTL_SRWD_OFFSET)
 
#define SYSCTL_SRTIMER_OFFSET   0x504
 
#define SYSCTL_SRTIMER   MMIO32(SYSCTL_BASE + SYSCTL_SRTIMER_OFFSET)
 
#define SYSCTL_SRGPIO_OFFSET   0x508
 
#define SYSCTL_SRGPIO   MMIO32(SYSCTL_BASE + SYSCTL_SRGPIO_OFFSET)
 
#define SYSCTL_SRDMA_OFFSET   0x50C
 
#define SYSCTL_SRDMA   MMIO32(SYSCTL_BASE + SYSCTL_SRDMA_OFFSET)
 
#define SYSCTL_SRHIB_OFFSET   0x514
 
#define SYSCTL_SRHIB   MMIO32(SYSCTL_BASE + SYSCTL_SRHIB_OFFSET)
 
#define SYSCTL_SRUART_OFFSET   0x518
 
#define SYSCTL_SRUART   MMIO32(SYSCTL_BASE + SYSCTL_SRUART_OFFSET)
 
#define SYSCTL_SRSSI_OFFSET   0x51C
 
#define SYSCTL_SRSSI   MMIO32(SYSCTL_BASE + SYSCTL_SRSSI_OFFSET)
 
#define SYSCTL_SRI2C_OFFSET   0x520
 
#define SYSCTL_SRI2C   MMIO32(SYSCTL_BASE + SYSCTL_SRI2C_OFFSET)
 
#define SYSCTL_SRUSB_OFFSET   0x528
 
#define SYSCTL_SRUSB   MMIO32(SYSCTL_BASE + SYSCTL_SRUSB_OFFSET)
 
#define SYSCTL_SRCAN_OFFSET   0x534
 
#define SYSCTL_SRCAN   MMIO32(SYSCTL_BASE + SYSCTL_SRCAN_OFFSET)
 
#define SYSCTL_SRADC_OFFSET   0x538
 
#define SYSCTL_SRADC   MMIO32(SYSCTL_BASE + SYSCTL_SRADC_OFFSET)
 
#define SYSCTL_SRACMP_OFFSET   0x53C
 
#define SYSCTL_SRACMP   MMIO32(SYSCTL_BASE + SYSCTL_SRACMP_OFFSET)
 
#define SYSCTL_SRPWM_OFFSET   0x540
 
#define SYSCTL_SRPWM   MMIO32(SYSCTL_BASE + SYSCTL_SRPWM_OFFSET)
 
#define SYSCTL_SRQEI_OFFSET   0x544
 
#define SYSCTL_SRQEI   MMIO32(SYSCTL_BASE + SYSCTL_SRQEI_OFFSET)
 
#define SYSCTL_SREEPROM_OFFSET   0x558
 
#define SYSCTL_SREEPROM   MMIO32(SYSCTL_BASE + SYSCTL_SREEPROM_OFFSET)
 
#define SYSCTL_SRWTIMER_OFFSET   0x55C
 
#define SYSCTL_SRWTIMER   MMIO32(SYSCTL_BASE + SYSCTL_SRWTIMER_OFFSET)
 
#define SYSCTL_RCGCWD_OFFSET   0x600
 
#define SYSCTL_RCGCWD   MMIO32(SYSCTL_BASE + SYSCTL_RCGCWD_OFFSET)
 
#define SYSCTL_RCGCTIMER_OFFSET   0x604
 
#define SYSCTL_RCGCTIMER   MMIO32(SYSCTL_BASE + SYSCTL_RCGCTIMER_OFFSET)
 
#define SYSCTL_RCGCGPIO_OFFSET   0x608
 
#define SYSCTL_RCGCGPIO   MMIO32(SYSCTL_BASE + SYSCTL_RCGCGPIO_OFFSET)
 
#define SYSCTL_RCGCDMA_OFFSET   0x60C
 
#define SYSCTL_RCGCDMA   MMIO32(SYSCTL_BASE + SYSCTL_RCGCDMA_OFFSET)
 
#define SYSCTL_RCGCHIB_OFFSET   0x614
 
#define SYSCTL_RCGCHIB   MMIO32(SYSCTL_BASE + SYSCTL_RCGCHIB_OFFSET)
 
#define SYSCTL_RCGCUART_OFFSET   0x618
 
#define SYSCTL_RCGCUART   MMIO32(SYSCTL_BASE + SYSCTL_RCGCUART_OFFSET)
 
#define SYSCTL_RCGCSSI_OFFSET   0x61C
 
#define SYSCTL_RCGCSSI   MMIO32(SYSCTL_BASE + SYSCTL_RCGCSSI_OFFSET)
 
#define SYSCTL_RCGCI2C_OFFSET   0x620
 
#define SYSCTL_RCGCI2C   MMIO32(SYSCTL_BASE + SYSCTL_RCGCI2C_OFFSET)
 
#define SYSCTL_RCGCUSB_OFFSET   0x628
 
#define SYSCTL_RCGCUSB   MMIO32(SYSCTL_BASE + SYSCTL_RCGCUSB_OFFSET)
 
#define SYSCTL_RCGCCAN_OFFSET   0x634
 
#define SYSCTL_RCGCCAN   MMIO32(SYSCTL_BASE + SYSCTL_RCGCCAN_OFFSET)
 
#define SYSCTL_RCGCADC_OFFSET   0x638
 
#define SYSCTL_RCGCADC   MMIO32(SYSCTL_BASE + SYSCTL_RCGCADC_OFFSET)
 
#define SYSCTL_RCGCACMP_OFFSET   0x63C
 
#define SYSCTL_RCGCACMP   MMIO32(SYSCTL_BASE + SYSCTL_RCGCACMP_OFFSET)
 
#define SYSCTL_RCGCPWM_OFFSET   0x640
 
#define SYSCTL_RCGCPWM   MMIO32(SYSCTL_BASE + SYSCTL_RCGCPWM_OFFSET)
 
#define SYSCTL_RCGCQEI_OFFSET   0x644
 
#define SYSCTL_RCGCQEI   MMIO32(SYSCTL_BASE + SYSCTL_RCGCQEI_OFFSET)
 
#define SYSCTL_RCGCEEPROM_OFFSET   0x658
 
#define SYSCTL_RCGCEEPROM   MMIO32(SYSCTL_BASE + SYSCTL_RCGCEEPROM_OFFSET)
 
#define SYSCTL_RCGCWTIMER_OFFSET   0x65C
 
#define SYSCTL_RCGCWTIMER   MMIO32(SYSCTL_BASE + SYSCTL_RCGCWTIMER_OFFSET)
 
#define SYSCTL_SCGCWD_OFFSET   0x700
 
#define SYSCTL_SCGCWD   MMIO32(SYSCTL_BASE + SYSCTL_SCGCWD_OFFSET)
 
#define SYSCTL_SCGCTIMER_OFFSET   0x704
 
#define SYSCTL_SCGCTIMER   MMIO32(SYSCTL_BASE + SYSCTL_SCGCTIMER_OFFSET)
 
#define SYSCTL_SCGCGPIO_OFFSET   0x708
 
#define SYSCTL_SCGCGPIO   MMIO32(SYSCTL_BASE + SYSCTL_SCGCGPIO_OFFSET)
 
#define SYSCTL_SCGCDMA_OFFSET   0x70C
 
#define SYSCTL_SCGCDMA   MMIO32(SYSCTL_BASE + SYSCTL_SCGCDMA_OFFSET)
 
#define SYSCTL_SCGCHIB_OFFSET   0x714
 
#define SYSCTL_SCGCHIB   MMIO32(SYSCTL_BASE + SYSCTL_SCGCHIB_OFFSET)
 
#define SYSCTL_SCGCUART_OFFSET   0x718
 
#define SYSCTL_SCGCUART   MMIO32(SYSCTL_BASE + SYSCTL_SCGCUART_OFFSET)
 
#define SYSCTL_SCGCSSI_OFFSET   0x71C
 
#define SYSCTL_SCGCSSI   MMIO32(SYSCTL_BASE + SYSCTL_SCGCSSI_OFFSET)
 
#define SYSCTL_SCGCI2C_OFFSET   0x720
 
#define SYSCTL_SCGCI2C   MMIO32(SYSCTL_BASE + SYSCTL_SCGCI2C_OFFSET)
 
#define SYSCTL_SCGCUSB_OFFSET   0x728
 
#define SYSCTL_SCGCUSB   MMIO32(SYSCTL_BASE + SYSCTL_SCGCUSB_OFFSET)
 
#define SYSCTL_SCGCCAN_OFFSET   0x734
 
#define SYSCTL_SCGCCAN   MMIO32(SYSCTL_BASE + SYSCTL_SCGCCAN_OFFSET)
 
#define SYSCTL_SCGCADC_OFFSET   0x738
 
#define SYSCTL_SCGCADC   MMIO32(SYSCTL_BASE + SYSCTL_SCGCADC_OFFSET)
 
#define SYSCTL_SCGCACMP_OFFSET   0x73C
 
#define SYSCTL_SCGCACMP   MMIO32(SYSCTL_BASE + SYSCTL_SCGCACMP_OFFSET)
 
#define SYSCTL_SCGCPWM_OFFSET   0x740
 
#define SYSCTL_SCGCPWM   MMIO32(SYSCTL_BASE + SYSCTL_SCGCPWM_OFFSET)
 
#define SYSCTL_SCGCQEI_OFFSET   0x744
 
#define SYSCTL_SCGCQEI   MMIO32(SYSCTL_BASE + SYSCTL_SCGCQEI_OFFSET)
 
#define SYSCTL_SCGCEEPROM_OFFSET   0x758
 
#define SYSCTL_SCGCEEPROM   MMIO32(SYSCTL_BASE + SYSCTL_SCGCEEPROM_OFFSET)
 
#define SYSCTL_SCGCWTIMER_OFFSET   0x75C
 
#define SYSCTL_SCGCWTIMER   MMIO32(SYSCTL_BASE + SYSCTL_SCGCWTIMER_OFFSET)
 
#define SYSCTL_DCGCWD_OFFSET   0x800
 
#define SYSCTL_DCGCWD   MMIO32(SYSCTL_BASE + SYSCTL_DCGCWD_OFFSET)
 
#define SYSCTL_DCGCTIMER_OFFSET   0x804
 
#define SYSCTL_DCGCTIMER   MMIO32(SYSCTL_BASE + SYSCTL_DCGCTIMER_OFFSET)
 
#define SYSCTL_DCGCGPIO_OFFSET   0x808
 
#define SYSCTL_DCGCGPIO   MMIO32(SYSCTL_BASE + SYSCTL_DCGCGPIO_OFFSET)
 
#define SYSCTL_DCGCDMA_OFFSET   0x80C
 
#define SYSCTL_DCGCDMA   MMIO32(SYSCTL_BASE + SYSCTL_DCGCDMA_OFFSET)
 
#define SYSCTL_DCGCHIB_OFFSET   0x814
 
#define SYSCTL_DCGCHIB   MMIO32(SYSCTL_BASE + SYSCTL_DCGCHIB_OFFSET)
 
#define SYSCTL_DCGCUART_OFFSET   0x818
 
#define SYSCTL_DCGCUART   MMIO32(SYSCTL_BASE + SYSCTL_DCGCUART_OFFSET)
 
#define SYSCTL_DCGCSSI_OFFSET   0x81C
 
#define SYSCTL_DCGCSSI   MMIO32(SYSCTL_BASE + SYSCTL_DCGCSSI_OFFSET)
 
#define SYSCTL_DCGCI2C_OFFSET   0x820
 
#define SYSCTL_DCGCI2C   MMIO32(SYSCTL_BASE + SYSCTL_DCGCI2C_OFFSET)
 
#define SYSCTL_DCGCUSB_OFFSET   0x828
 
#define SYSCTL_DCGCUSB   MMIO32(SYSCTL_BASE + SYSCTL_DCGCUSB_OFFSET)
 
#define SYSCTL_DCGCCAN_OFFSET   0x834
 
#define SYSCTL_DCGCCAN   MMIO32(SYSCTL_BASE + SYSCTL_DCGCCAN_OFFSET)
 
#define SYSCTL_DCGCADC_OFFSET   0x838
 
#define SYSCTL_DCGCADC   MMIO32(SYSCTL_BASE + SYSCTL_DCGCADC_OFFSET)
 
#define SYSCTL_DCGCACMP_OFFSET   0x83C
 
#define SYSCTL_DCGCACMP   MMIO32(SYSCTL_BASE + SYSCTL_DCGCACMP_OFFSET)
 
#define SYSCTL_DCGCPWM_OFFSET   0x840
 
#define SYSCTL_DCGCPWM   MMIO32(SYSCTL_BASE + SYSCTL_DCGCPWM_OFFSET)
 
#define SYSCTL_DCGCQEI_OFFSET   0x844
 
#define SYSCTL_DCGCQEI   MMIO32(SYSCTL_BASE + SYSCTL_DCGCQEI_OFFSET)
 
#define SYSCTL_DCGCEEPROM_OFFSET   0x858
 
#define SYSCTL_DCGCEEPROM   MMIO32(SYSCTL_BASE + SYSCTL_DCGCEEPROM_OFFSET)
 
#define SYSCTL_DCGCWTIMER_OFFSET   0x85C
 
#define SYSCTL_DCGCWTIMER   MMIO32(SYSCTL_BASE + SYSCTL_DCGCWTIMER_OFFSET)
 
#define SYSCTL_PRWD_OFFSET   0xA00
 
#define SYSCTL_PRWD   MMIO32(SYSCTL_BASE + SYSCTL_PRWD_OFFSET)
 
#define SYSCTL_PRTIMER_OFFSET   0xA04
 
#define SYSCTL_PRTIMER   MMIO32(SYSCTL_BASE + SYSCTL_PRTIMER_OFFSET)
 
#define SYSCTL_PRGPIO_OFFSET   0xA08
 
#define SYSCTL_PRGPIO   MMIO32(SYSCTL_BASE + SYSCTL_PRGPIO_OFFSET)
 
#define SYSCTL_PRDMA_OFFSET   0xA0C
 
#define SYSCTL_PRDMA   MMIO32(SYSCTL_BASE + SYSCTL_PRDMA_OFFSET)
 
#define SYSCTL_PRHIB_OFFSET   0xA14
 
#define SYSCTL_PRHIB   MMIO32(SYSCTL_BASE + SYSCTL_PRHIB_OFFSET)
 
#define SYSCTL_PRUART_OFFSET   0xA18
 
#define SYSCTL_PRUART   MMIO32(SYSCTL_BASE + SYSCTL_PRUART_OFFSET)
 
#define SYSCTL_PRSSI_OFFSET   0xA1C
 
#define SYSCTL_PRSSI   MMIO32(SYSCTL_BASE + SYSCTL_PRSSI_OFFSET)
 
#define SYSCTL_PRI2C_OFFSET   0xA20
 
#define SYSCTL_PRI2C   MMIO32(SYSCTL_BASE + SYSCTL_PRI2C_OFFSET)
 
#define SYSCTL_PRUSB_OFFSET   0xA28
 
#define SYSCTL_PRUSB   MMIO32(SYSCTL_BASE + SYSCTL_PRUSB_OFFSET)
 
#define SYSCTL_PRCAN_OFFSET   0xA34
 
#define SYSCTL_PRCAN   MMIO32(SYSCTL_BASE + SYSCTL_PRCAN_OFFSET)
 
#define SYSCTL_PRADC_OFFSET   0xA38
 
#define SYSCTL_PRADC   MMIO32(SYSCTL_BASE + SYSCTL_PRADC_OFFSET)
 
#define SYSCTL_PRACMP_OFFSET   0xA3C
 
#define SYSCTL_PRACMP   MMIO32(SYSCTL_BASE + SYSCTL_PRACMP_OFFSET)
 
#define SYSCTL_PRPWM_OFFSET   0xA40
 
#define SYSCTL_PRPWM   MMIO32(SYSCTL_BASE + SYSCTL_PRPWM_OFFSET)
 
#define SYSCTL_PRQEI_OFFSET   0xA44
 
#define SYSCTL_PRQEI   MMIO32(SYSCTL_BASE + SYSCTL_PRQEI_OFFSET)
 
#define SYSCTL_PREEPROM_OFFSET   0xA58
 
#define SYSCTL_PREEPROM   MMIO32(SYSCTL_BASE + SYSCTL_PREEPROM_OFFSET)
 
#define SYSCTL_PRWTIMER_OFFSET   0xA5C
 
#define SYSCTL_PRWTIMER   MMIO32(SYSCTL_BASE + SYSCTL_PRWTIMER_OFFSET)
 
#define SYSCTL_DID0_VER_MASK   (7 << 28)
 DID0 version. More...
 
#define SYSCTL_DID0_CLASS_MASK   (0xFF << 16)
 Device class. More...
 
#define SYSCTL_DID0_MAJOR_MASK   (0xFF << 8)
 Major revision. More...
 
#define SYSCTL_DID0_MAJOR_MASK   (0xFF << 8)
 Major revision. More...
 
#define SYSCTL_DID1_VER_MASK   (0xF << 28)
 DID1 version. More...
 
#define SYSCTL_DID1_FAM_MASK   (0xF << 24)
 Family. More...
 
#define SYSCTL_DID1_PARTNO_MASK   (0xFF << 16)
 Part number. More...
 
#define SYSCTL_DID1_PINCOUNT_MASK   (0x7 << 13)
 Pin count. More...
 
#define SYSCTL_DID1_PINCOUNT_28P   (0x0 << 13)
 
#define SYSCTL_DID1_PINCOUNT_48P   (0x1 << 13)
 
#define SYSCTL_DID1_PINCOUNT_100P   (0x2 << 13)
 
#define SYSCTL_DID1_PINCOUNT_64P   (0x3 << 13)
 
#define SYSCTL_DID1_PINCOUNT_144P   (0x4 << 13)
 
#define SYSCTL_DID1_PINCOUNT_157P   (0x5 << 13)
 
#define SYSCTL_DID1_TEMP_MASK   (0x7 << 5)
 Temperature range. More...
 
#define SYSCTL_DID1_TEMP_0_70   (0x0 << 5)
 
#define SYSCTL_DID1_TEMP_M40_85   (0x1 << 5)
 
#define SYSCTL_DID1_TEMP_M40_105   (0x2 << 5)
 
#define SYSCTL_DID1_PKG_MASK   (0x3 << 5)
 Package. More...
 
#define SYSCTL_DID1_PKG_SOIC   (0x0 << 5)
 
#define SYSCTL_DID1_PKG_LQFP   (0x1 << 5)
 
#define SYSCTL_DID1_PKG_BGA   (0x2 << 5)
 
#define SYSCTL_DID1_ROHS   (1 << 2)
 ROHS compliance. More...
 
#define SYSCTL_DID1_QUAL_MASK   (3 << 0)
 Qualification status. More...
 
#define SYSCTL_PBORCTL_BORIOR   (1 << 1)
 BOR interrupt or reset. More...
 
#define SYSCTL_RIS_MOSCPUPRIS   (1 << 8)
 MOSC Power Up Raw Interrupt Status. More...
 
#define SYSCTL_RIS_USBPLLLRIS   (1 << 7)
 USB PLL Lock Raw Interrupt Status. More...
 
#define SYSCTL_RIS_PLLLRIS   (1 << 6)
 PLL Lock Raw Interrupt Status. More...
 
#define SYSCTL_RIS_MOFRIS   (1 << 3)
 Main Oscillator Failure Raw Interrupt Status. More...
 
#define SYSCTL_RIS_BORRIS   (1 << 1)
 Brown-Out Reset Raw Interrupt Status. More...
 
#define SYSCTL_IMC_MOSCPUPIM   (1 << 8)
 MOSC Power Up Raw Interrupt Status. More...
 
#define SYSCTL_IMC_USBPLLLIM   (1 << 7)
 USB PLL Lock Raw Interrupt Status. More...
 
#define SYSCTL_IMC_PLLLIM   (1 << 6)
 PLL Lock Raw Interrupt Status. More...
 
#define SYSCTL_IMC_MOFIM   (1 << 3)
 Main Oscillator Failure Raw Interrupt Status. More...
 
#define SYSCTL_IMC_BORIM   (1 << 1)
 Brown-Out Reset Raw Interrupt Status. More...
 
#define SYSCTL_MISC_MOSCPUPMIS   (1 << 8)
 MOSC Power Up Raw Interrupt Status. More...
 
#define SYSCTL_MISC_USBPLLLMIS   (1 << 7)
 USB PLL Lock Raw Interrupt Status. More...
 
#define SYSCTL_MISC_PLLLMIS   (1 << 6)
 PLL Lock Raw Interrupt Status. More...
 
#define SYSCTL_MISC_MOFMIS   (1 << 3)
 Main Oscillator Failure Raw Interrupt Status. More...
 
#define SYSCTL_MISC_BORMIS   (1 << 1)
 Brown-Out Reset Raw Interrupt Status. More...
 
#define SYSCTL_RESC_MOSCFAIL   (1 << 18)
 MOSC Failure Reset. More...
 
#define SYSCTL_RESC_WDT1   (1 << 5)
 Watchdog Timer 1 Reset. More...
 
#define SYSCTL_RESC_SW   (1 << 4)
 Software Reset. More...
 
#define SYSCTL_RESC_WDT0   (1 << 3)
 Watchdog Timer 0 Reset. More...
 
#define SYSCTL_RESC_BOR   (1 << 2)
 Brown-Out Reset. More...
 
#define SYSCTL_RESC_POR   (1 << 1)
 Power-On Reset. More...
 
#define SYSCTL_RESC_EXT   (1 << 0)
 External Reset. More...
 
#define SYSCTL_RCC_ACG   (1 << 27)
 Auto Clock Gating. More...
 
#define SYSCTL_RCC_SYSDIV_MASK   (0xF << 23)
 System Clock Divisor. More...
 
#define SYSCTL_RCC_USESYSDIV   (1 << 22)
 Enable System Clock Divider. More...
 
#define SYSCTL_RCC_USEPWMDIV   (1 << 20)
 Enable PWM Clock Divisor. More...
 
#define SYSCTL_RCC_PWMDIV_MASK   (0xF << 17)
 PWM Unit Clock Divisor. More...
 
#define SYSCTL_RCC_PWMDIV_2   (0x0 << 17)
 
#define SYSCTL_RCC_PWMDIV_4   (0x1 << 17)
 
#define SYSCTL_RCC_PWMDIV_8   (0x2 << 17)
 
#define SYSCTL_RCC_PWMDIV_16   (0x3 << 17)
 
#define SYSCTL_RCC_PWMDIV_32   (0x4 << 17)
 
#define SYSCTL_RCC_PWMDIV_64   (0x5 << 17)
 
#define SYSCTL_RCC_PWRDN   (1 << 13)
 PLL Power Down. More...
 
#define SYSCTL_RCC_BYPASS   (1 << 11)
 PLL Bypass. More...
 
#define SYSCTL_RCC_XTAL_MASK   (0x1F << 6)
 Crystal Value. More...
 
#define SYSCTL_RCC_XTAL_4M   (0x06 << 6)
 
#define SYSCTL_RCC_XTAL_4M_096   (0x07 << 6)
 
#define SYSCTL_RCC_XTAL_4M_9152   (0x08 << 6)
 
#define SYSCTL_RCC_XTAL_5M   (0x09 << 6)
 
#define SYSCTL_RCC_XTAL_5M_12   (0x0A << 6)
 
#define SYSCTL_RCC_XTAL_6M   (0x0B << 6)
 
#define SYSCTL_RCC_XTAL_6M_144   (0x0C << 6)
 
#define SYSCTL_RCC_XTAL_7M_3728   (0x0D << 6)
 
#define SYSCTL_RCC_XTAL_8M   (0x0E << 6)
 
#define SYSCTL_RCC_XTAL_8M_192   (0x0F << 6)
 
#define SYSCTL_RCC_XTAL_10M   (0x10 << 6)
 
#define SYSCTL_RCC_XTAL_12M   (0x11 << 6)
 
#define SYSCTL_RCC_XTAL_12M_288   (0x12 << 6)
 
#define SYSCTL_RCC_XTAL_13M_56   (0x13 << 6)
 
#define SYSCTL_RCC_XTAL_14M_31818   (0x14 << 6)
 
#define SYSCTL_RCC_XTAL_16M   (0x15 << 6)
 
#define SYSCTL_RCC_XTAL_16M_384   (0x16 << 6)
 
#define SYSCTL_RCC_XTAL_18M   (0x17 << 6)
 
#define SYSCTL_RCC_XTAL_20M   (0x18 << 6)
 
#define SYSCTL_RCC_XTAL_24M   (0x19 << 6)
 
#define SYSCTL_RCC_XTAL_25M   (0x1A << 6)
 
#define SYSCTL_RCC_OSCSRC_MASK   (0x3 << 4)
 Oscillator Source. More...
 
#define SYSCTL_RCC_OSCSRC_MOSC   (0x0 << 4)
 
#define SYSCTL_RCC_OSCSRC_PIOSC   (0x1 << 4)
 
#define SYSCTL_RCC_OSCSRC_PIOSC_D4   (0x2 << 4)
 
#define SYSCTL_RCC_OSCSRC_30K   (0x3 << 4)
 
#define SYSCTL_RCC_IOSCDIS   (1 << 1)
 Precision Internal Oscillator Disable. More...
 
#define SYSCTL_RCC_MOSCDIS   (1 << 0)
 Main Oscillator Disable. More...
 
#define SYSCTL_GPIOHBCTL_PORTQ   (1 << 14)
 
#define SYSCTL_GPIOHBCTL_PORTP   (1 << 13)
 
#define SYSCTL_GPIOHBCTL_PORTN   (1 << 12)
 
#define SYSCTL_GPIOHBCTL_PORTM   (1 << 11)
 
#define SYSCTL_GPIOHBCTL_PORTL   (1 << 10)
 
#define SYSCTL_GPIOHBCTL_PORTK   (1 << 9)
 
#define SYSCTL_GPIOHBCTL_PORTJ   (1 << 8)
 
#define SYSCTL_GPIOHBCTL_PORTH   (1 << 7)
 
#define SYSCTL_GPIOHBCTL_PORTG   (1 << 6)
 
#define SYSCTL_GPIOHBCTL_PORTF   (1 << 5)
 
#define SYSCTL_GPIOHBCTL_PORTE   (1 << 4)
 
#define SYSCTL_GPIOHBCTL_PORTD   (1 << 3)
 
#define SYSCTL_GPIOHBCTL_PORTC   (1 << 2)
 
#define SYSCTL_GPIOHBCTL_PORTB   (1 << 1)
 
#define SYSCTL_GPIOHBCTL_PORTA   (1 << 0)
 
#define SYSCTL_RCC2_USERCC2   (1 << 31)
 RCC2 overides RCC. More...
 
#define SYSCTL_RCC2_DIV400   (1 << 30)
 Divide PLL as 400 MHz vs. More...
 
#define SYSCTL_RCC2_ACG   (1 << 27)
 Auto Clock Gating. More...
 
#define SYSCTL_RCC2_SYSDIV2_MASK   (0x3F << 23)
 System Clock Divisor 2. More...
 
#define SYSCTL_RCC2_SYSDIV2LSB   (1 << 22)
 Additional LSB for SYSDIV2. More...
 
#define SYSCTL_RCC2_SYSDIV400_MASK   (0x7F << 22)
 System clock divisor mask when RCC2_DIV400 is set. More...
 
#define SYSCTL_RCC2_USBPWRDN   (1 << 14)
 Power-Down USB PLL. More...
 
#define SYSCTL_RCC2_PWRDN2   (1 << 13)
 PLL Power Down 2. More...
 
#define SYSCTL_RCC2_BYPASS2   (1 << 11)
 PLL Bypass 2. More...
 
#define SYSCTL_RCC2_OSCSRC2_MASK   (0x7 << 4)
 Oscillator Source 2. More...
 
#define SYSCTL_RCC2_OSCSRC2_MOSC   (0x0 << 4)
 
#define SYSCTL_RCC2_OSCSRC2_PIOSC   (0x1 << 4)
 
#define SYSCTL_RCC2_OSCSRC2_PIOSC_D4   (0x2 << 4)
 
#define SYSCTL_RCC2_OSCSRC2_30K   (0x3 << 4)
 
#define SYSCTL_RCC2_OSCSRC2_32K768   (0x7 << 4)
 
#define SYSCTL_MOSCCTL_NOXTAL   (1 << 2)
 No Crystal Connected. More...
 
#define SYSCTL_MOSCCTL_MOSCIM   (1 << 1)
 MOSC Failure Action. More...
 
#define SYSCTL_MOSCCTL_CVAL   (1 << 0)
 Clock Validation for MOSC. More...
 
#define SYSCTL_SYSPROP_FPU   (1 << 0)
 FPU present. More...
 
#define SYSCTL_PIOSCCAL_UTEN   (1 << 31)
 Use User Trim Value. More...
 
#define SYSCTL_PIOSCCAL_CAL   (1 << 9)
 Start calibration. More...
 
#define SYSCTL_PIOSCCAL_UPDATE   (1 << 8)
 Update trim. More...
 
#define SYSCTL_PIOSCCAL_UT_MASK   (0x7F << 0)
 User Trim Value. More...
 
#define SYSCTL_PIOSCSTAT_DT_MASK   (0x7F << 16)
 Default Trim Value. More...
 
#define SYSCTL_PIOSCSTAT_RESULT_MASK   (0x3 << 8)
 Calibration result. More...
 
#define SYSCTL_PIOSCSTAT_CT_MASK   (0x7F << 0)
 Calibration Trim Value. More...
 
#define SYSCTL_PLLFREQ0_MFRAC_MASK   (0x3FF << 10)
 PLL M fractional value. More...
 
#define SYSCTL_PLLFREQ0_MINT_MASK   (0x3FF << 0)
 PLL M integer value. More...
 
#define SYSCTL_PLLFREQ1_Q_MASK   (0x1F << 8)
 PLL Q value. More...
 
#define SYSCTL_PLLFREQ1_N_MASK   (0x1F << 0)
 PLL N value. More...
 
#define SYSCTL_PLLSTAT_LOCK   (1 << 0)
 PLL lock. More...
 

Enumerations

enum  lm4f_clken {
  RCC_WD0 = SYSCTL_RCGCWD_OFFSET << 5 , RCC_WD1 , RCC_TIMER0 = SYSCTL_RCGCTIMER_OFFSET << 5 , RCC_TIMER1 ,
  RCC_TIMER2 , RCC_TIMER3 , RCC_TIMER4 , RCC_TIMER5 ,
  RCC_GPIOA = SYSCTL_RCGCGPIO_OFFSET << 5 , RCC_GPIOB , RCC_GPIOC , RCC_GPIOD ,
  RCC_GPIOE , RCC_GPIOF , RCC_GPIOG , RCC_GPIOH ,
  RCC_GPIOJ , RCC_GPIOK , RCC_GPIOL , RCC_GPIOM ,
  RCC_GPION , RCC_GPIOP , RCC_GPIOQ , RCC_DMA = SYSCTL_RCGCDMA_OFFSET << 5 ,
  RCC_HIB = SYSCTL_RCGCGPIO_OFFSET << 5 , RCC_UART0 = SYSCTL_RCGCUART_OFFSET << 5 , RCC_UART1 , RCC_UART2 ,
  RCC_UART3 , RCC_UART4 , RCC_UART5 , RCC_UART6 ,
  RCC_UART7 , RCC_SSI0 = SYSCTL_RCGCSSI_OFFSET << 5 , RCC_SSI1 , RCC_SSI2 ,
  RCC_SSI3 , RCC_I2C0 = SYSCTL_RCGCI2C_OFFSET << 5 , RCC_I2C1 , RCC_I2C2 ,
  RCC_I2C3 , RCC_I2C4 , RCC_I2C5 , RCC_USB0 = SYSCTL_RCGCUSB_OFFSET << 5 ,
  RCC_CAN0 = SYSCTL_RCGCCAN_OFFSET << 5 , RCC_CAN1 , RCC_ADC0 = SYSCTL_RCGCADC_OFFSET << 5 , RCC_ADC1 ,
  RCC_ACMP0 = SYSCTL_RCGCACMP_OFFSET << 5 , RCC_PWM0 = SYSCTL_RCGCPWM_OFFSET << 5 , RCC_PWM1 , RCC_QEI0 = SYSCTL_RCGCQEI_OFFSET << 5 ,
  RCC_QEI1 , RCC_EEPROM0 = SYSCTL_RCGCEEPROM_OFFSET << 5 , RCC_WTIMER0 = SYSCTL_RCGCWTIMER_OFFSET << 5 , RCC_WTIMER1 ,
  RCC_WTIMER2 , RCC_WTIMER3 , RCC_WTIMER4 , RCC_WTIMER5 ,
  SCC_WD0 = SYSCTL_SCGCWD_OFFSET << 5 , SCC_WD1 , SCC_TIMER0 = SYSCTL_SCGCTIMER_OFFSET << 5 , SCC_TIMER1 ,
  SCC_TIMER2 , SCC_TIMER3 , SCC_TIMER4 , SCC_TIMER5 ,
  SCC_GPIOA = SYSCTL_SCGCGPIO_OFFSET << 5 , SCC_GPIOB , SCC_GPIOC , SCC_GPIOD ,
  SCC_GPIOE , SCC_GPIOF , SCC_GPIOG , SCC_GPIOH ,
  SCC_GPIOJ , SCC_GPIOK , SCC_GPIOL , SCC_GPIOM ,
  SCC_GPION , SCC_GPIOP , SCC_GPIOQ , SCC_DMA = SYSCTL_SCGCDMA_OFFSET << 5 ,
  SCC_HIB = SYSCTL_SCGCGPIO_OFFSET << 5 , SCC_UART0 = SYSCTL_SCGCUART_OFFSET << 5 , SCC_UART1 , SCC_UART2 ,
  SCC_UART3 , SCC_UART4 , SCC_UART5 , SCC_UART6 ,
  SCC_UART7 , SCC_SSI0 = SYSCTL_SCGCSSI_OFFSET << 5 , SCC_SSI1 , SCC_SSI2 ,
  SCC_SSI3 , SCC_I2C0 = SYSCTL_SCGCI2C_OFFSET << 5 , SCC_I2C1 , SCC_I2C2 ,
  SCC_I2C3 , SCC_I2C4 , SCC_I2C5 , SCC_USB0 = SYSCTL_SCGCUSB_OFFSET << 5 ,
  SCC_CAN0 = SYSCTL_SCGCCAN_OFFSET << 5 , SCC_CAN1 , SCC_ADC0 = SYSCTL_SCGCADC_OFFSET << 5 , SCC_ADC1 ,
  SCC_ACMP0 = SYSCTL_SCGCACMP_OFFSET << 5 , SCC_PWM0 = SYSCTL_SCGCPWM_OFFSET << 5 , SCC_PWM1 , SCC_QEI0 = SYSCTL_SCGCQEI_OFFSET << 5 ,
  SCC_QEI1 , SCC_EEPROM0 = SYSCTL_SCGCEEPROM_OFFSET << 5 , SCC_WTIMER0 = SYSCTL_SCGCWTIMER_OFFSET << 5 , SCC_WTIMER1 ,
  SCC_WTIMER2 , SCC_WTIMER3 , SCC_WTIMER4 , SCC_WTIMER5 ,
  DCC_WD0 = SYSCTL_DCGCWD_OFFSET << 5 , DCC_WD1 , DCC_TIMER0 = SYSCTL_DCGCTIMER_OFFSET << 5 , DCC_TIMER1 ,
  DCC_TIMER2 , DCC_TIMER3 , DCC_TIMER4 , DCC_TIMER5 ,
  DCC_GPIOA = SYSCTL_DCGCGPIO_OFFSET << 5 , DCC_GPIOB , DCC_GPIOC , DCC_GPIOD ,
  DCC_GPIOE , DCC_GPIOF , DCC_GPIOG , DCC_GPIOH ,
  DCC_GPIOJ , DCC_GPIOK , DCC_GPIOL , DCC_GPIOM ,
  DCC_GPION , DCC_GPIOP , DCC_GPIOQ , DCC_DMA = SYSCTL_DCGCDMA_OFFSET << 5 ,
  DCC_HIB = SYSCTL_DCGCGPIO_OFFSET << 5 , DCC_UART0 = SYSCTL_DCGCUART_OFFSET << 5 , DCC_UART1 , DCC_UART2 ,
  DCC_UART3 , DCC_UART4 , DCC_UART5 , DCC_UART6 ,
  DCC_UART7 , DCC_SSI0 = SYSCTL_DCGCSSI_OFFSET << 5 , DCC_SSI1 , DCC_SSI2 ,
  DCC_SSI3 , DCC_I2C0 = SYSCTL_DCGCI2C_OFFSET << 5 , DCC_I2C1 , DCC_I2C2 ,
  DCC_I2C3 , DCC_I2C4 , DCC_I2C5 , DCC_USB0 = SYSCTL_DCGCUSB_OFFSET << 5 ,
  DCC_CAN0 = SYSCTL_DCGCCAN_OFFSET << 5 , DCC_CAN1 , DCC_ADC0 = SYSCTL_DCGCADC_OFFSET << 5 , DCC_ADC1 ,
  DCC_ACMP0 = SYSCTL_DCGCACMP_OFFSET << 5 , DCC_PWM0 = SYSCTL_DCGCPWM_OFFSET << 5 , DCC_PWM1 , DCC_QEI0 = SYSCTL_DCGCQEI_OFFSET << 5 ,
  DCC_QEI1 , DCC_EEPROM0 = SYSCTL_DCGCEEPROM_OFFSET << 5 , DCC_WTIMER0 = SYSCTL_DCGCWTIMER_OFFSET << 5 , DCC_WTIMER1 ,
  DCC_WTIMER2 , DCC_WTIMER3 , DCC_WTIMER4 , DCC_WTIMER5
}
 Clock enable definitions. More...
 

Functions

void periph_clock_enable (enum lm4f_clken periph)
 Enable the clock source for the peripheral. More...
 
void periph_clock_disable (enum lm4f_clken periph)
 Disable the clock source for the peripheral. More...
 

Detailed Description

Defined Constants and Types for the LM4F System Control

Version
1.0.0
Author
© 2012 Alexandru Gagniuc mr.nu.nosp@m.ke.m.nosp@m.e@gma.nosp@m.il.c.nosp@m.om
Date
10 March 2013

LGPL License Terms libopencm3 License

Macro Definition Documentation

◆ SYSCTL_DCGCACMP

#define SYSCTL_DCGCACMP   MMIO32(SYSCTL_BASE + SYSCTL_DCGCACMP_OFFSET)

Definition at line 239 of file systemcontrol.h.

◆ SYSCTL_DCGCACMP_OFFSET

#define SYSCTL_DCGCACMP_OFFSET   0x83C

Definition at line 238 of file systemcontrol.h.

◆ SYSCTL_DCGCADC

#define SYSCTL_DCGCADC   MMIO32(SYSCTL_BASE + SYSCTL_DCGCADC_OFFSET)

Definition at line 237 of file systemcontrol.h.

◆ SYSCTL_DCGCADC_OFFSET

#define SYSCTL_DCGCADC_OFFSET   0x838

Definition at line 236 of file systemcontrol.h.

◆ SYSCTL_DCGCCAN

#define SYSCTL_DCGCCAN   MMIO32(SYSCTL_BASE + SYSCTL_DCGCCAN_OFFSET)

Definition at line 235 of file systemcontrol.h.

◆ SYSCTL_DCGCCAN_OFFSET

#define SYSCTL_DCGCCAN_OFFSET   0x834

Definition at line 234 of file systemcontrol.h.

◆ SYSCTL_DCGCDMA

#define SYSCTL_DCGCDMA   MMIO32(SYSCTL_BASE + SYSCTL_DCGCDMA_OFFSET)

Definition at line 223 of file systemcontrol.h.

◆ SYSCTL_DCGCDMA_OFFSET

#define SYSCTL_DCGCDMA_OFFSET   0x80C

Definition at line 222 of file systemcontrol.h.

◆ SYSCTL_DCGCEEPROM

#define SYSCTL_DCGCEEPROM   MMIO32(SYSCTL_BASE + SYSCTL_DCGCEEPROM_OFFSET)

Definition at line 245 of file systemcontrol.h.

◆ SYSCTL_DCGCEEPROM_OFFSET

#define SYSCTL_DCGCEEPROM_OFFSET   0x858

Definition at line 244 of file systemcontrol.h.

◆ SYSCTL_DCGCGPIO

#define SYSCTL_DCGCGPIO   MMIO32(SYSCTL_BASE + SYSCTL_DCGCGPIO_OFFSET)

Definition at line 221 of file systemcontrol.h.

◆ SYSCTL_DCGCGPIO_OFFSET

#define SYSCTL_DCGCGPIO_OFFSET   0x808

Definition at line 220 of file systemcontrol.h.

◆ SYSCTL_DCGCHIB

#define SYSCTL_DCGCHIB   MMIO32(SYSCTL_BASE + SYSCTL_DCGCHIB_OFFSET)

Definition at line 225 of file systemcontrol.h.

◆ SYSCTL_DCGCHIB_OFFSET

#define SYSCTL_DCGCHIB_OFFSET   0x814

Definition at line 224 of file systemcontrol.h.

◆ SYSCTL_DCGCI2C

#define SYSCTL_DCGCI2C   MMIO32(SYSCTL_BASE + SYSCTL_DCGCI2C_OFFSET)

Definition at line 231 of file systemcontrol.h.

◆ SYSCTL_DCGCI2C_OFFSET

#define SYSCTL_DCGCI2C_OFFSET   0x820

Definition at line 230 of file systemcontrol.h.

◆ SYSCTL_DCGCPWM

#define SYSCTL_DCGCPWM   MMIO32(SYSCTL_BASE + SYSCTL_DCGCPWM_OFFSET)

Definition at line 241 of file systemcontrol.h.

◆ SYSCTL_DCGCPWM_OFFSET

#define SYSCTL_DCGCPWM_OFFSET   0x840

Definition at line 240 of file systemcontrol.h.

◆ SYSCTL_DCGCQEI

#define SYSCTL_DCGCQEI   MMIO32(SYSCTL_BASE + SYSCTL_DCGCQEI_OFFSET)

Definition at line 243 of file systemcontrol.h.

◆ SYSCTL_DCGCQEI_OFFSET

#define SYSCTL_DCGCQEI_OFFSET   0x844

Definition at line 242 of file systemcontrol.h.

◆ SYSCTL_DCGCSSI

#define SYSCTL_DCGCSSI   MMIO32(SYSCTL_BASE + SYSCTL_DCGCSSI_OFFSET)

Definition at line 229 of file systemcontrol.h.

◆ SYSCTL_DCGCSSI_OFFSET

#define SYSCTL_DCGCSSI_OFFSET   0x81C

Definition at line 228 of file systemcontrol.h.

◆ SYSCTL_DCGCTIMER

#define SYSCTL_DCGCTIMER   MMIO32(SYSCTL_BASE + SYSCTL_DCGCTIMER_OFFSET)

Definition at line 219 of file systemcontrol.h.

◆ SYSCTL_DCGCTIMER_OFFSET

#define SYSCTL_DCGCTIMER_OFFSET   0x804

Definition at line 218 of file systemcontrol.h.

◆ SYSCTL_DCGCUART

#define SYSCTL_DCGCUART   MMIO32(SYSCTL_BASE + SYSCTL_DCGCUART_OFFSET)

Definition at line 227 of file systemcontrol.h.

◆ SYSCTL_DCGCUART_OFFSET

#define SYSCTL_DCGCUART_OFFSET   0x818

Definition at line 226 of file systemcontrol.h.

◆ SYSCTL_DCGCUSB

#define SYSCTL_DCGCUSB   MMIO32(SYSCTL_BASE + SYSCTL_DCGCUSB_OFFSET)

Definition at line 233 of file systemcontrol.h.

◆ SYSCTL_DCGCUSB_OFFSET

#define SYSCTL_DCGCUSB_OFFSET   0x828

Definition at line 232 of file systemcontrol.h.

◆ SYSCTL_DCGCWD

#define SYSCTL_DCGCWD   MMIO32(SYSCTL_BASE + SYSCTL_DCGCWD_OFFSET)

Definition at line 217 of file systemcontrol.h.

◆ SYSCTL_DCGCWD_OFFSET

#define SYSCTL_DCGCWD_OFFSET   0x800

Definition at line 216 of file systemcontrol.h.

◆ SYSCTL_DCGCWTIMER

#define SYSCTL_DCGCWTIMER   MMIO32(SYSCTL_BASE + SYSCTL_DCGCWTIMER_OFFSET)

Definition at line 247 of file systemcontrol.h.

◆ SYSCTL_DCGCWTIMER_OFFSET

#define SYSCTL_DCGCWTIMER_OFFSET   0x85C

Definition at line 246 of file systemcontrol.h.

◆ SYSCTL_DID0

#define SYSCTL_DID0   MMIO32(SYSCTL_BASE + SYSCTL_DID0_OFFSET)

Definition at line 44 of file systemcontrol.h.

◆ SYSCTL_DID0_CLASS_MASK

#define SYSCTL_DID0_CLASS_MASK   (0xFF << 16)

Device class.

Definition at line 339 of file systemcontrol.h.

◆ SYSCTL_DID0_MAJOR_MASK [1/2]

#define SYSCTL_DID0_MAJOR_MASK   (0xFF << 8)

Major revision.

Minor revision.

Definition at line 343 of file systemcontrol.h.

◆ SYSCTL_DID0_MAJOR_MASK [2/2]

#define SYSCTL_DID0_MAJOR_MASK   (0xFF << 8)

Major revision.

Minor revision.

Definition at line 343 of file systemcontrol.h.

◆ SYSCTL_DID0_OFFSET

#define SYSCTL_DID0_OFFSET   0x000

Definition at line 43 of file systemcontrol.h.

◆ SYSCTL_DID0_VER_MASK

#define SYSCTL_DID0_VER_MASK   (7 << 28)

DID0 version.

Definition at line 337 of file systemcontrol.h.

◆ SYSCTL_DID1

#define SYSCTL_DID1   MMIO32(SYSCTL_BASE + SYSCTL_DID1_OFFSET)

Definition at line 46 of file systemcontrol.h.

◆ SYSCTL_DID1_FAM_MASK

#define SYSCTL_DID1_FAM_MASK   (0xF << 24)

Family.

Definition at line 351 of file systemcontrol.h.

◆ SYSCTL_DID1_OFFSET

#define SYSCTL_DID1_OFFSET   0x004

Definition at line 45 of file systemcontrol.h.

◆ SYSCTL_DID1_PARTNO_MASK

#define SYSCTL_DID1_PARTNO_MASK   (0xFF << 16)

Part number.

Definition at line 353 of file systemcontrol.h.

◆ SYSCTL_DID1_PINCOUNT_100P

#define SYSCTL_DID1_PINCOUNT_100P   (0x2 << 13)

Definition at line 358 of file systemcontrol.h.

◆ SYSCTL_DID1_PINCOUNT_144P

#define SYSCTL_DID1_PINCOUNT_144P   (0x4 << 13)

Definition at line 360 of file systemcontrol.h.

◆ SYSCTL_DID1_PINCOUNT_157P

#define SYSCTL_DID1_PINCOUNT_157P   (0x5 << 13)

Definition at line 361 of file systemcontrol.h.

◆ SYSCTL_DID1_PINCOUNT_28P

#define SYSCTL_DID1_PINCOUNT_28P   (0x0 << 13)

Definition at line 356 of file systemcontrol.h.

◆ SYSCTL_DID1_PINCOUNT_48P

#define SYSCTL_DID1_PINCOUNT_48P   (0x1 << 13)

Definition at line 357 of file systemcontrol.h.

◆ SYSCTL_DID1_PINCOUNT_64P

#define SYSCTL_DID1_PINCOUNT_64P   (0x3 << 13)

Definition at line 359 of file systemcontrol.h.

◆ SYSCTL_DID1_PINCOUNT_MASK

#define SYSCTL_DID1_PINCOUNT_MASK   (0x7 << 13)

Pin count.

Definition at line 355 of file systemcontrol.h.

◆ SYSCTL_DID1_PKG_BGA

#define SYSCTL_DID1_PKG_BGA   (0x2 << 5)

Definition at line 371 of file systemcontrol.h.

◆ SYSCTL_DID1_PKG_LQFP

#define SYSCTL_DID1_PKG_LQFP   (0x1 << 5)

Definition at line 370 of file systemcontrol.h.

◆ SYSCTL_DID1_PKG_MASK

#define SYSCTL_DID1_PKG_MASK   (0x3 << 5)

Package.

Definition at line 368 of file systemcontrol.h.

◆ SYSCTL_DID1_PKG_SOIC

#define SYSCTL_DID1_PKG_SOIC   (0x0 << 5)

Definition at line 369 of file systemcontrol.h.

◆ SYSCTL_DID1_QUAL_MASK

#define SYSCTL_DID1_QUAL_MASK   (3 << 0)

Qualification status.

Definition at line 375 of file systemcontrol.h.

◆ SYSCTL_DID1_ROHS

#define SYSCTL_DID1_ROHS   (1 << 2)

ROHS compliance.

Definition at line 373 of file systemcontrol.h.

◆ SYSCTL_DID1_TEMP_0_70

#define SYSCTL_DID1_TEMP_0_70   (0x0 << 5)

Definition at line 364 of file systemcontrol.h.

◆ SYSCTL_DID1_TEMP_M40_105

#define SYSCTL_DID1_TEMP_M40_105   (0x2 << 5)

Definition at line 366 of file systemcontrol.h.

◆ SYSCTL_DID1_TEMP_M40_85

#define SYSCTL_DID1_TEMP_M40_85   (0x1 << 5)

Definition at line 365 of file systemcontrol.h.

◆ SYSCTL_DID1_TEMP_MASK

#define SYSCTL_DID1_TEMP_MASK   (0x7 << 5)

Temperature range.

Definition at line 363 of file systemcontrol.h.

◆ SYSCTL_DID1_VER_MASK

#define SYSCTL_DID1_VER_MASK   (0xF << 28)

DID1 version.

Definition at line 349 of file systemcontrol.h.

◆ SYSCTL_DSLPCLKCFG

#define SYSCTL_DSLPCLKCFG   MMIO32(SYSCTL_BASE + SYSCTL_DSLPCLKCFG_OFFSET)

Definition at line 70 of file systemcontrol.h.

◆ SYSCTL_DSLPCLKCFG_OFFSET

#define SYSCTL_DSLPCLKCFG_OFFSET   0x144

Definition at line 69 of file systemcontrol.h.

◆ SYSCTL_GPIOHBCTL

#define SYSCTL_GPIOHBCTL   MMIO32(SYSCTL_BASE + SYSCTL_GPIOHBCTL_OFFSET)

Definition at line 64 of file systemcontrol.h.

◆ SYSCTL_GPIOHBCTL_OFFSET

#define SYSCTL_GPIOHBCTL_OFFSET   0x06C

Definition at line 63 of file systemcontrol.h.

◆ SYSCTL_GPIOHBCTL_PORTA

#define SYSCTL_GPIOHBCTL_PORTA   (1 << 0)

Definition at line 517 of file systemcontrol.h.

◆ SYSCTL_GPIOHBCTL_PORTB

#define SYSCTL_GPIOHBCTL_PORTB   (1 << 1)

Definition at line 516 of file systemcontrol.h.

◆ SYSCTL_GPIOHBCTL_PORTC

#define SYSCTL_GPIOHBCTL_PORTC   (1 << 2)

Definition at line 515 of file systemcontrol.h.

◆ SYSCTL_GPIOHBCTL_PORTD

#define SYSCTL_GPIOHBCTL_PORTD   (1 << 3)

Definition at line 514 of file systemcontrol.h.

◆ SYSCTL_GPIOHBCTL_PORTE

#define SYSCTL_GPIOHBCTL_PORTE   (1 << 4)

Definition at line 513 of file systemcontrol.h.

◆ SYSCTL_GPIOHBCTL_PORTF

#define SYSCTL_GPIOHBCTL_PORTF   (1 << 5)

Definition at line 512 of file systemcontrol.h.

◆ SYSCTL_GPIOHBCTL_PORTG

#define SYSCTL_GPIOHBCTL_PORTG   (1 << 6)

Definition at line 511 of file systemcontrol.h.

◆ SYSCTL_GPIOHBCTL_PORTH

#define SYSCTL_GPIOHBCTL_PORTH   (1 << 7)

Definition at line 510 of file systemcontrol.h.

◆ SYSCTL_GPIOHBCTL_PORTJ

#define SYSCTL_GPIOHBCTL_PORTJ   (1 << 8)

Definition at line 509 of file systemcontrol.h.

◆ SYSCTL_GPIOHBCTL_PORTK

#define SYSCTL_GPIOHBCTL_PORTK   (1 << 9)

Definition at line 508 of file systemcontrol.h.

◆ SYSCTL_GPIOHBCTL_PORTL

#define SYSCTL_GPIOHBCTL_PORTL   (1 << 10)

Definition at line 507 of file systemcontrol.h.

◆ SYSCTL_GPIOHBCTL_PORTM

#define SYSCTL_GPIOHBCTL_PORTM   (1 << 11)

Definition at line 506 of file systemcontrol.h.

◆ SYSCTL_GPIOHBCTL_PORTN

#define SYSCTL_GPIOHBCTL_PORTN   (1 << 12)

Definition at line 505 of file systemcontrol.h.

◆ SYSCTL_GPIOHBCTL_PORTP

#define SYSCTL_GPIOHBCTL_PORTP   (1 << 13)

Definition at line 504 of file systemcontrol.h.

◆ SYSCTL_GPIOHBCTL_PORTQ

#define SYSCTL_GPIOHBCTL_PORTQ   (1 << 14)

Definition at line 503 of file systemcontrol.h.

◆ SYSCTL_IMC

#define SYSCTL_IMC   MMIO32(SYSCTL_BASE + SYSCTL_IMC_OFFSET)

Definition at line 54 of file systemcontrol.h.

◆ SYSCTL_IMC_BORIM

#define SYSCTL_IMC_BORIM   (1 << 1)

Brown-Out Reset Raw Interrupt Status.

Definition at line 409 of file systemcontrol.h.

◆ SYSCTL_IMC_MOFIM

#define SYSCTL_IMC_MOFIM   (1 << 3)

Main Oscillator Failure Raw Interrupt Status.

Definition at line 407 of file systemcontrol.h.

◆ SYSCTL_IMC_MOSCPUPIM

#define SYSCTL_IMC_MOSCPUPIM   (1 << 8)

MOSC Power Up Raw Interrupt Status.

Definition at line 401 of file systemcontrol.h.

◆ SYSCTL_IMC_OFFSET

#define SYSCTL_IMC_OFFSET   0x054

Definition at line 53 of file systemcontrol.h.

◆ SYSCTL_IMC_PLLLIM

#define SYSCTL_IMC_PLLLIM   (1 << 6)

PLL Lock Raw Interrupt Status.

Definition at line 405 of file systemcontrol.h.

◆ SYSCTL_IMC_USBPLLLIM

#define SYSCTL_IMC_USBPLLLIM   (1 << 7)

USB PLL Lock Raw Interrupt Status.

Definition at line 403 of file systemcontrol.h.

◆ SYSCTL_LDORCTL

#define SYSCTL_LDORCTL   MMIO32(SYSCTL_BASE + SYSCTL_LDORCTL_OFFSET)

Definition at line 50 of file systemcontrol.h.

◆ SYSCTL_LDORCTL_OFFSET

#define SYSCTL_LDORCTL_OFFSET   0x034

Definition at line 49 of file systemcontrol.h.

◆ SYSCTL_MISC

#define SYSCTL_MISC   MMIO32(SYSCTL_BASE + SYSCTL_MISC_OFFSET)

Definition at line 56 of file systemcontrol.h.

◆ SYSCTL_MISC_BORMIS

#define SYSCTL_MISC_BORMIS   (1 << 1)

Brown-Out Reset Raw Interrupt Status.

Definition at line 423 of file systemcontrol.h.

◆ SYSCTL_MISC_MOFMIS

#define SYSCTL_MISC_MOFMIS   (1 << 3)

Main Oscillator Failure Raw Interrupt Status.

Definition at line 421 of file systemcontrol.h.

◆ SYSCTL_MISC_MOSCPUPMIS

#define SYSCTL_MISC_MOSCPUPMIS   (1 << 8)

MOSC Power Up Raw Interrupt Status.

Definition at line 415 of file systemcontrol.h.

◆ SYSCTL_MISC_OFFSET

#define SYSCTL_MISC_OFFSET   0x058

Definition at line 55 of file systemcontrol.h.

◆ SYSCTL_MISC_PLLLMIS

#define SYSCTL_MISC_PLLLMIS   (1 << 6)

PLL Lock Raw Interrupt Status.

Definition at line 419 of file systemcontrol.h.

◆ SYSCTL_MISC_USBPLLLMIS

#define SYSCTL_MISC_USBPLLLMIS   (1 << 7)

USB PLL Lock Raw Interrupt Status.

Definition at line 417 of file systemcontrol.h.

◆ SYSCTL_MOSCCTL

#define SYSCTL_MOSCCTL   MMIO32(SYSCTL_BASE + SYSCTL_MOSCCTL_OFFSET)

Definition at line 68 of file systemcontrol.h.

◆ SYSCTL_MOSCCTL_CVAL

#define SYSCTL_MOSCCTL_CVAL   (1 << 0)

Clock Validation for MOSC.

Definition at line 556 of file systemcontrol.h.

◆ SYSCTL_MOSCCTL_MOSCIM

#define SYSCTL_MOSCCTL_MOSCIM   (1 << 1)

MOSC Failure Action.

Definition at line 554 of file systemcontrol.h.

◆ SYSCTL_MOSCCTL_NOXTAL

#define SYSCTL_MOSCCTL_NOXTAL   (1 << 2)

No Crystal Connected.

Definition at line 552 of file systemcontrol.h.

◆ SYSCTL_MOSCCTL_OFFSET

#define SYSCTL_MOSCCTL_OFFSET   0x07C

Definition at line 67 of file systemcontrol.h.

◆ SYSCTL_PBORCTL

#define SYSCTL_PBORCTL   MMIO32(SYSCTL_BASE + SYSCTL_PBORCTL_OFFSET)

Definition at line 48 of file systemcontrol.h.

◆ SYSCTL_PBORCTL_BORIOR

#define SYSCTL_PBORCTL_BORIOR   (1 << 1)

BOR interrupt or reset.

Definition at line 381 of file systemcontrol.h.

◆ SYSCTL_PBORCTL_OFFSET

#define SYSCTL_PBORCTL_OFFSET   0x030

Definition at line 47 of file systemcontrol.h.

◆ SYSCTL_PIOSCCAL

#define SYSCTL_PIOSCCAL   MMIO32(SYSCTL_BASE + SYSCTL_PIOSCCAL_OFFSET)

Definition at line 74 of file systemcontrol.h.

◆ SYSCTL_PIOSCCAL_CAL

#define SYSCTL_PIOSCCAL_CAL   (1 << 9)

Start calibration.

Definition at line 575 of file systemcontrol.h.

◆ SYSCTL_PIOSCCAL_OFFSET

#define SYSCTL_PIOSCCAL_OFFSET   0x150

Definition at line 73 of file systemcontrol.h.

◆ SYSCTL_PIOSCCAL_UPDATE

#define SYSCTL_PIOSCCAL_UPDATE   (1 << 8)

Update trim.

Definition at line 577 of file systemcontrol.h.

◆ SYSCTL_PIOSCCAL_UT_MASK

#define SYSCTL_PIOSCCAL_UT_MASK   (0x7F << 0)

User Trim Value.

Definition at line 579 of file systemcontrol.h.

◆ SYSCTL_PIOSCCAL_UTEN

#define SYSCTL_PIOSCCAL_UTEN   (1 << 31)

Use User Trim Value.

Definition at line 573 of file systemcontrol.h.

◆ SYSCTL_PIOSCSTAT

#define SYSCTL_PIOSCSTAT   MMIO32(SYSCTL_BASE + SYSCTL_PIOSCSTAT_OFFSET)

Definition at line 76 of file systemcontrol.h.

◆ SYSCTL_PIOSCSTAT_CT_MASK

#define SYSCTL_PIOSCSTAT_CT_MASK   (0x7F << 0)

Calibration Trim Value.

Definition at line 589 of file systemcontrol.h.

◆ SYSCTL_PIOSCSTAT_DT_MASK

#define SYSCTL_PIOSCSTAT_DT_MASK   (0x7F << 16)

Default Trim Value.

Definition at line 585 of file systemcontrol.h.

◆ SYSCTL_PIOSCSTAT_OFFSET

#define SYSCTL_PIOSCSTAT_OFFSET   0x154

Definition at line 75 of file systemcontrol.h.

◆ SYSCTL_PIOSCSTAT_RESULT_MASK

#define SYSCTL_PIOSCSTAT_RESULT_MASK   (0x3 << 8)

Calibration result.

Definition at line 587 of file systemcontrol.h.

◆ SYSCTL_PLLCFG

#define SYSCTL_PLLCFG   MMIO32(SYSCTL_BASE + SYSCTL_PLLCFG_OFFSET)

Definition at line 62 of file systemcontrol.h.

◆ SYSCTL_PLLCFG_OFFSET

#define SYSCTL_PLLCFG_OFFSET   0x064

Definition at line 61 of file systemcontrol.h.

◆ SYSCTL_PLLFREQ0

#define SYSCTL_PLLFREQ0   MMIO32(SYSCTL_BASE + SYSCTL_PLLFREQ0_OFFSET)

Definition at line 78 of file systemcontrol.h.

◆ SYSCTL_PLLFREQ0_MFRAC_MASK

#define SYSCTL_PLLFREQ0_MFRAC_MASK   (0x3FF << 10)

PLL M fractional value.

Definition at line 594 of file systemcontrol.h.

◆ SYSCTL_PLLFREQ0_MINT_MASK

#define SYSCTL_PLLFREQ0_MINT_MASK   (0x3FF << 0)

PLL M integer value.

Definition at line 596 of file systemcontrol.h.

◆ SYSCTL_PLLFREQ0_OFFSET

#define SYSCTL_PLLFREQ0_OFFSET   0x160

Definition at line 77 of file systemcontrol.h.

◆ SYSCTL_PLLFREQ1

#define SYSCTL_PLLFREQ1   MMIO32(SYSCTL_BASE + SYSCTL_PLLFREQ1_OFFSET)

Definition at line 80 of file systemcontrol.h.

◆ SYSCTL_PLLFREQ1_N_MASK

#define SYSCTL_PLLFREQ1_N_MASK   (0x1F << 0)

PLL N value.

Definition at line 604 of file systemcontrol.h.

◆ SYSCTL_PLLFREQ1_OFFSET

#define SYSCTL_PLLFREQ1_OFFSET   0x164

Definition at line 79 of file systemcontrol.h.

◆ SYSCTL_PLLFREQ1_Q_MASK

#define SYSCTL_PLLFREQ1_Q_MASK   (0x1F << 8)

PLL Q value.

Definition at line 602 of file systemcontrol.h.

◆ SYSCTL_PLLSTAT

#define SYSCTL_PLLSTAT   MMIO32(SYSCTL_BASE + SYSCTL_PLLSTAT_OFFSET)

Definition at line 82 of file systemcontrol.h.

◆ SYSCTL_PLLSTAT_LOCK

#define SYSCTL_PLLSTAT_LOCK   (1 << 0)

PLL lock.

Definition at line 610 of file systemcontrol.h.

◆ SYSCTL_PLLSTAT_OFFSET

#define SYSCTL_PLLSTAT_OFFSET   0x168

Definition at line 81 of file systemcontrol.h.

◆ SYSCTL_PPACMP

#define SYSCTL_PPACMP   MMIO32(SYSCTL_BASE + SYSCTL_PPACMP_OFFSET)

Definition at line 107 of file systemcontrol.h.

◆ SYSCTL_PPACMP_OFFSET

#define SYSCTL_PPACMP_OFFSET   0x33C

Definition at line 106 of file systemcontrol.h.

◆ SYSCTL_PPADC

#define SYSCTL_PPADC   MMIO32(SYSCTL_BASE + SYSCTL_PPADC_OFFSET)

Definition at line 105 of file systemcontrol.h.

◆ SYSCTL_PPADC_OFFSET

#define SYSCTL_PPADC_OFFSET   0x338

Definition at line 104 of file systemcontrol.h.

◆ SYSCTL_PPCAN

#define SYSCTL_PPCAN   MMIO32(SYSCTL_BASE + SYSCTL_PPCAN_OFFSET)

Definition at line 103 of file systemcontrol.h.

◆ SYSCTL_PPCAN_OFFSET

#define SYSCTL_PPCAN_OFFSET   0x334

Definition at line 102 of file systemcontrol.h.

◆ SYSCTL_PPDMA

#define SYSCTL_PPDMA   MMIO32(SYSCTL_BASE + SYSCTL_PPDMA_OFFSET)

Definition at line 91 of file systemcontrol.h.

◆ SYSCTL_PPDMA_OFFSET

#define SYSCTL_PPDMA_OFFSET   0x30C

Definition at line 90 of file systemcontrol.h.

◆ SYSCTL_PPEEPROM

#define SYSCTL_PPEEPROM   MMIO32(SYSCTL_BASE + SYSCTL_PPEEPROM_OFFSET)

Definition at line 113 of file systemcontrol.h.

◆ SYSCTL_PPEEPROM_OFFSET

#define SYSCTL_PPEEPROM_OFFSET   0x358

Definition at line 112 of file systemcontrol.h.

◆ SYSCTL_PPGPIO

#define SYSCTL_PPGPIO   MMIO32(SYSCTL_BASE + SYSCTL_PPGPIO_OFFSET)

Definition at line 89 of file systemcontrol.h.

◆ SYSCTL_PPGPIO_OFFSET

#define SYSCTL_PPGPIO_OFFSET   0x308

Definition at line 88 of file systemcontrol.h.

◆ SYSCTL_PPHIB

#define SYSCTL_PPHIB   MMIO32(SYSCTL_BASE + SYSCTL_PPHIB_OFFSET)

Definition at line 93 of file systemcontrol.h.

◆ SYSCTL_PPHIB_OFFSET

#define SYSCTL_PPHIB_OFFSET   0x314

Definition at line 92 of file systemcontrol.h.

◆ SYSCTL_PPI2C

#define SYSCTL_PPI2C   MMIO32(SYSCTL_BASE + SYSCTL_PPI2C_OFFSET)

Definition at line 99 of file systemcontrol.h.

◆ SYSCTL_PPI2C_OFFSET

#define SYSCTL_PPI2C_OFFSET   0x320

Definition at line 98 of file systemcontrol.h.

◆ SYSCTL_PPPWM

#define SYSCTL_PPPWM   MMIO32(SYSCTL_BASE + SYSCTL_PPPWM_OFFSET)

Definition at line 109 of file systemcontrol.h.

◆ SYSCTL_PPPWM_OFFSET

#define SYSCTL_PPPWM_OFFSET   0x340

Definition at line 108 of file systemcontrol.h.

◆ SYSCTL_PPQEI

#define SYSCTL_PPQEI   MMIO32(SYSCTL_BASE + SYSCTL_PPQEI_OFFSET)

Definition at line 111 of file systemcontrol.h.

◆ SYSCTL_PPQEI_OFFSET

#define SYSCTL_PPQEI_OFFSET   0x344

Definition at line 110 of file systemcontrol.h.

◆ SYSCTL_PPSSI

#define SYSCTL_PPSSI   MMIO32(SYSCTL_BASE + SYSCTL_PPSSI_OFFSET)

Definition at line 97 of file systemcontrol.h.

◆ SYSCTL_PPSSI_OFFSET

#define SYSCTL_PPSSI_OFFSET   0x31C

Definition at line 96 of file systemcontrol.h.

◆ SYSCTL_PPTIMER

#define SYSCTL_PPTIMER   MMIO32(SYSCTL_BASE + SYSCTL_PPTIMER_OFFSET)

Definition at line 87 of file systemcontrol.h.

◆ SYSCTL_PPTIMER_OFFSET

#define SYSCTL_PPTIMER_OFFSET   0x304

Definition at line 86 of file systemcontrol.h.

◆ SYSCTL_PPUART

#define SYSCTL_PPUART   MMIO32(SYSCTL_BASE + SYSCTL_PPUART_OFFSET)

Definition at line 95 of file systemcontrol.h.

◆ SYSCTL_PPUART_OFFSET

#define SYSCTL_PPUART_OFFSET   0x318

Definition at line 94 of file systemcontrol.h.

◆ SYSCTL_PPUSB

#define SYSCTL_PPUSB   MMIO32(SYSCTL_BASE + SYSCTL_PPUSB_OFFSET)

Definition at line 101 of file systemcontrol.h.

◆ SYSCTL_PPUSB_OFFSET

#define SYSCTL_PPUSB_OFFSET   0x328

Definition at line 100 of file systemcontrol.h.

◆ SYSCTL_PPWD

#define SYSCTL_PPWD   MMIO32(SYSCTL_BASE + SYSCTL_PPWD_OFFSET)

Definition at line 85 of file systemcontrol.h.

◆ SYSCTL_PPWD_OFFSET

#define SYSCTL_PPWD_OFFSET   0x300

Definition at line 84 of file systemcontrol.h.

◆ SYSCTL_PPWTIMER

#define SYSCTL_PPWTIMER   MMIO32(SYSCTL_BASE + SYSCTL_PPWTIMER_OFFSET)

Definition at line 115 of file systemcontrol.h.

◆ SYSCTL_PPWTIMER_OFFSET

#define SYSCTL_PPWTIMER_OFFSET   0x35C

Definition at line 114 of file systemcontrol.h.

◆ SYSCTL_PRACMP

#define SYSCTL_PRACMP   MMIO32(SYSCTL_BASE + SYSCTL_PRACMP_OFFSET)

Definition at line 272 of file systemcontrol.h.

◆ SYSCTL_PRACMP_OFFSET

#define SYSCTL_PRACMP_OFFSET   0xA3C

Definition at line 271 of file systemcontrol.h.

◆ SYSCTL_PRADC

#define SYSCTL_PRADC   MMIO32(SYSCTL_BASE + SYSCTL_PRADC_OFFSET)

Definition at line 270 of file systemcontrol.h.

◆ SYSCTL_PRADC_OFFSET

#define SYSCTL_PRADC_OFFSET   0xA38

Definition at line 269 of file systemcontrol.h.

◆ SYSCTL_PRCAN

#define SYSCTL_PRCAN   MMIO32(SYSCTL_BASE + SYSCTL_PRCAN_OFFSET)

Definition at line 268 of file systemcontrol.h.

◆ SYSCTL_PRCAN_OFFSET

#define SYSCTL_PRCAN_OFFSET   0xA34

Definition at line 267 of file systemcontrol.h.

◆ SYSCTL_PRDMA

#define SYSCTL_PRDMA   MMIO32(SYSCTL_BASE + SYSCTL_PRDMA_OFFSET)

Definition at line 256 of file systemcontrol.h.

◆ SYSCTL_PRDMA_OFFSET

#define SYSCTL_PRDMA_OFFSET   0xA0C

Definition at line 255 of file systemcontrol.h.

◆ SYSCTL_PREEPROM

#define SYSCTL_PREEPROM   MMIO32(SYSCTL_BASE + SYSCTL_PREEPROM_OFFSET)

Definition at line 278 of file systemcontrol.h.

◆ SYSCTL_PREEPROM_OFFSET

#define SYSCTL_PREEPROM_OFFSET   0xA58

Definition at line 277 of file systemcontrol.h.

◆ SYSCTL_PRGPIO

#define SYSCTL_PRGPIO   MMIO32(SYSCTL_BASE + SYSCTL_PRGPIO_OFFSET)

Definition at line 254 of file systemcontrol.h.

◆ SYSCTL_PRGPIO_OFFSET

#define SYSCTL_PRGPIO_OFFSET   0xA08

Definition at line 253 of file systemcontrol.h.

◆ SYSCTL_PRHIB

#define SYSCTL_PRHIB   MMIO32(SYSCTL_BASE + SYSCTL_PRHIB_OFFSET)

Definition at line 258 of file systemcontrol.h.

◆ SYSCTL_PRHIB_OFFSET

#define SYSCTL_PRHIB_OFFSET   0xA14

Definition at line 257 of file systemcontrol.h.

◆ SYSCTL_PRI2C

#define SYSCTL_PRI2C   MMIO32(SYSCTL_BASE + SYSCTL_PRI2C_OFFSET)

Definition at line 264 of file systemcontrol.h.

◆ SYSCTL_PRI2C_OFFSET

#define SYSCTL_PRI2C_OFFSET   0xA20

Definition at line 263 of file systemcontrol.h.

◆ SYSCTL_PRPWM

#define SYSCTL_PRPWM   MMIO32(SYSCTL_BASE + SYSCTL_PRPWM_OFFSET)

Definition at line 274 of file systemcontrol.h.

◆ SYSCTL_PRPWM_OFFSET

#define SYSCTL_PRPWM_OFFSET   0xA40

Definition at line 273 of file systemcontrol.h.

◆ SYSCTL_PRQEI

#define SYSCTL_PRQEI   MMIO32(SYSCTL_BASE + SYSCTL_PRQEI_OFFSET)

Definition at line 276 of file systemcontrol.h.

◆ SYSCTL_PRQEI_OFFSET

#define SYSCTL_PRQEI_OFFSET   0xA44

Definition at line 275 of file systemcontrol.h.

◆ SYSCTL_PRSSI

#define SYSCTL_PRSSI   MMIO32(SYSCTL_BASE + SYSCTL_PRSSI_OFFSET)

Definition at line 262 of file systemcontrol.h.

◆ SYSCTL_PRSSI_OFFSET

#define SYSCTL_PRSSI_OFFSET   0xA1C

Definition at line 261 of file systemcontrol.h.

◆ SYSCTL_PRTIMER

#define SYSCTL_PRTIMER   MMIO32(SYSCTL_BASE + SYSCTL_PRTIMER_OFFSET)

Definition at line 252 of file systemcontrol.h.

◆ SYSCTL_PRTIMER_OFFSET

#define SYSCTL_PRTIMER_OFFSET   0xA04

Definition at line 251 of file systemcontrol.h.

◆ SYSCTL_PRUART

#define SYSCTL_PRUART   MMIO32(SYSCTL_BASE + SYSCTL_PRUART_OFFSET)

Definition at line 260 of file systemcontrol.h.

◆ SYSCTL_PRUART_OFFSET

#define SYSCTL_PRUART_OFFSET   0xA18

Definition at line 259 of file systemcontrol.h.

◆ SYSCTL_PRUSB

#define SYSCTL_PRUSB   MMIO32(SYSCTL_BASE + SYSCTL_PRUSB_OFFSET)

Definition at line 266 of file systemcontrol.h.

◆ SYSCTL_PRUSB_OFFSET

#define SYSCTL_PRUSB_OFFSET   0xA28

Definition at line 265 of file systemcontrol.h.

◆ SYSCTL_PRWD

#define SYSCTL_PRWD   MMIO32(SYSCTL_BASE + SYSCTL_PRWD_OFFSET)

Definition at line 250 of file systemcontrol.h.

◆ SYSCTL_PRWD_OFFSET

#define SYSCTL_PRWD_OFFSET   0xA00

Definition at line 249 of file systemcontrol.h.

◆ SYSCTL_PRWTIMER

#define SYSCTL_PRWTIMER   MMIO32(SYSCTL_BASE + SYSCTL_PRWTIMER_OFFSET)

Definition at line 280 of file systemcontrol.h.

◆ SYSCTL_PRWTIMER_OFFSET

#define SYSCTL_PRWTIMER_OFFSET   0xA5C

Definition at line 279 of file systemcontrol.h.

◆ SYSCTL_RCC

#define SYSCTL_RCC   MMIO32(SYSCTL_BASE + SYSCTL_RCC_OFFSET)

Definition at line 60 of file systemcontrol.h.

◆ SYSCTL_RCC2

#define SYSCTL_RCC2   MMIO32(SYSCTL_BASE + SYSCTL_RCC2_OFFSET)

Definition at line 66 of file systemcontrol.h.

◆ SYSCTL_RCC2_ACG

#define SYSCTL_RCC2_ACG   (1 << 27)

Auto Clock Gating.

Definition at line 527 of file systemcontrol.h.

◆ SYSCTL_RCC2_BYPASS2

#define SYSCTL_RCC2_BYPASS2   (1 << 11)

PLL Bypass 2.

Definition at line 539 of file systemcontrol.h.

◆ SYSCTL_RCC2_DIV400

#define SYSCTL_RCC2_DIV400   (1 << 30)

Divide PLL as 400 MHz vs.

200 MHz

Definition at line 525 of file systemcontrol.h.

◆ SYSCTL_RCC2_OFFSET

#define SYSCTL_RCC2_OFFSET   0x070

Definition at line 65 of file systemcontrol.h.

◆ SYSCTL_RCC2_OSCSRC2_30K

#define SYSCTL_RCC2_OSCSRC2_30K   (0x3 << 4)

Definition at line 545 of file systemcontrol.h.

◆ SYSCTL_RCC2_OSCSRC2_32K768

#define SYSCTL_RCC2_OSCSRC2_32K768   (0x7 << 4)

Definition at line 546 of file systemcontrol.h.

◆ SYSCTL_RCC2_OSCSRC2_MASK

#define SYSCTL_RCC2_OSCSRC2_MASK   (0x7 << 4)

Oscillator Source 2.

Definition at line 541 of file systemcontrol.h.

◆ SYSCTL_RCC2_OSCSRC2_MOSC

#define SYSCTL_RCC2_OSCSRC2_MOSC   (0x0 << 4)

Definition at line 542 of file systemcontrol.h.

◆ SYSCTL_RCC2_OSCSRC2_PIOSC

#define SYSCTL_RCC2_OSCSRC2_PIOSC   (0x1 << 4)

Definition at line 543 of file systemcontrol.h.

◆ SYSCTL_RCC2_OSCSRC2_PIOSC_D4

#define SYSCTL_RCC2_OSCSRC2_PIOSC_D4   (0x2 << 4)

Definition at line 544 of file systemcontrol.h.

◆ SYSCTL_RCC2_PWRDN2

#define SYSCTL_RCC2_PWRDN2   (1 << 13)

PLL Power Down 2.

Definition at line 537 of file systemcontrol.h.

◆ SYSCTL_RCC2_SYSDIV2_MASK

#define SYSCTL_RCC2_SYSDIV2_MASK   (0x3F << 23)

System Clock Divisor 2.

Definition at line 529 of file systemcontrol.h.

◆ SYSCTL_RCC2_SYSDIV2LSB

#define SYSCTL_RCC2_SYSDIV2LSB   (1 << 22)

Additional LSB for SYSDIV2.

Definition at line 531 of file systemcontrol.h.

◆ SYSCTL_RCC2_SYSDIV400_MASK

#define SYSCTL_RCC2_SYSDIV400_MASK   (0x7F << 22)

System clock divisor mask when RCC2_DIV400 is set.

Definition at line 533 of file systemcontrol.h.

◆ SYSCTL_RCC2_USBPWRDN

#define SYSCTL_RCC2_USBPWRDN   (1 << 14)

Power-Down USB PLL.

Definition at line 535 of file systemcontrol.h.

◆ SYSCTL_RCC2_USERCC2

#define SYSCTL_RCC2_USERCC2   (1 << 31)

RCC2 overides RCC.

Definition at line 523 of file systemcontrol.h.

◆ SYSCTL_RCC_ACG

#define SYSCTL_RCC_ACG   (1 << 27)

Auto Clock Gating.

Definition at line 447 of file systemcontrol.h.

◆ SYSCTL_RCC_BYPASS

#define SYSCTL_RCC_BYPASS   (1 << 11)

PLL Bypass.

Definition at line 465 of file systemcontrol.h.

◆ SYSCTL_RCC_IOSCDIS

#define SYSCTL_RCC_IOSCDIS   (1 << 1)

Precision Internal Oscillator Disable.

Definition at line 496 of file systemcontrol.h.

◆ SYSCTL_RCC_MOSCDIS

#define SYSCTL_RCC_MOSCDIS   (1 << 0)

Main Oscillator Disable.

Definition at line 498 of file systemcontrol.h.

◆ SYSCTL_RCC_OFFSET

#define SYSCTL_RCC_OFFSET   0x060

Definition at line 59 of file systemcontrol.h.

◆ SYSCTL_RCC_OSCSRC_30K

#define SYSCTL_RCC_OSCSRC_30K   (0x3 << 4)

Definition at line 494 of file systemcontrol.h.

◆ SYSCTL_RCC_OSCSRC_MASK

#define SYSCTL_RCC_OSCSRC_MASK   (0x3 << 4)

Oscillator Source.

Definition at line 490 of file systemcontrol.h.

◆ SYSCTL_RCC_OSCSRC_MOSC

#define SYSCTL_RCC_OSCSRC_MOSC   (0x0 << 4)

Definition at line 491 of file systemcontrol.h.

◆ SYSCTL_RCC_OSCSRC_PIOSC

#define SYSCTL_RCC_OSCSRC_PIOSC   (0x1 << 4)

Definition at line 492 of file systemcontrol.h.

◆ SYSCTL_RCC_OSCSRC_PIOSC_D4

#define SYSCTL_RCC_OSCSRC_PIOSC_D4   (0x2 << 4)

Definition at line 493 of file systemcontrol.h.

◆ SYSCTL_RCC_PWMDIV_16

#define SYSCTL_RCC_PWMDIV_16   (0x3 << 17)

Definition at line 459 of file systemcontrol.h.

◆ SYSCTL_RCC_PWMDIV_2

#define SYSCTL_RCC_PWMDIV_2   (0x0 << 17)

Definition at line 456 of file systemcontrol.h.

◆ SYSCTL_RCC_PWMDIV_32

#define SYSCTL_RCC_PWMDIV_32   (0x4 << 17)

Definition at line 460 of file systemcontrol.h.

◆ SYSCTL_RCC_PWMDIV_4

#define SYSCTL_RCC_PWMDIV_4   (0x1 << 17)

Definition at line 457 of file systemcontrol.h.

◆ SYSCTL_RCC_PWMDIV_64

#define SYSCTL_RCC_PWMDIV_64   (0x5 << 17)

Definition at line 461 of file systemcontrol.h.

◆ SYSCTL_RCC_PWMDIV_8

#define SYSCTL_RCC_PWMDIV_8   (0x2 << 17)

Definition at line 458 of file systemcontrol.h.

◆ SYSCTL_RCC_PWMDIV_MASK

#define SYSCTL_RCC_PWMDIV_MASK   (0xF << 17)

PWM Unit Clock Divisor.

Definition at line 455 of file systemcontrol.h.

◆ SYSCTL_RCC_PWRDN

#define SYSCTL_RCC_PWRDN   (1 << 13)

PLL Power Down.

Definition at line 463 of file systemcontrol.h.

◆ SYSCTL_RCC_SYSDIV_MASK

#define SYSCTL_RCC_SYSDIV_MASK   (0xF << 23)

System Clock Divisor.

Definition at line 449 of file systemcontrol.h.

◆ SYSCTL_RCC_USEPWMDIV

#define SYSCTL_RCC_USEPWMDIV   (1 << 20)

Enable PWM Clock Divisor.

Definition at line 453 of file systemcontrol.h.

◆ SYSCTL_RCC_USESYSDIV

#define SYSCTL_RCC_USESYSDIV   (1 << 22)

Enable System Clock Divider.

Definition at line 451 of file systemcontrol.h.

◆ SYSCTL_RCC_XTAL_10M

#define SYSCTL_RCC_XTAL_10M   (0x10 << 6)

Definition at line 478 of file systemcontrol.h.

◆ SYSCTL_RCC_XTAL_12M

#define SYSCTL_RCC_XTAL_12M   (0x11 << 6)

Definition at line 479 of file systemcontrol.h.

◆ SYSCTL_RCC_XTAL_12M_288

#define SYSCTL_RCC_XTAL_12M_288   (0x12 << 6)

Definition at line 480 of file systemcontrol.h.

◆ SYSCTL_RCC_XTAL_13M_56

#define SYSCTL_RCC_XTAL_13M_56   (0x13 << 6)

Definition at line 481 of file systemcontrol.h.

◆ SYSCTL_RCC_XTAL_14M_31818

#define SYSCTL_RCC_XTAL_14M_31818   (0x14 << 6)

Definition at line 482 of file systemcontrol.h.

◆ SYSCTL_RCC_XTAL_16M

#define SYSCTL_RCC_XTAL_16M   (0x15 << 6)

Definition at line 483 of file systemcontrol.h.

◆ SYSCTL_RCC_XTAL_16M_384

#define SYSCTL_RCC_XTAL_16M_384   (0x16 << 6)

Definition at line 484 of file systemcontrol.h.

◆ SYSCTL_RCC_XTAL_18M

#define SYSCTL_RCC_XTAL_18M   (0x17 << 6)

Definition at line 485 of file systemcontrol.h.

◆ SYSCTL_RCC_XTAL_20M

#define SYSCTL_RCC_XTAL_20M   (0x18 << 6)

Definition at line 486 of file systemcontrol.h.

◆ SYSCTL_RCC_XTAL_24M

#define SYSCTL_RCC_XTAL_24M   (0x19 << 6)

Definition at line 487 of file systemcontrol.h.

◆ SYSCTL_RCC_XTAL_25M

#define SYSCTL_RCC_XTAL_25M   (0x1A << 6)

Definition at line 488 of file systemcontrol.h.

◆ SYSCTL_RCC_XTAL_4M

#define SYSCTL_RCC_XTAL_4M   (0x06 << 6)

Definition at line 468 of file systemcontrol.h.

◆ SYSCTL_RCC_XTAL_4M_096

#define SYSCTL_RCC_XTAL_4M_096   (0x07 << 6)

Definition at line 469 of file systemcontrol.h.

◆ SYSCTL_RCC_XTAL_4M_9152

#define SYSCTL_RCC_XTAL_4M_9152   (0x08 << 6)

Definition at line 470 of file systemcontrol.h.

◆ SYSCTL_RCC_XTAL_5M

#define SYSCTL_RCC_XTAL_5M   (0x09 << 6)

Definition at line 471 of file systemcontrol.h.

◆ SYSCTL_RCC_XTAL_5M_12

#define SYSCTL_RCC_XTAL_5M_12   (0x0A << 6)

Definition at line 472 of file systemcontrol.h.

◆ SYSCTL_RCC_XTAL_6M

#define SYSCTL_RCC_XTAL_6M   (0x0B << 6)

Definition at line 473 of file systemcontrol.h.

◆ SYSCTL_RCC_XTAL_6M_144

#define SYSCTL_RCC_XTAL_6M_144   (0x0C << 6)

Definition at line 474 of file systemcontrol.h.

◆ SYSCTL_RCC_XTAL_7M_3728

#define SYSCTL_RCC_XTAL_7M_3728   (0x0D << 6)

Definition at line 475 of file systemcontrol.h.

◆ SYSCTL_RCC_XTAL_8M

#define SYSCTL_RCC_XTAL_8M   (0x0E << 6)

Definition at line 476 of file systemcontrol.h.

◆ SYSCTL_RCC_XTAL_8M_192

#define SYSCTL_RCC_XTAL_8M_192   (0x0F << 6)

Definition at line 477 of file systemcontrol.h.

◆ SYSCTL_RCC_XTAL_MASK

#define SYSCTL_RCC_XTAL_MASK   (0x1F << 6)

Crystal Value.

Definition at line 467 of file systemcontrol.h.

◆ SYSCTL_RCGCACMP

#define SYSCTL_RCGCACMP   MMIO32(SYSCTL_BASE + SYSCTL_RCGCACMP_OFFSET)

Definition at line 173 of file systemcontrol.h.

◆ SYSCTL_RCGCACMP_OFFSET

#define SYSCTL_RCGCACMP_OFFSET   0x63C

Definition at line 172 of file systemcontrol.h.

◆ SYSCTL_RCGCADC

#define SYSCTL_RCGCADC   MMIO32(SYSCTL_BASE + SYSCTL_RCGCADC_OFFSET)

Definition at line 171 of file systemcontrol.h.

◆ SYSCTL_RCGCADC_OFFSET

#define SYSCTL_RCGCADC_OFFSET   0x638

Definition at line 170 of file systemcontrol.h.

◆ SYSCTL_RCGCCAN

#define SYSCTL_RCGCCAN   MMIO32(SYSCTL_BASE + SYSCTL_RCGCCAN_OFFSET)

Definition at line 169 of file systemcontrol.h.

◆ SYSCTL_RCGCCAN_OFFSET

#define SYSCTL_RCGCCAN_OFFSET   0x634

Definition at line 168 of file systemcontrol.h.

◆ SYSCTL_RCGCDMA

#define SYSCTL_RCGCDMA   MMIO32(SYSCTL_BASE + SYSCTL_RCGCDMA_OFFSET)

Definition at line 157 of file systemcontrol.h.

◆ SYSCTL_RCGCDMA_OFFSET

#define SYSCTL_RCGCDMA_OFFSET   0x60C

Definition at line 156 of file systemcontrol.h.

◆ SYSCTL_RCGCEEPROM

#define SYSCTL_RCGCEEPROM   MMIO32(SYSCTL_BASE + SYSCTL_RCGCEEPROM_OFFSET)

Definition at line 179 of file systemcontrol.h.

◆ SYSCTL_RCGCEEPROM_OFFSET

#define SYSCTL_RCGCEEPROM_OFFSET   0x658

Definition at line 178 of file systemcontrol.h.

◆ SYSCTL_RCGCGPIO

#define SYSCTL_RCGCGPIO   MMIO32(SYSCTL_BASE + SYSCTL_RCGCGPIO_OFFSET)

Definition at line 155 of file systemcontrol.h.

◆ SYSCTL_RCGCGPIO_OFFSET

#define SYSCTL_RCGCGPIO_OFFSET   0x608

Definition at line 154 of file systemcontrol.h.

◆ SYSCTL_RCGCHIB

#define SYSCTL_RCGCHIB   MMIO32(SYSCTL_BASE + SYSCTL_RCGCHIB_OFFSET)

Definition at line 159 of file systemcontrol.h.

◆ SYSCTL_RCGCHIB_OFFSET

#define SYSCTL_RCGCHIB_OFFSET   0x614

Definition at line 158 of file systemcontrol.h.

◆ SYSCTL_RCGCI2C

#define SYSCTL_RCGCI2C   MMIO32(SYSCTL_BASE + SYSCTL_RCGCI2C_OFFSET)

Definition at line 165 of file systemcontrol.h.

◆ SYSCTL_RCGCI2C_OFFSET

#define SYSCTL_RCGCI2C_OFFSET   0x620

Definition at line 164 of file systemcontrol.h.

◆ SYSCTL_RCGCPWM

#define SYSCTL_RCGCPWM   MMIO32(SYSCTL_BASE + SYSCTL_RCGCPWM_OFFSET)

Definition at line 175 of file systemcontrol.h.

◆ SYSCTL_RCGCPWM_OFFSET

#define SYSCTL_RCGCPWM_OFFSET   0x640

Definition at line 174 of file systemcontrol.h.

◆ SYSCTL_RCGCQEI

#define SYSCTL_RCGCQEI   MMIO32(SYSCTL_BASE + SYSCTL_RCGCQEI_OFFSET)

Definition at line 177 of file systemcontrol.h.

◆ SYSCTL_RCGCQEI_OFFSET

#define SYSCTL_RCGCQEI_OFFSET   0x644

Definition at line 176 of file systemcontrol.h.

◆ SYSCTL_RCGCSSI

#define SYSCTL_RCGCSSI   MMIO32(SYSCTL_BASE + SYSCTL_RCGCSSI_OFFSET)

Definition at line 163 of file systemcontrol.h.

◆ SYSCTL_RCGCSSI_OFFSET

#define SYSCTL_RCGCSSI_OFFSET   0x61C

Definition at line 162 of file systemcontrol.h.

◆ SYSCTL_RCGCTIMER

#define SYSCTL_RCGCTIMER   MMIO32(SYSCTL_BASE + SYSCTL_RCGCTIMER_OFFSET)

Definition at line 153 of file systemcontrol.h.

◆ SYSCTL_RCGCTIMER_OFFSET

#define SYSCTL_RCGCTIMER_OFFSET   0x604

Definition at line 152 of file systemcontrol.h.

◆ SYSCTL_RCGCUART

#define SYSCTL_RCGCUART   MMIO32(SYSCTL_BASE + SYSCTL_RCGCUART_OFFSET)

Definition at line 161 of file systemcontrol.h.

◆ SYSCTL_RCGCUART_OFFSET

#define SYSCTL_RCGCUART_OFFSET   0x618

Definition at line 160 of file systemcontrol.h.

◆ SYSCTL_RCGCUSB

#define SYSCTL_RCGCUSB   MMIO32(SYSCTL_BASE + SYSCTL_RCGCUSB_OFFSET)

Definition at line 167 of file systemcontrol.h.

◆ SYSCTL_RCGCUSB_OFFSET

#define SYSCTL_RCGCUSB_OFFSET   0x628

Definition at line 166 of file systemcontrol.h.

◆ SYSCTL_RCGCWD

#define SYSCTL_RCGCWD   MMIO32(SYSCTL_BASE + SYSCTL_RCGCWD_OFFSET)

Definition at line 151 of file systemcontrol.h.

◆ SYSCTL_RCGCWD_OFFSET

#define SYSCTL_RCGCWD_OFFSET   0x600

Definition at line 150 of file systemcontrol.h.

◆ SYSCTL_RCGCWTIMER

#define SYSCTL_RCGCWTIMER   MMIO32(SYSCTL_BASE + SYSCTL_RCGCWTIMER_OFFSET)

Definition at line 181 of file systemcontrol.h.

◆ SYSCTL_RCGCWTIMER_OFFSET

#define SYSCTL_RCGCWTIMER_OFFSET   0x65C

Definition at line 180 of file systemcontrol.h.

◆ SYSCTL_RESC

#define SYSCTL_RESC   MMIO32(SYSCTL_BASE + SYSCTL_RESC_OFFSET)

Definition at line 58 of file systemcontrol.h.

◆ SYSCTL_RESC_BOR

#define SYSCTL_RESC_BOR   (1 << 2)

Brown-Out Reset.

Definition at line 437 of file systemcontrol.h.

◆ SYSCTL_RESC_EXT

#define SYSCTL_RESC_EXT   (1 << 0)

External Reset.

Definition at line 441 of file systemcontrol.h.

◆ SYSCTL_RESC_MOSCFAIL

#define SYSCTL_RESC_MOSCFAIL   (1 << 18)

MOSC Failure Reset.

Definition at line 429 of file systemcontrol.h.

◆ SYSCTL_RESC_OFFSET

#define SYSCTL_RESC_OFFSET   0x05C

Definition at line 57 of file systemcontrol.h.

◆ SYSCTL_RESC_POR

#define SYSCTL_RESC_POR   (1 << 1)

Power-On Reset.

Definition at line 439 of file systemcontrol.h.

◆ SYSCTL_RESC_SW

#define SYSCTL_RESC_SW   (1 << 4)

Software Reset.

Definition at line 433 of file systemcontrol.h.

◆ SYSCTL_RESC_WDT0

#define SYSCTL_RESC_WDT0   (1 << 3)

Watchdog Timer 0 Reset.

Definition at line 435 of file systemcontrol.h.

◆ SYSCTL_RESC_WDT1

#define SYSCTL_RESC_WDT1   (1 << 5)

Watchdog Timer 1 Reset.

Definition at line 431 of file systemcontrol.h.

◆ SYSCTL_RIS

#define SYSCTL_RIS   MMIO32(SYSCTL_BASE + SYSCTL_RIS_OFFSET)

Definition at line 52 of file systemcontrol.h.

◆ SYSCTL_RIS_BORRIS

#define SYSCTL_RIS_BORRIS   (1 << 1)

Brown-Out Reset Raw Interrupt Status.

Definition at line 395 of file systemcontrol.h.

◆ SYSCTL_RIS_MOFRIS

#define SYSCTL_RIS_MOFRIS   (1 << 3)

Main Oscillator Failure Raw Interrupt Status.

Definition at line 393 of file systemcontrol.h.

◆ SYSCTL_RIS_MOSCPUPRIS

#define SYSCTL_RIS_MOSCPUPRIS   (1 << 8)

MOSC Power Up Raw Interrupt Status.

Definition at line 387 of file systemcontrol.h.

◆ SYSCTL_RIS_OFFSET

#define SYSCTL_RIS_OFFSET   0x050

Definition at line 51 of file systemcontrol.h.

◆ SYSCTL_RIS_PLLLRIS

#define SYSCTL_RIS_PLLLRIS   (1 << 6)

PLL Lock Raw Interrupt Status.

Definition at line 391 of file systemcontrol.h.

◆ SYSCTL_RIS_USBPLLLRIS

#define SYSCTL_RIS_USBPLLLRIS   (1 << 7)

USB PLL Lock Raw Interrupt Status.

Definition at line 389 of file systemcontrol.h.

◆ SYSCTL_SCGCACMP

#define SYSCTL_SCGCACMP   MMIO32(SYSCTL_BASE + SYSCTL_SCGCACMP_OFFSET)

Definition at line 206 of file systemcontrol.h.

◆ SYSCTL_SCGCACMP_OFFSET

#define SYSCTL_SCGCACMP_OFFSET   0x73C

Definition at line 205 of file systemcontrol.h.

◆ SYSCTL_SCGCADC

#define SYSCTL_SCGCADC   MMIO32(SYSCTL_BASE + SYSCTL_SCGCADC_OFFSET)

Definition at line 204 of file systemcontrol.h.

◆ SYSCTL_SCGCADC_OFFSET

#define SYSCTL_SCGCADC_OFFSET   0x738

Definition at line 203 of file systemcontrol.h.

◆ SYSCTL_SCGCCAN

#define SYSCTL_SCGCCAN   MMIO32(SYSCTL_BASE + SYSCTL_SCGCCAN_OFFSET)

Definition at line 202 of file systemcontrol.h.

◆ SYSCTL_SCGCCAN_OFFSET

#define SYSCTL_SCGCCAN_OFFSET   0x734

Definition at line 201 of file systemcontrol.h.

◆ SYSCTL_SCGCDMA

#define SYSCTL_SCGCDMA   MMIO32(SYSCTL_BASE + SYSCTL_SCGCDMA_OFFSET)

Definition at line 190 of file systemcontrol.h.

◆ SYSCTL_SCGCDMA_OFFSET

#define SYSCTL_SCGCDMA_OFFSET   0x70C

Definition at line 189 of file systemcontrol.h.

◆ SYSCTL_SCGCEEPROM

#define SYSCTL_SCGCEEPROM   MMIO32(SYSCTL_BASE + SYSCTL_SCGCEEPROM_OFFSET)

Definition at line 212 of file systemcontrol.h.

◆ SYSCTL_SCGCEEPROM_OFFSET

#define SYSCTL_SCGCEEPROM_OFFSET   0x758

Definition at line 211 of file systemcontrol.h.

◆ SYSCTL_SCGCGPIO

#define SYSCTL_SCGCGPIO   MMIO32(SYSCTL_BASE + SYSCTL_SCGCGPIO_OFFSET)

Definition at line 188 of file systemcontrol.h.

◆ SYSCTL_SCGCGPIO_OFFSET

#define SYSCTL_SCGCGPIO_OFFSET   0x708

Definition at line 187 of file systemcontrol.h.

◆ SYSCTL_SCGCHIB

#define SYSCTL_SCGCHIB   MMIO32(SYSCTL_BASE + SYSCTL_SCGCHIB_OFFSET)

Definition at line 192 of file systemcontrol.h.

◆ SYSCTL_SCGCHIB_OFFSET

#define SYSCTL_SCGCHIB_OFFSET   0x714

Definition at line 191 of file systemcontrol.h.

◆ SYSCTL_SCGCI2C

#define SYSCTL_SCGCI2C   MMIO32(SYSCTL_BASE + SYSCTL_SCGCI2C_OFFSET)

Definition at line 198 of file systemcontrol.h.

◆ SYSCTL_SCGCI2C_OFFSET

#define SYSCTL_SCGCI2C_OFFSET   0x720

Definition at line 197 of file systemcontrol.h.

◆ SYSCTL_SCGCPWM

#define SYSCTL_SCGCPWM   MMIO32(SYSCTL_BASE + SYSCTL_SCGCPWM_OFFSET)

Definition at line 208 of file systemcontrol.h.

◆ SYSCTL_SCGCPWM_OFFSET

#define SYSCTL_SCGCPWM_OFFSET   0x740

Definition at line 207 of file systemcontrol.h.

◆ SYSCTL_SCGCQEI

#define SYSCTL_SCGCQEI   MMIO32(SYSCTL_BASE + SYSCTL_SCGCQEI_OFFSET)

Definition at line 210 of file systemcontrol.h.

◆ SYSCTL_SCGCQEI_OFFSET

#define SYSCTL_SCGCQEI_OFFSET   0x744

Definition at line 209 of file systemcontrol.h.

◆ SYSCTL_SCGCSSI

#define SYSCTL_SCGCSSI   MMIO32(SYSCTL_BASE + SYSCTL_SCGCSSI_OFFSET)

Definition at line 196 of file systemcontrol.h.

◆ SYSCTL_SCGCSSI_OFFSET

#define SYSCTL_SCGCSSI_OFFSET   0x71C

Definition at line 195 of file systemcontrol.h.

◆ SYSCTL_SCGCTIMER

#define SYSCTL_SCGCTIMER   MMIO32(SYSCTL_BASE + SYSCTL_SCGCTIMER_OFFSET)

Definition at line 186 of file systemcontrol.h.

◆ SYSCTL_SCGCTIMER_OFFSET

#define SYSCTL_SCGCTIMER_OFFSET   0x704

Definition at line 185 of file systemcontrol.h.

◆ SYSCTL_SCGCUART

#define SYSCTL_SCGCUART   MMIO32(SYSCTL_BASE + SYSCTL_SCGCUART_OFFSET)

Definition at line 194 of file systemcontrol.h.

◆ SYSCTL_SCGCUART_OFFSET

#define SYSCTL_SCGCUART_OFFSET   0x718

Definition at line 193 of file systemcontrol.h.

◆ SYSCTL_SCGCUSB

#define SYSCTL_SCGCUSB   MMIO32(SYSCTL_BASE + SYSCTL_SCGCUSB_OFFSET)

Definition at line 200 of file systemcontrol.h.

◆ SYSCTL_SCGCUSB_OFFSET

#define SYSCTL_SCGCUSB_OFFSET   0x728

Definition at line 199 of file systemcontrol.h.

◆ SYSCTL_SCGCWD

#define SYSCTL_SCGCWD   MMIO32(SYSCTL_BASE + SYSCTL_SCGCWD_OFFSET)

Definition at line 184 of file systemcontrol.h.

◆ SYSCTL_SCGCWD_OFFSET

#define SYSCTL_SCGCWD_OFFSET   0x700

Definition at line 183 of file systemcontrol.h.

◆ SYSCTL_SCGCWTIMER

#define SYSCTL_SCGCWTIMER   MMIO32(SYSCTL_BASE + SYSCTL_SCGCWTIMER_OFFSET)

Definition at line 214 of file systemcontrol.h.

◆ SYSCTL_SCGCWTIMER_OFFSET

#define SYSCTL_SCGCWTIMER_OFFSET   0x75C

Definition at line 213 of file systemcontrol.h.

◆ SYSCTL_SRACMP

#define SYSCTL_SRACMP   MMIO32(SYSCTL_BASE + SYSCTL_SRACMP_OFFSET)

Definition at line 140 of file systemcontrol.h.

◆ SYSCTL_SRACMP_OFFSET

#define SYSCTL_SRACMP_OFFSET   0x53C

Definition at line 139 of file systemcontrol.h.

◆ SYSCTL_SRADC

#define SYSCTL_SRADC   MMIO32(SYSCTL_BASE + SYSCTL_SRADC_OFFSET)

Definition at line 138 of file systemcontrol.h.

◆ SYSCTL_SRADC_OFFSET

#define SYSCTL_SRADC_OFFSET   0x538

Definition at line 137 of file systemcontrol.h.

◆ SYSCTL_SRCAN

#define SYSCTL_SRCAN   MMIO32(SYSCTL_BASE + SYSCTL_SRCAN_OFFSET)

Definition at line 136 of file systemcontrol.h.

◆ SYSCTL_SRCAN_OFFSET

#define SYSCTL_SRCAN_OFFSET   0x534

Definition at line 135 of file systemcontrol.h.

◆ SYSCTL_SRDMA

#define SYSCTL_SRDMA   MMIO32(SYSCTL_BASE + SYSCTL_SRDMA_OFFSET)

Definition at line 124 of file systemcontrol.h.

◆ SYSCTL_SRDMA_OFFSET

#define SYSCTL_SRDMA_OFFSET   0x50C

Definition at line 123 of file systemcontrol.h.

◆ SYSCTL_SREEPROM

#define SYSCTL_SREEPROM   MMIO32(SYSCTL_BASE + SYSCTL_SREEPROM_OFFSET)

Definition at line 146 of file systemcontrol.h.

◆ SYSCTL_SREEPROM_OFFSET

#define SYSCTL_SREEPROM_OFFSET   0x558

Definition at line 145 of file systemcontrol.h.

◆ SYSCTL_SRGPIO

#define SYSCTL_SRGPIO   MMIO32(SYSCTL_BASE + SYSCTL_SRGPIO_OFFSET)

Definition at line 122 of file systemcontrol.h.

◆ SYSCTL_SRGPIO_OFFSET

#define SYSCTL_SRGPIO_OFFSET   0x508

Definition at line 121 of file systemcontrol.h.

◆ SYSCTL_SRHIB

#define SYSCTL_SRHIB   MMIO32(SYSCTL_BASE + SYSCTL_SRHIB_OFFSET)

Definition at line 126 of file systemcontrol.h.

◆ SYSCTL_SRHIB_OFFSET

#define SYSCTL_SRHIB_OFFSET   0x514

Definition at line 125 of file systemcontrol.h.

◆ SYSCTL_SRI2C

#define SYSCTL_SRI2C   MMIO32(SYSCTL_BASE + SYSCTL_SRI2C_OFFSET)

Definition at line 132 of file systemcontrol.h.

◆ SYSCTL_SRI2C_OFFSET

#define SYSCTL_SRI2C_OFFSET   0x520

Definition at line 131 of file systemcontrol.h.

◆ SYSCTL_SRPWM

#define SYSCTL_SRPWM   MMIO32(SYSCTL_BASE + SYSCTL_SRPWM_OFFSET)

Definition at line 142 of file systemcontrol.h.

◆ SYSCTL_SRPWM_OFFSET

#define SYSCTL_SRPWM_OFFSET   0x540

Definition at line 141 of file systemcontrol.h.

◆ SYSCTL_SRQEI

#define SYSCTL_SRQEI   MMIO32(SYSCTL_BASE + SYSCTL_SRQEI_OFFSET)

Definition at line 144 of file systemcontrol.h.

◆ SYSCTL_SRQEI_OFFSET

#define SYSCTL_SRQEI_OFFSET   0x544

Definition at line 143 of file systemcontrol.h.

◆ SYSCTL_SRSSI

#define SYSCTL_SRSSI   MMIO32(SYSCTL_BASE + SYSCTL_SRSSI_OFFSET)

Definition at line 130 of file systemcontrol.h.

◆ SYSCTL_SRSSI_OFFSET

#define SYSCTL_SRSSI_OFFSET   0x51C

Definition at line 129 of file systemcontrol.h.

◆ SYSCTL_SRTIMER

#define SYSCTL_SRTIMER   MMIO32(SYSCTL_BASE + SYSCTL_SRTIMER_OFFSET)

Definition at line 120 of file systemcontrol.h.

◆ SYSCTL_SRTIMER_OFFSET

#define SYSCTL_SRTIMER_OFFSET   0x504

Definition at line 119 of file systemcontrol.h.

◆ SYSCTL_SRUART

#define SYSCTL_SRUART   MMIO32(SYSCTL_BASE + SYSCTL_SRUART_OFFSET)

Definition at line 128 of file systemcontrol.h.

◆ SYSCTL_SRUART_OFFSET

#define SYSCTL_SRUART_OFFSET   0x518

Definition at line 127 of file systemcontrol.h.

◆ SYSCTL_SRUSB

#define SYSCTL_SRUSB   MMIO32(SYSCTL_BASE + SYSCTL_SRUSB_OFFSET)

Definition at line 134 of file systemcontrol.h.

◆ SYSCTL_SRUSB_OFFSET

#define SYSCTL_SRUSB_OFFSET   0x528

Definition at line 133 of file systemcontrol.h.

◆ SYSCTL_SRWD

#define SYSCTL_SRWD   MMIO32(SYSCTL_BASE + SYSCTL_SRWD_OFFSET)

Definition at line 118 of file systemcontrol.h.

◆ SYSCTL_SRWD_OFFSET

#define SYSCTL_SRWD_OFFSET   0x500

Definition at line 117 of file systemcontrol.h.

◆ SYSCTL_SRWTIMER

#define SYSCTL_SRWTIMER   MMIO32(SYSCTL_BASE + SYSCTL_SRWTIMER_OFFSET)

Definition at line 148 of file systemcontrol.h.

◆ SYSCTL_SRWTIMER_OFFSET

#define SYSCTL_SRWTIMER_OFFSET   0x55C

Definition at line 147 of file systemcontrol.h.

◆ SYSCTL_SYSPROP

#define SYSCTL_SYSPROP   MMIO32(SYSCTL_BASE + SYSCTL_SYSPROP_OFFSET)

Definition at line 72 of file systemcontrol.h.

◆ SYSCTL_SYSPROP_FPU

#define SYSCTL_SYSPROP_FPU   (1 << 0)

FPU present.

Definition at line 567 of file systemcontrol.h.

◆ SYSCTL_SYSPROP_OFFSET

#define SYSCTL_SYSPROP_OFFSET   0x14C

Definition at line 71 of file systemcontrol.h.

Enumeration Type Documentation

◆ lm4f_clken

enum lm4f_clken

Clock enable definitions.

The definitions are specified in the form 31:5 register offset from SYSCTL_BASE for the clock register 4:0 bit offset for the given peripheral

The names have the form [clock_type]_[periph_type]_[periph_number] Where clock_type is RCC for run clock SCC for sleep clock DCC for deep-sleep clock

Enumerator
RCC_WD0 
RCC_WD1 
RCC_TIMER0 
RCC_TIMER1 
RCC_TIMER2 
RCC_TIMER3 
RCC_TIMER4 
RCC_TIMER5 
RCC_GPIOA 
RCC_GPIOB 
RCC_GPIOC 
RCC_GPIOD 
RCC_GPIOE 
RCC_GPIOF 
RCC_GPIOG 
RCC_GPIOH 
RCC_GPIOJ 
RCC_GPIOK 
RCC_GPIOL 
RCC_GPIOM 
RCC_GPION 
RCC_GPIOP 
RCC_GPIOQ 
RCC_DMA 
RCC_HIB 
RCC_UART0 
RCC_UART1 
RCC_UART2 
RCC_UART3 
RCC_UART4 
RCC_UART5 
RCC_UART6 
RCC_UART7 
RCC_SSI0 
RCC_SSI1 
RCC_SSI2 
RCC_SSI3 
RCC_I2C0 
RCC_I2C1 
RCC_I2C2 
RCC_I2C3 
RCC_I2C4 
RCC_I2C5 
RCC_USB0 
RCC_CAN0 
RCC_CAN1 
RCC_ADC0 
RCC_ADC1 
RCC_ACMP0 
RCC_PWM0 
RCC_PWM1 
RCC_QEI0 
RCC_QEI1 
RCC_EEPROM0 
RCC_WTIMER0 
RCC_WTIMER1 
RCC_WTIMER2 
RCC_WTIMER3 
RCC_WTIMER4 
RCC_WTIMER5 
SCC_WD0 
SCC_WD1 
SCC_TIMER0 
SCC_TIMER1 
SCC_TIMER2 
SCC_TIMER3 
SCC_TIMER4 
SCC_TIMER5 
SCC_GPIOA 
SCC_GPIOB 
SCC_GPIOC 
SCC_GPIOD 
SCC_GPIOE 
SCC_GPIOF 
SCC_GPIOG 
SCC_GPIOH 
SCC_GPIOJ 
SCC_GPIOK 
SCC_GPIOL 
SCC_GPIOM 
SCC_GPION 
SCC_GPIOP 
SCC_GPIOQ 
SCC_DMA 
SCC_HIB 
SCC_UART0 
SCC_UART1 
SCC_UART2 
SCC_UART3 
SCC_UART4 
SCC_UART5 
SCC_UART6 
SCC_UART7 
SCC_SSI0 
SCC_SSI1 
SCC_SSI2 
SCC_SSI3 
SCC_I2C0 
SCC_I2C1 
SCC_I2C2 
SCC_I2C3 
SCC_I2C4 
SCC_I2C5 
SCC_USB0 
SCC_CAN0 
SCC_CAN1 
SCC_ADC0 
SCC_ADC1 
SCC_ACMP0 
SCC_PWM0 
SCC_PWM1 
SCC_QEI0 
SCC_QEI1 
SCC_EEPROM0 
SCC_WTIMER0 
SCC_WTIMER1 
SCC_WTIMER2 
SCC_WTIMER3 
SCC_WTIMER4 
SCC_WTIMER5 
DCC_WD0 
DCC_WD1 
DCC_TIMER0 
DCC_TIMER1 
DCC_TIMER2 
DCC_TIMER3 
DCC_TIMER4 
DCC_TIMER5 
DCC_GPIOA 
DCC_GPIOB 
DCC_GPIOC 
DCC_GPIOD 
DCC_GPIOE 
DCC_GPIOF 
DCC_GPIOG 
DCC_GPIOH 
DCC_GPIOJ 
DCC_GPIOK 
DCC_GPIOL 
DCC_GPIOM 
DCC_GPION 
DCC_GPIOP 
DCC_GPIOQ 
DCC_DMA 
DCC_HIB 
DCC_UART0 
DCC_UART1 
DCC_UART2 
DCC_UART3 
DCC_UART4 
DCC_UART5 
DCC_UART6 
DCC_UART7 
DCC_SSI0 
DCC_SSI1 
DCC_SSI2 
DCC_SSI3 
DCC_I2C0 
DCC_I2C1 
DCC_I2C2 
DCC_I2C3 
DCC_I2C4 
DCC_I2C5 
DCC_USB0 
DCC_CAN0 
DCC_CAN1 
DCC_ADC0 
DCC_ADC1 
DCC_ACMP0 
DCC_PWM0 
DCC_PWM1 
DCC_QEI0 
DCC_QEI1 
DCC_EEPROM0 
DCC_WTIMER0 
DCC_WTIMER1 
DCC_WTIMER2 
DCC_WTIMER3 
DCC_WTIMER4 
DCC_WTIMER5 

Definition at line 628 of file systemcontrol.h.

Function Documentation

◆ periph_clock_disable()

void periph_clock_disable ( enum lm4f_clken  periph)

Disable the clock source for the peripheral.

Parameters
[in]periphperipheral and clock type to enable
See also
lm4f_clken

Definition at line 37 of file systemcontrol.c.

References MMIO32, and SYSCTL_BASE.

◆ periph_clock_enable()

void periph_clock_enable ( enum lm4f_clken  periph)

Enable the clock source for the peripheral.

Parameters
[in]periphperipheral and clock type to enable
See also
lm4f_clken

Definition at line 27 of file systemcontrol.c.

References MMIO32, and SYSCTL_BASE.