CAN Mask Register

CAN Interrupt Mask Register bit definitions. More...

Collaboration diagram for CAN Mask Register:

Macros
#define	CAN_IMR_DOIM   BIT0
	DOIM: DOI Interrupt Mask. More...
#define	CAN_IMR_BEIM   BIT1
	BEIM: BEI Interrupt Mask. More...
#define	CAN_IMR_TIM   BIT2
	TIM: TI Interrupt Mask. More...
#define	CAN_IMR_RIM   BIT3
	RIM: RI Interrupt Mask. More...
#define	CAN_IMR_EPIM   BIT4
	EPIM: EPI Interrupt Mask. More...
#define	CAN_IMR_EWIM   BIT5
	EWIM: EWI Interrupt Mask. More...
#define	CAN_IMR_ALIM   BIT6
	ALIM: ALI Interrupt Mask. More...

Detailed Description

CAN Interrupt Mask Register bit definitions.

0: disables/masks interrupt 1: enables interrupt

Macro Definition Documentation

CAN_IMR_ALIM

#define CAN_IMR_ALIM   BIT6

ALIM: ALI Interrupt Mask.

Definition at line 177 of file can.h.

CAN_IMR_BEIM

#define CAN_IMR_BEIM   BIT1

BEIM: BEI Interrupt Mask.

Definition at line 167 of file can.h.

CAN_IMR_DOIM

#define CAN_IMR_DOIM   BIT0

DOIM: DOI Interrupt Mask.

Definition at line 165 of file can.h.

CAN_IMR_EPIM

#define CAN_IMR_EPIM   BIT4

EPIM: EPI Interrupt Mask.

Definition at line 173 of file can.h.

CAN_IMR_EWIM

#define CAN_IMR_EWIM   BIT5

EWIM: EWI Interrupt Mask.

Definition at line 175 of file can.h.

CAN_IMR_RIM

#define CAN_IMR_RIM   BIT3

RIM: RI Interrupt Mask.

Definition at line 171 of file can.h.

CAN_IMR_TIM

#define CAN_IMR_TIM   BIT2

TIM: TI Interrupt Mask.

Definition at line 169 of file can.h.