CAN ISR/SR/CMR/MR Registers

Collaboration diagram for CAN ISR/SR/CMR/MR Registers:

Macros
#define	CAN_ISR_SR_CMR_MR(can_base)   MMIO32((can_base) + 0x0000)
	This is the 32-bit memory mapped read/write accessor for: More...
#define	CAN_ISR_SR_CMR_MR_SET(can_base, bits)
#define	CAN_ISR_SR_CMR_MR_CLEAR(can_base, bits)

Detailed Description

Macro Definition Documentation

CAN_ISR_SR_CMR_MR

#define CAN_ISR_SR_CMR_MR

(

can_base

)

MMIO32((can_base) + 0x0000)

This is the 32-bit memory mapped read/write accessor for:

• ISR - bits 31:24 - Interrupt Status/ACK Register RW, default 00h
• SR - bits 23:16 - Status Register RO, default 00h
• CMR - bits 15:8 - Command RW, default 00h
• MR - bits 7:0 - Mode RW, default 04h When writing, be sure to use CAN_ISR_SR_CMR_MR_SET and CAN_ISR_SR_CMR_MR_CLEAR so as to avoid inadvertently Acknowledging an ISR bit. Writing '1' to one of the ISR bits when it is triggered/set will ACK/clear the bit.

Definition at line 54 of file can.h.

CAN_ISR_SR_CMR_MR_CLEAR

#define CAN_ISR_SR_CMR_MR_CLEAR	(		can_base,
			bits
	)

Value:

                                (CAN_ISR_SR_CMR_MR(can_base) = \
                                (CAN_ISR_SR_CMR_MR(can_base) & 0x00FFFFFF) & ~(bits))

Definition at line 57 of file can.h.

CAN_ISR_SR_CMR_MR_SET

#define CAN_ISR_SR_CMR_MR_SET	(		can_base,
			bits
	)

Value:

                                (CAN_ISR_SR_CMR_MR(can_base) = \
                                (CAN_ISR_SR_CMR_MR(can_base) & 0x00FFFFFF) | (bits))

Definition at line 55 of file can.h.