Interrupt ID Register bits

Collaboration diagram for Interrupt ID Register bits:

Macros
#define	USART_IIR_INTSTATUS   BIT0
	This bit is active low to indicate an interrupt is pending. More...
#define	USART_IIR_TXEMPTY   (0x02)
	TX Holding Register Empty. More...
#define	USART_IIR_RXAVAIL   (0x04)
	Receive Data Available. More...
#define	USART_IIR_RXLINESTAT   (0x06)
	Receive Line Status. More...
#define	USART_IIR_RXTIMEOUT   (0x0C)
	Receive FIFO Character Time-out. More...

Detailed Description

Macro Definition Documentation

USART_IIR_INTSTATUS

#define USART_IIR_INTSTATUS   BIT0

This bit is active low to indicate an interrupt is pending.

Definition at line 77 of file usart.h.

USART_IIR_RXAVAIL

#define USART_IIR_RXAVAIL   (0x04)

Receive Data Available.

Definition at line 81 of file usart.h.

USART_IIR_RXLINESTAT

#define USART_IIR_RXLINESTAT   (0x06)

Receive Line Status.

Definition at line 83 of file usart.h.

USART_IIR_RXTIMEOUT

#define USART_IIR_RXTIMEOUT   (0x0C)

Receive FIFO Character Time-out.

Definition at line 85 of file usart.h.

USART_IIR_TXEMPTY

#define USART_IIR_TXEMPTY   (0x02)

TX Holding Register Empty.

Definition at line 79 of file usart.h.