libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
port.h
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1/** @defgroup port_defines IO Port Definitions
2 *
3 * @ingroup SAMD_defines
4 *
5 * @brief Defined Constants and Types for the SAMD Port controller
6 *
7 * @copyright SPDX: LGPL-3.0-or-later
8 * @author 2016 Karl Palsson <karlp@tweak.net.au>
9 * @author 2020 Gwenhael Goavec-Merou <gwenhael.goavec-merou@trabucayre.com>
10 */
11
12#pragma once
13
14/**@{*/
15
16#include <libopencm3/cm3/common.h>
17#include <libopencm3/sam/d/memorymap.h>
18
19/* --- Convenience macros ------------------------------------------------ */
20
21/**@defgroup port_reg_base Port Base registers
22 * @{
23 */
24#define PORTA (PORT_BASE + 0)
25#define PORTB (PORT_BASE + 0x80)
26/**@}*/
27
28/* GPIO number definitions (for convenience) */
29/** @defgroup gpio_pin_id GPIO Pin Identifiers
30@{*/
31#define GPIO0 (1 << 0)
32#define GPIO1 (1 << 1)
33#define GPIO2 (1 << 2)
34#define GPIO3 (1 << 3)
35#define GPIO4 (1 << 4)
36#define GPIO5 (1 << 5)
37#define GPIO6 (1 << 6)
38#define GPIO7 (1 << 7)
39#define GPIO8 (1 << 8)
40#define GPIO9 (1 << 9)
41#define GPIO10 (1 << 10)
42#define GPIO11 (1 << 11)
43#define GPIO12 (1 << 12)
44#define GPIO13 (1 << 13)
45#define GPIO14 (1 << 14)
46#define GPIO15 (1 << 15)
47#define GPIO16 (1 << 16)
48#define GPIO17 (1 << 17)
49#define GPIO18 (1 << 18)
50#define GPIO19 (1 << 19)
51#define GPIO20 (1 << 20)
52#define GPIO21 (1 << 21)
53#define GPIO22 (1 << 22)
54#define GPIO23 (1 << 23)
55#define GPIO24 (1 << 24)
56#define GPIO25 (1 << 25)
57#define GPIO26 (1 << 26)
58#define GPIO27 (1 << 27)
59#define GPIO28 (1 << 28)
60#define GPIO29 (1 << 29)
61#define GPIO30 (1 << 30)
62#define GPIO31 (1 << 31)
63#define GPIO_ALL 0xffff
64/**@}*/
65
66/* GPIO mux definitions (for convenience) */
67/** @defgroup gpio_mux GPIO mux configuration
68@{*/
69enum port_mux {
70 PORT_PMUX_FUN_A = 0,
71 PORT_PMUX_FUN_B,
72 PORT_PMUX_FUN_C,
73 PORT_PMUX_FUN_D,
74 PORT_PMUX_FUN_E,
75 PORT_PMUX_FUN_F,
76 PORT_PMUX_FUN_G,
77 PORT_PMUX_FUN_H,
78 PORT_PMUX_FUN_I
79};
80/**@}*/
81
82/** @defgroup port_registers PORT Registers
83 * @{
84 */
85/** Direction register */
86#define PORT_DIR(port) MMIO32((port) + 0x0000)
87
88/** Direction clear register */
89#define PORT_DIRCLR(port) MMIO32((port) + 0x0004)
90
91/** Direction set register */
92#define PORT_DIRSET(port) MMIO32((port) + 0x0008)
93
94/** Direction toggle register */
95#define PORT_DIRTGL(port) MMIO32((port) + 0x000c)
96
97/** output register */
98#define PORT_OUT(port) MMIO32((port) + 0x0010)
99
100/** output clear register */
101#define PORT_OUTCLR(port) MMIO32((port) + 0x0014)
102
103/** output set register */
104#define PORT_OUTSET(port) MMIO32((port) + 0x0018)
105
106/** output toggle register */
107#define PORT_OUTTGL(port) MMIO32((port) + 0x001c)
108
109/** input register */
110#define PORT_IN(port) MMIO32((port) + 0x0020)
111
112/** Control register */
113#define PORT_CTRL(port) MMIO32((port) + 0x0024)
114
115/** Write configuration register */
116#define PORT_WRCONFIG(port) MMIO32((port) + 0x0028)
117
118/** Peripheral multiplexing registers */
119#define PORT_PMUX(port, n) MMIO8((port) + 0x0030 + (n))
120
121/** Pin configuration registers */
122#define PORT_PINCFG(port, n) MMIO8((port) + 0x0040 + (n))
123/**@}*/
124
125/* --- PORTx_DIR values ---------------------------------------------------- */
126
127/* PORTx_DIR[31:0]: DIRy[31:0]: Port x set bit y direction [y=0..31] */
128
129/* --- PORTx_DIRCLR values ------------------------------------------------- */
130
131/* PORTx_DIRCLR[31:0]: DIRCLRy[31:0]: Port x set bit y as input [y=0..31] */
132
133/* --- PORTx_DIRSET values ------------------------------------------------- */
134
135/* PORTx_DIRSET[31:0]: DIRSETy[31:0]: Port x set bit y as output [y=0..31] */
136
137/* --- PORTx_DIRTGL values ------------------------------------------------- */
138
139/* PORTx_DIRTGL[31:0]: DIRTGLy[31:0]: Port x toggle bit y direction [y=0..31] */
140
141/* --- PORTx_OUT values ---------------------------------------------------- */
142
143/* PORTx_OUT[31:0]: OUTy[31:0]: Port output data [y=0..31] */
144
145/* --- PORTx_OUTCLR values ------------------------------------------------- */
146
147/* PORTx_OUTCLR[31:0]: OUTCLRy[31:0]: Port x reset bit y [y=0..31] */
148
149/* --- PORTx_OUTSET values ------------------------------------------------- */
150
151/* PORTx_OUTSET[31:0]: OUTSETy[31:0]: Port x set bit y [y=0..31] */
152
153/* --- PORTx_OUTTGL values ------------------------------------------------- */
154
155/* PORTx_OUTTGL[31:0]: OUTTGLy[31:0]: Port x toggle bit y [y=0..31] */
156
157/* --- PORTx_IN values ----------------------------------------------------- */
158
159/* PORTx_IN[31:0]: INy[31:0]: Port input data [y=0..31] */
160
161/* --- PORTx_CTRL values --------------------------------------------------- */
162
163/* PORTx_CTRL[31:0]: CTRLy[31:0]: Port input sampling mode [y=0..31] */
164
165/**@defgroup port_wrconfig_values PortX WRCONFIG Values
166 * @{
167 */
168/** HWSEL: Half word select: 0 [15:0], 1 [31:16] */
169#define PORT_WRCONFIG_HWSEL (1 << 31)
170
171/** WRPINCFG: Write PINCFG: 1 to update pins for selected by PINMASK */
172#define PORT_WRCONFIG_WRPINCFG (1 << 30)
173
174/** WRPMUX: Write PMUX: 1 to update pins pmux for selected by PINMASK */
175#define PORT_WRCONFIG_WRPMUX (1 << 28)
176
177/** PMUX: Peripheral Multiplexing: determine pmux for pins selected by PINMASK */
178#define PORT_WRCONFIG_PMUX(mux) ((0xf & (mux)) << 24)
179
180/** DRVSTR: Output Driver Strength Selection: determine strength for pins in PINMASK */
181#define PORT_WRCONFIG_DRVSTR (1 << 22)
182
183/** PULLEN: Pull Enable: enable PINCFGy.PULLEN for pins in PINMASK */
184#define PORT_WRCONFIG_PULLEN (1 << 18)
185
186/** INEN: Input Enable: enable PINCFGy.INEN for pins in PINMASK */
187#define PORT_WRCONFIG_INEN (1 << 17)
188
189/** PMUXEN: Peripheral Multiplexer Enable: enable PINCFGy.PMUXEN for pins in PINMASK */
190#define PORT_WRCONFIG_PMUXEN (1 << 16)
191
192/** PINMASK: Pin Mask for Multiple Pin Configuration: select pins to be configured
193 * [31:16] if HWSET=1, [15:0] if HWSET=0
194 */
195#define PORT_WRCONFIG_PINMASK(pins) ((0xffff & (pins)) << 0)
196/**@}*/
197
198/* --- PORTx_PMUX values --------------------------------------------------- */
199
200/** PMUXO: Peripheral Multiplexing for Odd-Numbered Pin: 2*x+1 pin multiplexing */
201#define PORT_PMUX_PMUXO(mux) ((0xf & (mux)) << 4)
202
203/** PMUXE: Peripheral Multiplexing for Even-Numbered Pin: 2*x pin multiplexing */
204#define PORT_PMUX_PMUXE(mux) ((0xf & (mux)) << 0)
205
206/* --- PORTx_PINCFGy values ------------------------------------------------ */
207
208/* Bit 7: Reserved */
209
210/** DRVSTR: Output Driver Strength Selection */
211#define PORT_PINCFG_DRVSTR (1 << 6)
212
213/** PULLEN: Pull Enable */
214#define PORT_PINCFG_PULLEN (1 << 2)
215
216/** INEN: Input Enable */
217#define PORT_PINCFG_INEN (1 << 1)
218
219/** PMUXEN: Peripheral Multiplexer Enable */
220#define PORT_PINCFG_PMUXEN (1 << 0)
221
222/* --- Convenience enums --------------------------------------------------- */
223
224/** @defgroup gpio_direction GPIO Pin direction
225@{*/
226#define GPIO_MODE_INPUT 0x00
227#define GPIO_MODE_OUTPUT 0x01
228#define GPIO_MODE_INOUT 0x02
229/**@}*/
230
231/** @defgroup gpio_cnf GPIO mode configuration
232@li Float
233@li PullDown
234@li PullUp
235@li Alternate Function
236@{*/
237#define GPIO_CNF_FLOAT 0x00
238#define GPIO_CNF_PULLDOWN 0x01
239#define GPIO_CNF_PULLUP 0x02
240#define GPIO_CNF_AF 0x03
241/**@}*/
242
243BEGIN_DECLS
244
245void gpio_mode_setup(uint32_t gpioport, uint8_t mode, uint8_t cnf, uint32_t gpios);
246void gpio_set_af(uint32_t gpioport, uint8_t af, uint32_t gpios);
247void gpio_set(uint32_t gpioport, uint32_t gpios);
248void gpio_clear(uint32_t gpioport, uint32_t gpios);
249uint32_t gpio_get(uint32_t gpioport, uint32_t gpios);
250void gpio_toggle(uint32_t gpioport, uint32_t gpios);
251uint32_t port_read(uint32_t port);
252void port_write(uint32_t port, uint32_t data);
253
254END_DECLS
255
256/**@}*/
END_DECLS
#define END_DECLS
Definition: common.h:34
BEGIN_DECLS
#define BEGIN_DECLS
Definition: common.h:33
port_mux
port_mux
Definition: port.h:69
PORT_PMUX_FUN_C
@ PORT_PMUX_FUN_C
Definition: port.h:72
PORT_PMUX_FUN_I
@ PORT_PMUX_FUN_I
Definition: port.h:78
PORT_PMUX_FUN_G
@ PORT_PMUX_FUN_G
Definition: port.h:76
PORT_PMUX_FUN_B
@ PORT_PMUX_FUN_B
Definition: port.h:71
PORT_PMUX_FUN_D
@ PORT_PMUX_FUN_D
Definition: port.h:73
PORT_PMUX_FUN_H
@ PORT_PMUX_FUN_H
Definition: port.h:77
PORT_PMUX_FUN_E
@ PORT_PMUX_FUN_E
Definition: port.h:74
PORT_PMUX_FUN_F
@ PORT_PMUX_FUN_F
Definition: port.h:75
PORT_PMUX_FUN_A
@ PORT_PMUX_FUN_A
Definition: port.h:70
gpio_get
uint32_t gpio_get(uint32_t gpioport, uint32_t gpios)
Read level of a group of Pins.
Definition: port.c:121
gpio_set
void gpio_set(uint32_t gpioport, uint32_t gpios)
Set a group of Pins.
Definition: port.c:95
port_write
void port_write(uint32_t port, uint32_t data)
Set level for all pins from a port.
Definition: port.c:160
gpio_clear
void gpio_clear(uint32_t gpioport, uint32_t gpios)
Clear a group of Pins.
Definition: port.c:108
gpio_toggle
void gpio_toggle(uint32_t gpioport, uint32_t gpios)
Toggle level of a group of Pins.
Definition: port.c:134
gpio_mode_setup
void gpio_mode_setup(uint32_t gpioport, uint8_t mode, uint8_t cnf, uint32_t gpios)
Initialize GPIO pins.
Definition: port.c:23
port_read
uint32_t port_read(uint32_t port)
Read level for all pins from a port.
Definition: port.c:147
gpio_set_af
void gpio_set_af(uint32_t gpioport, uint8_t af, uint32_t gpios)
Alternate function GPIO pins.
Definition: port.c:73