libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
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#define BKP_CR MMIO32(BACKUP_REGS_BASE + 0x30) |
#define BKP_CSR MMIO32(BACKUP_REGS_BASE + 0x34) |
#define BKP_DR1 MMIO32(BACKUP_REGS_BASE + 0x04) |
#define BKP_DR10 MMIO32(BACKUP_REGS_BASE + 0x28) |
#define BKP_DR11 MMIO32(BACKUP_REGS_BASE + 0x40) |
#define BKP_DR12 MMIO32(BACKUP_REGS_BASE + 0x44) |
#define BKP_DR13 MMIO32(BACKUP_REGS_BASE + 0x48) |
#define BKP_DR14 MMIO32(BACKUP_REGS_BASE + 0x4C) |
#define BKP_DR15 MMIO32(BACKUP_REGS_BASE + 0x50) |
#define BKP_DR16 MMIO32(BACKUP_REGS_BASE + 0x54) |
#define BKP_DR17 MMIO32(BACKUP_REGS_BASE + 0x58) |
#define BKP_DR18 MMIO32(BACKUP_REGS_BASE + 0x5C) |
#define BKP_DR19 MMIO32(BACKUP_REGS_BASE + 0x60) |
#define BKP_DR2 MMIO32(BACKUP_REGS_BASE + 0x08) |
#define BKP_DR20 MMIO32(BACKUP_REGS_BASE + 0x64) |
#define BKP_DR21 MMIO32(BACKUP_REGS_BASE + 0x68) |
#define BKP_DR22 MMIO32(BACKUP_REGS_BASE + 0x6C) |
#define BKP_DR23 MMIO32(BACKUP_REGS_BASE + 0x70) |
#define BKP_DR24 MMIO32(BACKUP_REGS_BASE + 0x74) |
#define BKP_DR25 MMIO32(BACKUP_REGS_BASE + 0x78) |
#define BKP_DR26 MMIO32(BACKUP_REGS_BASE + 0x7C) |
#define BKP_DR27 MMIO32(BACKUP_REGS_BASE + 0x80) |
#define BKP_DR28 MMIO32(BACKUP_REGS_BASE + 0x84) |
#define BKP_DR29 MMIO32(BACKUP_REGS_BASE + 0x88) |
#define BKP_DR3 MMIO32(BACKUP_REGS_BASE + 0x0C) |
#define BKP_DR30 MMIO32(BACKUP_REGS_BASE + 0x8C) |
#define BKP_DR31 MMIO32(BACKUP_REGS_BASE + 0x90) |
#define BKP_DR32 MMIO32(BACKUP_REGS_BASE + 0x94) |
#define BKP_DR33 MMIO32(BACKUP_REGS_BASE + 0x98) |
#define BKP_DR34 MMIO32(BACKUP_REGS_BASE + 0x9C) |
#define BKP_DR35 MMIO32(BACKUP_REGS_BASE + 0xA0) |
#define BKP_DR36 MMIO32(BACKUP_REGS_BASE + 0xA4) |
#define BKP_DR37 MMIO32(BACKUP_REGS_BASE + 0xA8) |
#define BKP_DR38 MMIO32(BACKUP_REGS_BASE + 0xAC) |
#define BKP_DR39 MMIO32(BACKUP_REGS_BASE + 0xB0) |
#define BKP_DR4 MMIO32(BACKUP_REGS_BASE + 0x10) |
#define BKP_DR40 MMIO32(BACKUP_REGS_BASE + 0xB4) |
#define BKP_DR41 MMIO32(BACKUP_REGS_BASE + 0xB8) |
#define BKP_DR42 MMIO32(BACKUP_REGS_BASE + 0xBC) |
#define BKP_DR5 MMIO32(BACKUP_REGS_BASE + 0x14) |
#define BKP_DR6 MMIO32(BACKUP_REGS_BASE + 0x18) |
#define BKP_DR7 MMIO32(BACKUP_REGS_BASE + 0x1C) |
#define BKP_DR8 MMIO32(BACKUP_REGS_BASE + 0x20) |
#define BKP_DR9 MMIO32(BACKUP_REGS_BASE + 0x24) |
#define BKP_RTCCR MMIO32(BACKUP_REGS_BASE + 0x2C) |