RCC_CFGR Microcontroller Clock Output Source
Collaboration diagram for RCC_CFGR Microcontroller Clock Output Source:
Macros | |
| #define | RCC_CFGR_MCO_SHIFT 24 |
| #define | RCC_CFGR_MCO_MASK 0xf |
| #define | RCC_CFGR_MCO_NOCLK 0x0 |
| #define | RCC_CFGR_MCO_SYSCLK 0x4 |
| #define | RCC_CFGR_MCO_HSI 0x5 |
| #define | RCC_CFGR_MCO_HSE 0x6 |
| #define | RCC_CFGR_MCO_PLL_DIV2 0x7 |
| #define | RCC_CFGR_MCO_PLL2 0x8 /* (**) */ |
| #define | RCC_CFGR_MCO_PLL3_DIV2 0x9 /* (**) */ |
| #define | RCC_CFGR_MCO_XT1 0xa /* (**) */ |
| #define | RCC_CFGR_MCO_PLL3 0xb /* (**) */ |
