#include <libopencm3/stm32/common/adc_common_v1_multi.h>

Include dependency graph for f4/adc.h:

Macros
#define	ADC_JOFR1(block) MMIO32((block) + 0x14)

#define	ADC_JOFR2(block) MMIO32((block) + 0x18)

#define	ADC_JOFR3(block) MMIO32((block) + 0x1c)

#define	ADC_JOFR4(block) MMIO32((block) + 0x20)

#define	ADC_HTR(block) MMIO32((block) + 0x24)

#define	ADC_LTR(block) MMIO32((block) + 0x28)

#define	ADC_SQR1(block) MMIO32((block) + 0x2c)

#define	ADC_SQR2(block) MMIO32((block) + 0x30)

#define	ADC_SQR3(block) MMIO32((block) + 0x34)

#define	ADC_JSQR(block) MMIO32((block) + 0x38)

#define	ADC_JDR1(block) MMIO32((block) + 0x3c)

#define	ADC_JDR2(block) MMIO32((block) + 0x40)

#define	ADC_JDR3(block) MMIO32((block) + 0x44)

#define	ADC_JDR4(block) MMIO32((block) + 0x48)

#define	ADC_DR(block) MMIO32((block) + 0x4c)

#define	ADC_CHANNEL_TEMP_F40 16

#define	ADC_CHANNEL_TEMP_F42 18

#define	ADC_CHANNEL_VREF 17

#define	ADC_CHANNEL_VBAT 18

#define	ADC_CR1_AWDCH_MAX 18

#define	ADC_CR2_EXTSEL_TIM1_CC1 (0x0 << 24)
	Timer 1 Compare Output 1. More...

#define	ADC_CR2_EXTSEL_TIM1_CC2 (0x1 << 24)
	Timer 1 Compare Output 2. More...

#define	ADC_CR2_EXTSEL_TIM1_CC3 (0x2 << 24)
	Timer 1 Compare Output 3. More...

#define	ADC_CR2_EXTSEL_TIM2_CC2 (0x3 << 24)
	Timer 2 Compare Output 2. More...

#define	ADC_CR2_EXTSEL_TIM2_CC3 (0x4 << 24)
	Timer 2 Compare Output 3. More...

#define	ADC_CR2_EXTSEL_TIM2_CC4 (0x5 << 24)
	Timer 2 Compare Output 4. More...

#define	ADC_CR2_EXTSEL_TIM2_TRGO (0x6 << 24)
	Timer 2 TRGO Event. More...

#define	ADC_CR2_EXTSEL_TIM3_CC1 (0x7 << 24)
	Timer 3 Compare Output 1. More...

#define	ADC_CR2_EXTSEL_TIM3_TRGO (0x8 << 24)
	Timer 3 TRGO Event. More...

#define	ADC_CR2_EXTSEL_TIM4_CC4 (0x9 << 24)
	Timer 4 Compare Output 4. More...

#define	ADC_CR2_EXTSEL_TIM5_CC1 (0xA << 24)
	Timer 5 Compare Output 1. More...

#define	ADC_CR2_EXTSEL_TIM5_CC2 (0xB << 24)
	Timer 5 Compare Output 2. More...

#define	ADC_CR2_EXTSEL_TIM5_CC3 (0xC << 24)
	Timer 5 Compare Output 3. More...

#define	ADC_CR2_EXTSEL_TIM8_CC1 (0xD << 24)
	Timer 8 Compare Output 1. More...

#define	ADC_CR2_EXTSEL_TIM8_TRGO (0xE << 24)
	Timer 8 TRGO Event. More...

#define	ADC_CR2_EXTSEL_EXTI_LINE_11 (0xF << 24)
	EXTI Line 11 Event. More...

#define	ADC_CR2_JEXTSEL_TIM1_CC4 (0x0 << 16)

#define	ADC_CR2_JEXTSEL_TIM1_TRGO (0x1 << 16)

#define	ADC_CR2_JEXTSEL_TIM2_CC1 (0x2 << 16)

#define	ADC_CR2_JEXTSEL_TIM2_TRGO (0x3 << 16)

#define	ADC_CR2_JEXTSEL_TIM3_CC2 (0x4 << 16)

#define	ADC_CR2_JEXTSEL_TIM3_CC4 (0x5 << 16)

#define	ADC_CR2_JEXTSEL_TIM4_CC1 (0x6 << 16)

#define	ADC_CR2_JEXTSEL_TIM4_CC2 (0x7 << 16)

#define	ADC_CR2_JEXTSEL_TIM4_CC3 (0x8 << 16)

#define	ADC_CR2_JEXTSEL_TIM4_TRGO (0x9 << 16)

#define	ADC_CR2_JEXTSEL_TIM5_CC4 (0xA << 16)

#define	ADC_CR2_JEXTSEL_TIM5_TRGO (0xB << 16)

#define	ADC_CR2_JEXTSEL_TIM8_CC2 (0xC << 16)

#define	ADC_CR2_JEXTSEL_TIM8_CC3 (0xD << 16)

#define	ADC_CR2_JEXTSEL_TIM8_CC4 (0xE << 16)

#define	ADC_CR2_JEXTSEL_EXTI_LINE_15 (0xF << 16)

#define	ADC_SMPR_SMP_3CYC 0x0

#define	ADC_SMPR_SMP_15CYC 0x1

#define	ADC_SMPR_SMP_28CYC 0x2

#define	ADC_SMPR_SMP_56CYC 0x3

#define	ADC_SMPR_SMP_84CYC 0x4

#define	ADC_SMPR_SMP_112CYC 0x5

#define	ADC_SMPR_SMP_144CYC 0x6

#define	ADC_SMPR_SMP_480CYC 0x7

#define	ADC_SQR1_L_MSK (0xf << ADC_SQR1_L_LSB)

#define	ADC_SQR_MAX_CHANNELS_REGULAR 16

#define	ADC_CCR_ADCPRE_BY2 (0x0 << 16)

#define	ADC_CCR_ADCPRE_BY4 (0x1 << 16)

#define	ADC_CCR_ADCPRE_BY6 (0x2 << 16)

#define	ADC_CCR_ADCPRE_BY8 (0x3 << 16)

#define	ADC_CCR_ADCPRE_MASK (0x3 << 16)

#define	ADC_CCR_ADCPRE_SHIFT 16

Functions
void	adc_set_multi_mode (uint32_t mode)
	ADC Set Dual/Triple Mode. More...

void	adc_enable_vbat_sensor (void)
	Enable The VBat Sensor. More...

void	adc_disable_vbat_sensor (void)
	Disable The VBat Sensor. More...

Macro Definition Documentation

◆ ADC_CCR_ADCPRE_MASK

#define ADC_CCR_ADCPRE_MASK (0x3 << 16)

Definition at line 188 of file f4/adc.h.

◆ ADC_CCR_ADCPRE_SHIFT

#define ADC_CCR_ADCPRE_SHIFT 16

Definition at line 189 of file f4/adc.h.

◆ ADC_CR1_AWDCH_MAX

#define ADC_CR1_AWDCH_MAX 18

Definition at line 89 of file f4/adc.h.

◆ ADC_DR

#define ADC_DR ( block ) MMIO32((block) + 0x4c)

Definition at line 75 of file f4/adc.h.

◆ ADC_HTR

#define ADC_HTR ( block ) MMIO32((block) + 0x24)

Definition at line 51 of file f4/adc.h.

◆ ADC_JDR1

#define ADC_JDR1 ( block ) MMIO32((block) + 0x3c)

Definition at line 69 of file f4/adc.h.

◆ ADC_JDR2

#define ADC_JDR2 ( block ) MMIO32((block) + 0x40)

Definition at line 70 of file f4/adc.h.

◆ ADC_JDR3

#define ADC_JDR3 ( block ) MMIO32((block) + 0x44)

Definition at line 71 of file f4/adc.h.

◆ ADC_JDR4

#define ADC_JDR4 ( block ) MMIO32((block) + 0x48)

Definition at line 72 of file f4/adc.h.

◆ ADC_JOFR1

#define ADC_JOFR1 ( block ) MMIO32((block) + 0x14)

Definition at line 45 of file f4/adc.h.

◆ ADC_JOFR2

#define ADC_JOFR2 ( block ) MMIO32((block) + 0x18)

Definition at line 46 of file f4/adc.h.

◆ ADC_JOFR3

#define ADC_JOFR3 ( block ) MMIO32((block) + 0x1c)

Definition at line 47 of file f4/adc.h.

◆ ADC_JOFR4

#define ADC_JOFR4 ( block ) MMIO32((block) + 0x20)

Definition at line 48 of file f4/adc.h.

◆ ADC_JSQR

#define ADC_JSQR ( block ) MMIO32((block) + 0x38)

Definition at line 66 of file f4/adc.h.

◆ ADC_LTR

#define ADC_LTR ( block ) MMIO32((block) + 0x28)

Definition at line 54 of file f4/adc.h.

◆ ADC_SQR1

#define ADC_SQR1 ( block ) MMIO32((block) + 0x2c)

Definition at line 57 of file f4/adc.h.

◆ ADC_SQR1_L_MSK

#define ADC_SQR1_L_MSK (0xf << ADC_SQR1_L_LSB)

Definition at line 173 of file f4/adc.h.

◆ ADC_SQR2

#define ADC_SQR2 ( block ) MMIO32((block) + 0x30)

Definition at line 60 of file f4/adc.h.

◆ ADC_SQR3

#define ADC_SQR3 ( block ) MMIO32((block) + 0x34)

Definition at line 63 of file f4/adc.h.

◆ ADC_SQR_MAX_CHANNELS_REGULAR

#define ADC_SQR_MAX_CHANNELS_REGULAR 16

Definition at line 175 of file f4/adc.h.

Macros

Functions