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#define | ADC_CR2_EXTSEL_TIM1_CC1 (0x0 << 24) |
| Timer 1 Compare Output 1. More...
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#define | ADC_CR2_EXTSEL_TIM1_CC2 (0x1 << 24) |
| Timer 1 Compare Output 2. More...
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#define | ADC_CR2_EXTSEL_TIM1_CC3 (0x2 << 24) |
| Timer 1 Compare Output 3. More...
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#define | ADC_CR2_EXTSEL_TIM2_CC2 (0x3 << 24) |
| Timer 2 Compare Output 2. More...
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#define | ADC_CR2_EXTSEL_TIM2_CC3 (0x4 << 24) |
| Timer 2 Compare Output 3. More...
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#define | ADC_CR2_EXTSEL_TIM2_CC4 (0x5 << 24) |
| Timer 2 Compare Output 4. More...
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#define | ADC_CR2_EXTSEL_TIM2_TRGO (0x6 << 24) |
| Timer 2 TRGO Event. More...
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#define | ADC_CR2_EXTSEL_TIM3_CC1 (0x7 << 24) |
| Timer 3 Compare Output 1. More...
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#define | ADC_CR2_EXTSEL_TIM3_TRGO (0x8 << 24) |
| Timer 3 TRGO Event. More...
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#define | ADC_CR2_EXTSEL_TIM4_CC4 (0x9 << 24) |
| Timer 4 Compare Output 4. More...
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#define | ADC_CR2_EXTSEL_TIM5_CC1 (0xA << 24) |
| Timer 5 Compare Output 1. More...
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#define | ADC_CR2_EXTSEL_TIM5_CC2 (0xB << 24) |
| Timer 5 Compare Output 2. More...
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#define | ADC_CR2_EXTSEL_TIM5_CC3 (0xC << 24) |
| Timer 5 Compare Output 3. More...
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#define | ADC_CR2_EXTSEL_TIM8_CC1 (0xD << 24) |
| Timer 8 Compare Output 1. More...
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#define | ADC_CR2_EXTSEL_TIM8_TRGO (0xE << 24) |
| Timer 8 TRGO Event. More...
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#define | ADC_CR2_EXTSEL_EXTI_LINE_11 (0xF << 24) |
| EXTI Line 11 Event. More...
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