STM32L4

Here is a list of all modules:

[detail level 12345]

▼CM3 Defines	Defined Constants and Types for Cortex M3 core features
Debugging	Macros and functions to aid in debugging
►Cortex Core Defines	libopencm3 Defined Constants and Types for the Cortex Core
Cortex Core Atomic support Defines	Atomic operation support
Cortex-M Data Watch and Trace unit.	System Control Space (SCS) => Data Watchpoint and Trace (DWT)
Cortex-M Flash Patch and Breakpoint (FPB) unit
Cortex-M Instrumentation Trace Macrocell (ITM)
►Cortex-M MPU Defines	libopencm3 Cortex Memory Protection Unit
MPU Registers
MPU TYPE register fields	The MPU_TYPE register is always available, even if the MPU is not implemented
MPU CTRL register fields	Defines for the Control Register
MPU RNR register fields	Defines for the Region Number Register
MPU RBAR register fields	Defines for the Region Base Address Register
►MPU RASR register fields	Defines for the Region Attribute and Size Register
MPU RASR Attributes	Not all attributes are available on v6m
►Cortex-M NVIC Defines	libopencm3 Cortex Nested Vectored Interrupt Controller
NVIC Registers
Cortex M0/M3/M4 System Interrupts	IRQ numbers -3 and -6 to -9 are reserved
User interrupts for STM32 L4 series
►Cortex-M System Control Block	The System Control Block is a section of the System Control Space
SCB Registers
SCB_CPUID Values
SCB_ICSR Values
SCB_VTOR Values
SCB_AICR Values
SCB_SCR Values
SCB_CCR Values
►Cortex-M System Control Space	The System Control Space (SCS) is a memory-mapped 4KB address space that provides 32-bit registers for configuration, status reporting and control
SCS Registers
►Cortex-M SysTick Defines	libopencm3 Defined Constants and Types for the Cortex SysTick
►STK_CSR Values
Clock source selection
STK_RVR Values
STK_CALIB Values
Cortex-M Trace Port Interface Unit (TPIU)
▼Cortex Core Peripheral APIs	APIs for Cortex Core peripherals
DWT	libopencm3 Cortex-M Data Watchpoint and Trace unit
NVIC	libopencm3 Cortex Nested Vectored Interrupt Controller
SCB	libopencm3 Cortex-M System Control Block
SysTick	libopencm3 Cortex System Tick Timer
Coresight Registers	CoreSight Lock Status Registers and Lock Access Registers are documented for the DWT, ITM, FPB and TPIU peripherals
▼Peripheral APIs	APIs for device peripherals
QuadSPI peripheral API	APIs for the specialized SPI Flash peripheral
DMA peripheral API	DMA library for the multi channel controller found in F0/1/3 & L/G parts
FLASH peripheral API	libopencm3 STM32L4xx FLASH
PWR peripheral API	libopencm3 STM32L4xx Power Control
RCC peripheral API	libopencm3 STM32L4xx Reset and Clock Control
ADC peripheral API
CRC peripheral API
CRS peripheral API	(USB) STM32 Clock Recovery Subsystem
DAC peripheral API	Digital to Analog Converter
EXTI peripheral API
GPIO peripheral API
I2C peripheral API
IWDG peripheral API
LPTIM peripheral API
RNG peripheral API	This library supports "version 1" of the random number generator peripheral (RNG) in the STM32 series of ARM Cortex Microcontrollers by ST Microelectronics
RTC peripheral API
SPI peripheral API
TIMER peripheral API
USART peripheral API
STM32L4xx	Libraries for ST Microelectronics STM32L4xx series
▼STM32L4xx Defines	Defined Constants and Types for the STM32L4xx series
►ADC Defines	Defined Constants and Types for the STM32L4xx Analog to Digital Converter
ADC register base addresses
ADC Channel Numbers
ADC Sample Time Selection values
ADC registers
ISR ADC interrupt status register
IER ADC interrupt enable register
CR ADC control register
►CFGR1 ADC configuration register 1
EXTEN: External trigger enable and polarity selection for regular channels
RES: Data resolution
SMPR ADC sample time register
CFGR2 ADC configuration register 2
TR1 ADC watchdog threshold register 1
CCR ADC common configuration register
►CRC Defines	Defined Constants and Types for the STM32L4xx CRC Generator
CRC Registers
►CRC_CR values
CRC Reverse input options
CRC Polynomial size
CRS Defines	Defined Constants and Types for the Clock Recovery System
►DAC Defines	Defined Constants and Types for the STM32L4xx DAC
DAC register base addresses
DAC Registers
►DAC_CR values
DAC Channel 2 Trigger Source Selection
DAC Channel 1 Trigger Source Selection
DAC_SWTRIGR Values
DAC_DHRxxx Values
DAC_DORx Values
DAC_SR Values
DAC Channel Identifier
►DMA Defines	Defined Constants and Types for the STM32L4xx DMA Controller
DMA Interrupt Flag Offsets within channel flag	Group
DMA Channel Priority Levels
DMA Channel Memory Word Width
DMA Channel Peripheral Word Width
DMA Channel Number
►EXTI Defines	Defined Constants and Types for the STM32L4xx EXTI Control
EXTI Registers
►FLASH Defines	Defined Constants and Types for the STM32L4xx Flash Control
Flash_acr_values
►GPIO Defines	Defined Constants and Types for the STM32L4xx General Purpose I/O
GPIO Output Pin Speed
GPIO Pin Identifiers
GPIO Port IDs
GPIO Pin Direction and Analog/Digital Mode
GPIO Output Pin Driver Type
GPIO Output Pin Pullup
Alternate Function Pin Selection
►I2C Defines	Defined Constants and Types for the STM32L4xx I2C
I2C register base address
►IWDG Defines	Defined Constants and Types for the STM32L4xx Independent Watchdog Timer
IWDG Key Values
IWDG prescaler divider
IWDG Status Register Values
►LPTIM Defines	libopencm3 Defined Constants and Types for the STM32L4xx Low Power Timer
Low Power Timer register base addresses
LPTIM_ISR Interrupt and Status Register
LPTIM_ICR Interrupt Clear Register
LPTIM_IER Interrupt Enable Register
►LPTIM_CFGR Configuration Register
LPTIM_CFGR CKPOL Clock Polarity
LPTIM_CFGR CKFLT Configurable digital filter for external clock
LPTIM_CFGR TRGFLT Configurable digital filter for trigger
LPTIM_CFGR PRESC Clock prescaler
LPTIM_CFGR TRIGSEL Trigger selector
LPTIM_CFGR TRIGEN Trigger enable and polarity
LPTIM_CR Control Register
►PWR Defines	Defined Constants and Types for the STM32L4xx Power Control
PVD level selection
►QuadSPI Defines	Defined constants and types for the STM32L4 QuadSPI peripheral
QuadSPI Registers
►RCC Defines	Defined Constants and Types for the STM32L4xx Reset and Clock Control
►RCC Registers	Reset / Clock Control Registers
RCC_CR values	Clock Control register values
RCC_CR values	Clock Control register values
MSI Range	Range of the MSI oscillator Twelve frequency ranges are available: 100 kHz, 200 kHz, 400 kHz, 800 kHz, 1 MHz, 2 MHz, 4 MHz (default value), 8 MHz, 16 MHz, 24 MHz, 32 MHz and 48 MHz
RCC_CFGR APBx prescale factors	These can be used for both APB1 and APB2 prescaling
RCC_CFGR AHB prescale factors
RCC_PLLCFGR PLLN values	Allowed values 8 <= n <= 86
RCC_PLLCFGR PLLM values	Allowed values 1 <= m <= 8
►RCC_AHBxRSTR reset values (full set)
RCC_AHB1RSTR reset values
RCC_AHB2RSTR reset values
RCC_AHB3RSTR reset values
►RCC_APB1RSTRx reset values (full set)
RCC_APB1RSTR1 reset values
RCC_APB1RSTR2 reset values
RCC_APB2RSTR reset values
►RCC_AHBxENR enable values (full set)
RCC_AHB1ENR enable values
RCC_AHB2ENR enable values
RCC_AHB3ENR enable values
►RCC_APB1ENRx enable values (full set)
RCC_APB1ENR1 enable values
RCC_APB1ENR2 enable values
RCC_APB2ENR enable values
MSI Range after standby values	Range of the MSI oscillator after returning from standby
►RTC Defines	Defined Constants and Types for the STM32L4xx RTC
►RTC Registers	Real Time Clock registers
RTC Time register (RTC_TR) values	Note: Bits [31:23], 15, and 7 are reserved, and must be kept at reset value
RTC Date register (RTC_DR) values	Note: Bits [31:24] and [7:6] are reserved, and must be kept at reset value
►RTC control register (RTC_CR) values	Note: Bits [31:24] are reserved, and must be kept at reset value
RTC_CR_OSEL: Output selection values	These bits are used to select the flag to be routed to AFO_ALARM RTC output
RTC initialization and status register (RTC_ISR) values	Note: Bits [31:17] and [15] are reserved, and must be kept at reset value
RTC prescaler register (RTC_PRER) values
RTC Alarm register values	Applies to RTC_ALRMAR and RTC_ALRMBR
RTC time stamp time register (RTC_TSTR) values
RTC time stamp date register (RTC_TSDR) values
RTC calibration register (RTC_CALR) values
RTC tamper and alternate function configuration register (RTC_TAFCR) values
RTC Time register (RTC_TR) values	Note: Bits [31:23], 15, and 7 are reserved, and must be kept at reset value
RTC Date register (RTC_DR) values	Note: Bits [31:24] and [7:6] are reserved, and must be kept at reset value
►RTC control register (RTC_CR) values	Note: Bits [31:24] are reserved, and must be kept at reset value
RTC_CR_OSEL: Output selection values	These bits are used to select the flag to be routed to AFO_ALARM RTC output
RTC initialization and status register (RTC_ISR) values	Note: Bits [31:17] and [15] are reserved, and must be kept at reset value
RTC prescaler register (RTC_PRER) values
RTC Alarm register values	Applies to RTC_ALRMAR and RTC_ALRMBR
RTC time stamp time register (RTC_TSTR) values
RTC time stamp date register (RTC_TSDR) values
RTC calibration register (RTC_CALR) values
RTC tamper and alternate function configuration register (RTC_TAFCR) values
►SPI Defines	Defined Constants and Types for the STM32L4xx SPI
SPI Register base address
SPI lsb/msb first
SPI peripheral baud rates
SPI peripheral baud rate prescale values
SPI clock polarity
SPI clock phase
SPI crc length
SPI data size
SYSCFG Defines	Defined Constants and Types for the STM32L4xx Sysconfig
►Timer Defines	libopencm3 Defined Constants and Types for the STM32L4xx Timers
Timer register base addresses
TIMx_CR1 CKD[1:0] Clock Division Ratio
TIMx_CR1 CMS[1:0]: Center-aligned Mode Selection
TIMx_CR1 DIR: Direction
TIMx_CR2_OIS: Force Output Idle State Control Values
TIMx_CR2 MMS[6:4]: Master Mode Selection
TIMx_SMCR TS Trigger selection
TIMx_SMCR SMS Slave mode selection
TIMx_DIER Timer DMA and Interrupt Enable Values
TIMx_SR Timer Status Register Flags
TIMx_EGR Timer Event Generator Values
TIM_BDTR_LOCK Timer Lock Values
►USART Defines	Defined Constants and Types for the STM32L4xx USART
USART Parity Selection
USART Tx/Rx Mode Selection
USART Stop Bit Selection
USART Hardware Flow Control Selection
USART Registers
U(S)ART convenience Flags	We define the "common" lower flag bits using a standard name, allowing them to be used regardless of which usart peripheral version you have
USART_CR1 Values
►USART_CR2 Values
Auto baud rate mode	ABRMOD[1:0]: Auto baud rate mode
USART_CR3 Values
USART_GTPR Values
USART_RTOR Values
USART_RQR Values
USART_ISR Values
USART_ICR Values
USART_RDR/TDR Values
User interrupt service routines (ISR) prototypes for STM32 L4 series
USART register base addresses	Holds all the U(S)ART peripherals supported
▼CAN defines	libopencm3 Defined Constants and Types for STM32 CAN
CAN register base address
USB Defines	Defined Constants and Types for the STM32F* USB drivers
USB Audio Type Definitions	Defined Constants and Types for the USB Audio Type Definitions
USB CDC Type Definitions	Defined Constants and Types for the USB CDC Type Definitions
USB HID Type Definitions	Defined Constants and Types for the USB HID Type Definitions
USB MSC Type Definitions	Defined Constants and Types for the USB MSC Type Definitions
USB Drivers	Defined Constants and Types for the USB Drivers
USB Standard Structure Definitions	Defined Constants and Types for the USB Standard Structure Definitions
CAN	libopencm3 STM32Fxxx CAN
User interrupt service routines (ISR) defaults for STM32 L4 series
Generic USB Drivers	Generic USB Drivers
Generic USB Control Requests	Generic USB Control Requests
Generic USB Standard Request Interface	Generic USB Standard Request Interface
Usb_msc