STM32F1

Here is a list of all modules:

[detail level 1234]

▼CM3 Defines	Defined Constants and Types for Cortex M3 core features
Debugging	Macros and functions to aid in debugging
►Cortex Core Defines	libopencm3 Defined Constants and Types for the Cortex Core
Cortex Core Atomic support Defines	Atomic operation support
Cortex-M Data Watch and Trace unit.	System Control Space (SCS) => Data Watchpoint and Trace (DWT)
Cortex-M Flash Patch and Breakpoint (FPB) unit
Cortex-M Instrumentation Trace Macrocell (ITM)
►Cortex-M MPU Defines	libopencm3 Cortex Memory Protection Unit
MPU Registers
MPU TYPE register fields	The MPU_TYPE register is always available, even if the MPU is not implemented
MPU CTRL register fields	Defines for the Control Register
MPU RNR register fields	Defines for the Region Number Register
MPU RBAR register fields	Defines for the Region Base Address Register
►MPU RASR register fields	Defines for the Region Attribute and Size Register
MPU RASR Attributes	Not all attributes are available on v6m
►Cortex-M NVIC Defines	libopencm3 Cortex Nested Vectored Interrupt Controller
NVIC Registers
Cortex M0/M3/M4 System Interrupts	IRQ numbers -3 and -6 to -9 are reserved
User interrupts for STM32 F1 series
►Cortex-M System Control Block	The System Control Block is a section of the System Control Space
SCB Registers
SCB_CPUID Values
SCB_ICSR Values
SCB_VTOR Values
SCB_AICR Values
SCB_SCR Values
SCB_CCR Values
►Cortex-M System Control Space	The System Control Space (SCS) is a memory-mapped 4KB address space that provides 32-bit registers for configuration, status reporting and control
SCS Registers
►Cortex-M SysTick Defines	libopencm3 Defined Constants and Types for the Cortex SysTick
►STK_CSR Values
Clock source selection
STK_RVR Values
STK_CALIB Values
Cortex-M Trace Port Interface Unit (TPIU)
▼Cortex Core Peripheral APIs	APIs for Cortex Core peripherals
DWT	libopencm3 Cortex-M Data Watchpoint and Trace unit
NVIC	libopencm3 Cortex Nested Vectored Interrupt Controller
SCB	libopencm3 Cortex-M System Control Block
SysTick	libopencm3 Cortex System Tick Timer
Coresight Registers	CoreSight Lock Status Registers and Lock Access Registers are documented for the DWT, ITM, FPB and TPIU peripherals
▼Peripheral APIs	APIs for device peripherals
DMA peripheral API	DMA library for the multi channel controller found in F0/1/3 & L/G parts
FLASH peripheral API	libopencm3 STM32F1xx FLASH Memory
RCC peripheral API	libopencm3 STM32F1xx Reset and Clock Control
RTC peripheral API	libopencm3 STM32F1xx RTC
TIMER peripheral API	libopencm3 STM32F1xx Timers
ADC peripheral API
CRC peripheral API
DAC peripheral API	Digital to Analog Converter
EXTI peripheral API
GPIO peripheral API	libopencm3 STM32F1xx General Purpose I/O
I2C peripheral API
IWDG peripheral API
PWR peripheral API
SPI peripheral API
USART peripheral API
STM32F1xx	Libraries for ST Microelectronics STM32F1xx series
▼STM32F1xx Defines	Defined Constants and Types for the STM32F1xx series
►ADC Defines	Defined Constants and Types for the STM32F1xx Analog to Digital Converters
ADC Mode Selection
ADC Trigger Identifier for ADC1 and ADC2
ADC Trigger Identifier for ADC3
ADC Injected Trigger Identifier for ADC1	And ADC2
ADC Injected Trigger Identifier for ADC3
ADC Sample Time Selection for All Channels
ADC Channel Numbers
ADC register base addresses
ADC Status Register Flags
ADC Number of channels in discontinuous mode.
ADC watchdog channel
ADC Number of channels in discontinuous injected mode
►BKP Defines	Defined Constants and Types for the Backup Registers
BKP Registers
BKP_RTCCR Values
BKP_CR Values
BKP_CSR Values
►CRC Defines	libopencm3 Defined Constants and Types for the STM32F1xx CRC Generator
CRC Registers
CRC_CR values
►DAC Defines	Defined Constants and Types for the STM32F1xx DAC
DAC register base addresses
DAC Registers
►DAC_CR values
DAC Channel 2 Trigger Source Selection
DAC Channel 1 Trigger Source Selection
DAC_SWTRIGR Values
DAC_DHRxxx Values
DAC_DORx Values
DAC_SR Values
DAC Channel Identifier
►DMA Defines	Defined Constants and Types for the STM32F1xx DMA Controller
DMA Interrupt Flag Offsets within channel flag	Group
DMA Channel Priority Levels
DMA Channel Memory Word Width
DMA Channel Peripheral Word Width
DMA Channel Number
►EXTI Defines	Defined Constants and Types for the STM32F1xx External Interrupts
EXTI Registers
►FLASH Defines	Defined Constants and Types for the STM32F1xx FLASH Memory
Option Byte Addresses
FLASH Wait States
►GPIO Defines	Defined Constants and Types for the STM32F1xx General Purpose I/O
GPIO Port IDs
GPIO Pin Configuration	If mode specifies input, configuration can be
GPIO Pin Mode
EVENTOUT Port selection
EVENTOUT Pin selection
Alternate Function Remap Controls for Connectivity	Line Devices only
Serial Wire JTAG disables
Alternate Function Remap Controls
Alternate Function Remap Controls for CAN 1
Alternate Function Remap Controls for Timer 3
Alternate Function Remap Controls for Timer 2
Alternate Function Remap Controls for Timer 1
Alternate Function Remap Controls for USART 3
Alternate Function Remap Controls Secondary Set
Alternate Function EXTI pin number
GPIO Pin Identifiers
►I2C Defines	Defined Constants and Types for the STM32F1xx I2C
I2C register base address
I2C peripheral clock duty cycles
I2C Read/Write bit
►IWDG Defines	Defined Constants and Types for the STM32F1xx Independent Watchdog Timer
IWDG Key Values
IWDG prescaler divider
IWDG Status Register Values
►PWR Defines	Defined Constants and Types for the STM32F1xx PWR Control
PVD level selection
►RCC Defines	Defined Constants and Types for the STM32F1xx Reset and Clock Control
RCC_CFGR Microcontroller Clock Output Source
RCC_CFGR USB prescale Factors
RCC_CFGR PLL Multiplication Factor
RCC_CFGR HSE Divider for PLL
RCC_CFGR PLL Clock Source
RCC ADC clock prescaler enable values
RCC_CFGR APBx prescale factors	These can be used for both APB1 and APB2 prescaling
RCC_CFGR AHB prescale Factors
RCC_CFGR System Clock Selection
RCC_CFGR Deprecated dividers	Older compatible definitions to ease migration
RCC_APB2RSTR reset values
RCC_APB1RSTR reset values
RCC_AHBENR enable values
RCC_APB2ENR enable values
RCC_APB1ENR enable values
RCC_AHBRSTR reset values
RTC Defines	Defined Constants and Types for the STM32F1xx Real Time Clock
►SPI Defines	Defined Constants and Types for the STM32F1xx SPI
SPI Register base address
SPI lsb/msb first
SPI peripheral baud rates
SPI peripheral baud rate prescale values
SPI clock polarity
SPI clock phase
SPI data frame format
►Timer Defines	libopencm3 Defined Constants and Types for the STM32F1xx Timers
Timer register base addresses
TIMx_CR1 CKD[1:0] Clock Division Ratio
TIMx_CR1 CMS[1:0]: Center-aligned Mode Selection
TIMx_CR1 DIR: Direction
TIMx_CR2_OIS: Force Output Idle State Control Values
TIMx_CR2 MMS[6:4]: Master Mode Selection
TIMx_SMCR TS Trigger selection
TIMx_SMCR SMS Slave mode selection
TIMx_DIER Timer DMA and Interrupt Enable Values
TIMx_SR Timer Status Register Flags
TIMx_EGR Timer Event Generator Values
TIM_BDTR_LOCK Timer Lock Values
►USART Defines	Defined Constants and Types for the STM32F1xx USART
USART Parity Selection
USART Tx/Rx Mode Selection
USART Stop Bit Selection
USART Hardware Flow Control Selection
USART register base addresses	Holds all the U(S)ART peripherals supported
U(S)ART convenience Flags	We define the "common" lower flag bits using a standard name, allowing them to be used regardless of which usart peripheral version you have
USART Status register Flags
User interrupt service routines (ISR) prototypes for STM32 F1 series
MAC Generic Defines	Defined Constants and Types for the Ethernet MAC
MAC STM32Fxx7 Defines	Defined Constants and Types for the Ethernet MAC for STM32Fxx7 chips
PHY Generic Defines	Defined Constants and Types for the Ethernet PHY
PHY KSZ80X1 Defines	Defined Constants and Types for the Ethernet PHY KSZ80X1 chips chips
▼CAN defines	libopencm3 Defined Constants and Types for STM32 CAN
CAN register base address
USB Defines	Defined Constants and Types for the STM32F* USB drivers
USB Audio Type Definitions	Defined Constants and Types for the USB Audio Type Definitions
USB CDC Type Definitions	Defined Constants and Types for the USB CDC Type Definitions
USB HID Type Definitions	Defined Constants and Types for the USB HID Type Definitions
USB MSC Type Definitions	Defined Constants and Types for the USB MSC Type Definitions
USB Drivers	Defined Constants and Types for the USB Drivers
USB Standard Structure Definitions	Defined Constants and Types for the USB Standard Structure Definitions
CAN	libopencm3 STM32Fxxx CAN
User interrupt service routines (ISR) defaults for STM32 F1 series
MAC Generic Drivers	Ethernet MAC Generic Drivers
MAC STM32Fxx7	Ethernet MAC STM32Fxx7 Drivers
PHY Generic Drivers	Ethernet PHY Generic Drivers
PHY KSZ8051MLL	Ethernet PHY STM32Fxx7 Drivers
Generic USB Drivers	Generic USB Drivers
Generic USB Control Requests	Generic USB Control Requests
Generic USB Standard Request Interface	Generic USB Standard Request Interface
Usb_msc