libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
Modules | Macros | Functions
GPIO Defines
STM32F1xx Defines

Defined Constants and Types for the STM32F1xx General Purpose I/O More...

Collaboration diagram for GPIO Defines:

Modules

 GPIO Port IDs
 
 GPIO Pin Configuration
 If mode specifies input, configuration can be.
 
 GPIO Pin Mode
 
 EVENTOUT Port selection
 
 EVENTOUT Pin selection
 
 Alternate Function Remap Controls for Connectivity
 Line Devices only.
 
 Serial Wire JTAG disables
 
 Alternate Function Remap Controls
 
 Alternate Function Remap Controls for CAN 1
 
 Alternate Function Remap Controls for Timer 3
 
 Alternate Function Remap Controls for Timer 2
 
 Alternate Function Remap Controls for Timer 1
 
 Alternate Function Remap Controls for USART 3
 
 Alternate Function Remap Controls Secondary Set
 
 Alternate Function EXTI pin number
 
 GPIO Pin Identifiers
 

Macros

#define GPIO_CAN1_RX   GPIO11 /* PA11 */
 
#define GPIO_CAN1_TX   GPIO12 /* PA12 */
 
#define GPIO_CAN_RX   GPIO_CAN1_RX /* Alias */
 
#define GPIO_CAN_TX   GPIO_CAN1_TX /* Alias */
 
#define GPIO_CAN_PB_RX   GPIO8 /* PB8 */
 
#define GPIO_CAN_PB_TX   GPIO9 /* PB9 */
 
#define GPIO_CAN1_PB_RX   GPIO_CAN_PB_RX /* Alias */
 
#define GPIO_CAN1_PB_TX   GPIO_CAN_PB_TX /* Alias */
 
#define GPIO_CAN_PD_RX   GPIO0 /* PD0 */
 
#define GPIO_CAN_PD_TX   GPIO1 /* PD1 */
 
#define GPIO_CAN1_PD_RX   GPIO_CAN_PD_RX /* Alias */
 
#define GPIO_CAN1_PD_TX   GPIO_CAN_PD_TX /* Alias */
 
#define GPIO_BANK_CAN1_RX   GPIOA /* PA11 */
 
#define GPIO_BANK_CAN1_TX   GPIOA /* PA12 */
 
#define GPIO_BANK_CAN_RX   GPIO_BANK_CAN1_RX /* Alias */
 
#define GPIO_BANK_CAN_TX   GPIO_BANK_CAN1_TX /* Alias */
 
#define GPIO_BANK_CAN_PB_RX   GPIOB /* PB8 */
 
#define GPIO_BANK_CAN_PB_TX   GPIOB /* PB9 */
 
#define GPIO_BANK_CAN1_PB_RX   GPIO_BANK_CAN_PB_RX /* Alias */
 
#define GPIO_BANK_CAN1_PB_TX   GPIO_BANK_CAN_PB_TX /* Alias */
 
#define GPIO_BANK_CAN_PD_RX   GPIOD /* PD0 */
 
#define GPIO_BANK_CAN_PD_TX   GPIOD /* PD1 */
 
#define GPIO_BANK_CAN1_PD_RX   GPIO_BANK_CAN_PD_RX /* Alias */
 
#define GPIO_BANK_CAN1_PD_TX   GPIO_BANK_CAN_PD_TX /* Alias */
 
#define GPIO_CAN2_RX   GPIO12 /* PB12 */
 
#define GPIO_CAN2_TX   GPIO13 /* PB13 */
 
#define GPIO_CAN2_RE_RX   GPIO5 /* PB5 */
 
#define GPIO_CAN2_RE_TX   GPIO6 /* PB6 */
 
#define GPIO_BANK_CAN2_RX   GPIOB /* PB12 */
 
#define GPIO_BANK_CAN2_TX   GPIOB /* PB13 */
 
#define GPIO_BANK_CAN2_RE_RX   GPIOB /* PB5 */
 
#define GPIO_BANK_CAN2_RE_TX   GPIOB /* PB6 */
 
#define GPIO_JTMS_SWDIO   GPIO13 /* PA13 */
 
#define GPIO_JTCK_SWCLK   GPIO14 /* PA14 */
 
#define GPIO_JTDI   GPIO15 /* PA15 */
 
#define GPIO_JTDO_TRACESWO   GPIO3 /* PB3 */
 
#define GPIO_JNTRST   GPIO4 /* PB4 */
 
#define GPIO_TRACECK   GPIO2 /* PE2 */
 
#define GPIO_TRACED0   GPIO3 /* PE3 */
 
#define GPIO_TRACED1   GPIO4 /* PE4 */
 
#define GPIO_TRACED2   GPIO5 /* PE5 */
 
#define GPIO_TRACED3   GPIO6 /* PE6 */
 
#define GPIO_BANK_JTMS_SWDIO   GPIOA /* PA13 */
 
#define GPIO_BANK_JTCK_SWCLK   GPIOA /* PA14 */
 
#define GPIO_BANK_JTDI   GPIOA /* PA15 */
 
#define GPIO_BANK_JTDO_TRACESWO   GPIOB /* PB3 */
 
#define GPIO_BANK_JNTRST   GPIOB /* PB4 */
 
#define GPIO_BANK_TRACECK   GPIOE /* PE2 */
 
#define GPIO_BANK_TRACED0   GPIOE /* PE3 */
 
#define GPIO_BANK_TRACED1   GPIOE /* PE4 */
 
#define GPIO_BANK_TRACED2   GPIOE /* PE5 */
 
#define GPIO_BANK_TRACED3   GPIOE /* PE6 */
 
#define GPIO_TIM5_CH1   GPIO0 /* PA0 */
 
#define GPIO_TIM5_CH2   GPIO1 /* PA1 */
 
#define GPIO_TIM5_CH3   GPIO2 /* PA2 */
 
#define GPIO_TIM5_CH4   GPIO3 /* PA3 */
 
#define GPIO_BANK_TIM5_CH1   GPIOA /* PA0 */
 
#define GPIO_BANK_TIM5_CH2   GPIOA /* PA1 */
 
#define GPIO_BANK_TIM5_CH3   GPIOA /* PA2 */
 
#define GPIO_BANK_TIM5_CH4   GPIOA /* PA3 */
 
#define GPIO_BANK_TIM5   GPIOA
 
#define GPIO_TIM4_CH1   GPIO6 /* PB6 */
 
#define GPIO_TIM4_CH2   GPIO7 /* PB7 */
 
#define GPIO_TIM4_CH3   GPIO8 /* PB8 */
 
#define GPIO_TIM4_CH4   GPIO9 /* PB9 */
 
#define GPIO_TIM4_RE_CH1   GPIO12 /* PD12 */
 
#define GPIO_TIM4_RE_CH2   GPIO13 /* PD13 */
 
#define GPIO_TIM4_RE_CH3   GPIO14 /* PD14 */
 
#define GPIO_TIM4_RE_CH4   GPIO15 /* PD15 */
 
#define GPIO_BANK_TIM4_CH1   GPIOB /* PB6 */
 
#define GPIO_BANK_TIM4_CH2   GPIOB /* PB7 */
 
#define GPIO_BANK_TIM4_CH3   GPIOB /* PB8 */
 
#define GPIO_BANK_TIM4_CH4   GPIOB /* PB9 */
 
#define GPIO_BANK_TIM4   GPIOB
 
#define GPIO_BANK_TIM4_RE_CH1   GPIOD /* PD12 */
 
#define GPIO_BANK_TIM4_RE_CH2   GPIOD /* PD13 */
 
#define GPIO_BANK_TIM4_RE_CH3   GPIOD /* PD14 */
 
#define GPIO_BANK_TIM4_RE_CH4   GPIOD /* PD15 */
 
#define GPIO_BANK_TIM4_RE   GPIOD
 
#define GPIO_TIM3_CH1   GPIO6 /* PA6 */
 
#define GPIO_TIM3_CH2   GPIO7 /* PA7 */
 
#define GPIO_TIM3_CH3   GPIO0 /* PB0 */
 
#define GPIO_TIM3_CH4   GPIO1 /* PB1 */
 
#define GPIO_TIM3_PR_CH1   GPIO4 /* PB4 */
 
#define GPIO_TIM3_PR_CH2   GPIO5 /* PB5 */
 
#define GPIO_TIM3_PR_CH3   GPIO0 /* PB0 */
 
#define GPIO_TIM3_PR_CH4   GPIO1 /* PB1 */
 
#define GPIO_TIM3_FR_CH1   GPIO6 /* PC6 */
 
#define GPIO_TIM3_FR_CH2   GPIO7 /* PC7 */
 
#define GPIO_TIM3_FR_CH3   GPIO8 /* PC8 */
 
#define GPIO_TIM3_FR_CH4   GPIO9 /* PC9 */
 
#define GPIO_BANK_TIM3_CH1   GPIOA /* PA6 */
 
#define GPIO_BANK_TIM3_CH2   GPIOA /* PA7 */
 
#define GPIO_BANK_TIM3_CH3   GPIOB /* PB0 */
 
#define GPIO_BANK_TIM3_CH4   GPIOB /* PB1 */
 
#define GPIO_BANK_TIM3_CH12   GPIOA
 
#define GPIO_BANK_TIM3_CH34   GPIOB
 
#define GPIO_BANK_TIM3_PR_CH1   GPIOB /* PB4 */
 
#define GPIO_BANK_TIM3_PR_CH2   GPIOB /* PB5 */
 
#define GPIO_BANK_TIM3_PR_CH3   GPIOB /* PB0 */
 
#define GPIO_BANK_TIM3_PR_CH4   GPIOB /* PB1 */
 
#define GPIO_BANK_TIM3_PR   GPIOB
 
#define GPIO_BANK_TIM3_FR_CH1   GPIOC /* PC6 */
 
#define GPIO_BANK_TIM3_FR_CH2   GPIOC /* PC7 */
 
#define GPIO_BANK_TIM3_FR_CH3   GPIOC /* PC8 */
 
#define GPIO_BANK_TIM3_FR_CH4   GPIOC /* PC9 */
 
#define GPIO_BANK_TIM3_FR   GPIOC
 
#define GPIO_TIM2_CH1_ETR   GPIO0 /* PA0 */
 
#define GPIO_TIM2_CH2   GPIO1 /* PA1 */
 
#define GPIO_TIM2_CH3   GPIO2 /* PA2 */
 
#define GPIO_TIM2_CH4   GPIO3 /* PA3 */
 
#define GPIO_TIM2_PR1_CH1_ETR   GPIO15 /* PA15 */
 
#define GPIO_TIM2_PR1_CH2   GPIO3 /* PB3 */
 
#define GPIO_TIM2_PR1_CH3   GPIO2 /* PA2 */
 
#define GPIO_TIM2_PR1_CH4   GPIO3 /* PA3 */
 
#define GPIO_TIM2_PR2_CH1_ETR   GPIO0 /* PA0 */
 
#define GPIO_TIM2_PR2_CH2   GPIO1 /* PA1 */
 
#define GPIO_TIM2_PR2_CH3   GPIO10 /* PB10 */
 
#define GPIO_TIM2_PR2_CH4   GPIO11 /* PB11 */
 
#define GPIO_TIM2_FR_CH1_ETR   GPIO15 /* PA15 */
 
#define GPIO_TIM2_FR_CH2   GPIO3 /* PB3 */
 
#define GPIO_TIM2_FR_CH3   GPIO10 /* PB10 */
 
#define GPIO_TIM2_FR_CH4   GPIO11 /* PB11 */
 
#define GPIO_BANK_TIM2_CH1_ETR   GPIOA /* PA0 */
 
#define GPIO_BANK_TIM2_CH2   GPIOA /* PA1 */
 
#define GPIO_BANK_TIM2_CH3   GPIOA /* PA2 */
 
#define GPIO_BANK_TIM2_CH4   GPIOA /* PA3 */
 
#define GPIO_BANK_TIM2   GPIOA
 
#define GPIO_BANK_TIM2_PR1_CH1_ETR   GPIOA /* PA15 */
 
#define GPIO_BANK_TIM2_PR1_CH2   GPIOB /* PB3 */
 
#define GPIO_BANK_TIM2_PR1_CH3   GPIOA /* PA2 */
 
#define GPIO_BANK_TIM2_PR1_CH4   GPIOA /* PA3 */
 
#define GPIO_BANK_TIM2_PR1_CH134   GPIOA
 
#define GPIO_BANK_TIM2_PR2_CH1_ETR   GPIOA /* PA0 */
 
#define GPIO_BANK_TIM2_PR2_CH2   GPIOA /* PA1 */
 
#define GPIO_BANK_TIM2_PR2_CH3   GPIOB /* PB10 */
 
#define GPIO_BANK_TIM2_PR2_CH4   GPIOB /* PB11 */
 
#define GPIO_BANK_TIM2_PR2_CH12   GPIOA
 
#define GPIO_BANK_TIM2_PR2_CH34   GPIOB
 
#define GPIO_BANK_TIM2_FR_CH1_ETR   GPIOA /* PA15 */
 
#define GPIO_BANK_TIM2_FR_CH2   GPIOB /* PB3 */
 
#define GPIO_BANK_TIM2_FR_CH3   GPIOB /* PB10 */
 
#define GPIO_BANK_TIM2_FR_CH4   GPIOB /* PB11 */
 
#define GPIO_BANK_TIM2_FR_CH234   GPIOB
 
#define GPIO_TIM1_ETR   GPIO12 /* PA12 */
 
#define GPIO_TIM1_CH1   GPIO8 /* PA8 */
 
#define GPIO_TIM1_CH2   GPIO9 /* PA9 */
 
#define GPIO_TIM1_CH3   GPIO10 /* PA10 */
 
#define GPIO_TIM1_CH4   GPIO11 /* PA11 */
 
#define GPIO_TIM1_BKIN   GPIO12 /* PB12 */
 
#define GPIO_TIM1_CH1N   GPIO13 /* PB13 */
 
#define GPIO_TIM1_CH2N   GPIO14 /* PB14 */
 
#define GPIO_TIM1_CH3N   GPIO15 /* PB15 */
 
#define GPIO_TIM1_PR_ETR   GPIO12 /* PA12 */
 
#define GPIO_TIM1_PR_CH1   GPIO8 /* PA8 */
 
#define GPIO_TIM1_PR_CH2   GPIO9 /* PA9 */
 
#define GPIO_TIM1_PR_CH3   GPIO10 /* PA10 */
 
#define GPIO_TIM1_PR_CH4   GPIO11 /* PA11 */
 
#define GPIO_TIM1_PR_BKIN   GPIO6 /* PA6 */
 
#define GPIO_TIM1_PR_CH1N   GPIO7 /* PA7 */
 
#define GPIO_TIM1_PR_CH2N   GPIO0 /* PB0 */
 
#define GPIO_TIM1_PR_CH3N   GPIO1 /* PB1 */
 
#define GPIO_TIM1_FR_ETR   GPIO7 /* PE7 */
 
#define GPIO_TIM1_FR_CH1   GPIO9 /* PE9 */
 
#define GPIO_TIM1_FR_CH2   GPIO11 /* PE11 */
 
#define GPIO_TIM1_FR_CH3   GPIO13 /* PE13 */
 
#define GPIO_TIM1_FR_CH4   GPIO14 /* PE14 */
 
#define GPIO_TIM1_FR_BKIN   GPIO15 /* PE15 */
 
#define GPIO_TIM1_FR_CH1N   GPIO8 /* PE8 */
 
#define GPIO_TIM1_FR_CH2N   GPIO10 /* PE10 */
 
#define GPIO_TIM1_FR_CH3N   GPIO12 /* PE12 */
 
#define GPIO_BANK_TIM1_ETR   GPIOA /* PA12 */
 
#define GPIO_BANK_TIM1_CH1   GPIOA /* PA8 */
 
#define GPIO_BANK_TIM1_CH2   GPIOA /* PA9 */
 
#define GPIO_BANK_TIM1_CH3   GPIOA /* PA10 */
 
#define GPIO_BANK_TIM1_CH4   GPIOA /* PA11 */
 
#define GPIO_BANK_TIM1_BKIN   GPIOB /* PB12 */
 
#define GPIO_BANK_TIM1_CH1N   GPIOB /* PB13 */
 
#define GPIO_BANK_TIM1_CH2N   GPIOB /* PB14 */
 
#define GPIO_BANK_TIM1_CH3N   GPIOB /* PB15 */
 
#define GPIO_BANK_TIM1_ETR_CH1234   GPIOA
 
#define GPIO_BANK_TIM1_BKIN_CH123N   GPIOB
 
#define GPIO_BANK_TIM1_PR_ETR   GPIOA /* PA12 */
 
#define GPIO_BANK_TIM1_PR_CH1   GPIOA /* PA8 */
 
#define GPIO_BANK_TIM1_PR_CH2   GPIOA /* PA9 */
 
#define GPIO_BANK_TIM1_PR_CH3   GPIOA /* PA10 */
 
#define GPIO_BANK_TIM1_PR_CH4   GPIOA /* PA11 */
 
#define GPIO_BANK_TIM1_PR_BKIN   GPIOA /* PA6 */
 
#define GPIO_BANK_TIM1_PR_CH1N   GPIOA /* PA7 */
 
#define GPIO_BANK_TIM1_PR_CH2N   GPIOB /* PB0 */
 
#define GPIO_BANK_TIM1_PR_CH3N   GPIOB /* PB1 */
 
#define GPIO_BANK_TIM1_PR_ETR_CH1234_BKIN_CH1N   GPIOA
 
#define GPIO_BANK_TIM1_PR_CH23N   GPIOB
 
#define GPIO_BANK_TIM1_FR_ETR   GPIOE /* PE7 */
 
#define GPIO_BANK_TIM1_FR_CH1   GPIOE /* PE9 */
 
#define GPIO_BANK_TIM1_FR_CH2   GPIOE /* PE11 */
 
#define GPIO_BANK_TIM1_FR_CH3   GPIOE /* PE13 */
 
#define GPIO_BANK_TIM1_FR_CH4   GPIOE /* PE14 */
 
#define GPIO_BANK_TIM1_FR_BKIN   GPIOE /* PE15 */
 
#define GPIO_BANK_TIM1_FR_CH1N   GPIOE /* PE8 */
 
#define GPIO_BANK_TIM1_FR_CH2N   GPIOE /* PE10 */
 
#define GPIO_BANK_TIM1_FR_CH3N   GPIOE /* PE12 */
 
#define GPIO_BANK_TIM1_FR   GPIOE
 
#define GPIO_UART5_TX   GPIO12 /* PC12 */
 
#define GPIO_UART5_RX   GPIO2 /* PD2 */
 
#define GPIO_BANK_UART5_TX   GPIOC /* PC12 */
 
#define GPIO_BANK_UART5_RX   GPIOD /* PD2 */
 
#define GPIO_UART4_TX   GPIO10 /* PC10 */
 
#define GPIO_UART4_RX   GPIO11 /* PC11 */
 
#define GPIO_BANK_UART4_TX   GPIOC /* PC10 */
 
#define GPIO_BANK_UART4_RX   GPIOC /* PC11 */
 
#define GPIO_USART3_TX   GPIO10 /* PB10 */
 
#define GPIO_USART3_RX   GPIO11 /* PB11 */
 
#define GPIO_USART3_CK   GPIO12 /* PB12 */
 
#define GPIO_USART3_CTS   GPIO13 /* PB13 */
 
#define GPIO_USART3_RTS   GPIO14 /* PB14 */
 
#define GPIO_USART3_PR_TX   GPIO10 /* PC10 */
 
#define GPIO_USART3_PR_RX   GPIO11 /* PC11 */
 
#define GPIO_USART3_PR_CK   GPIO12 /* PC12 */
 
#define GPIO_USART3_PR_CTS   GPIO13 /* PB13 */
 
#define GPIO_USART3_PR_RTS   GPIO14 /* PB14 */
 
#define GPIO_USART3_FR_TX   GPIO8 /* PD8 */
 
#define GPIO_USART3_FR_RX   GPIO9 /* PD9 */
 
#define GPIO_USART3_FR_CK   GPIO10 /* PD10 */
 
#define GPIO_USART3_FR_CTS   GPIO11 /* PD11 */
 
#define GPIO_USART3_FR_RTS   GPIO12 /* PD12 */
 
#define GPIO_BANK_USART3_TX   GPIOB /* PB10 */
 
#define GPIO_BANK_USART3_RX   GPIOB /* PB11 */
 
#define GPIO_BANK_USART3_CK   GPIOB /* PB12 */
 
#define GPIO_BANK_USART3_CTS   GPIOB /* PB13 */
 
#define GPIO_BANK_USART3_RTS   GPIOB /* PB14 */
 
#define GPIO_BANK_USART3_PR_TX   GPIOC /* PC10 */
 
#define GPIO_BANK_USART3_PR_RX   GPIOC /* PC11 */
 
#define GPIO_BANK_USART3_PR_CK   GPIOC /* PC12 */
 
#define GPIO_BANK_USART3_PR_CTS   GPIOB /* PB13 */
 
#define GPIO_BANK_USART3_PR_RTS   GPIOB /* PB14 */
 
#define GPIO_BANK_USART3_FR_TX   GPIOD /* PD8 */
 
#define GPIO_BANK_USART3_FR_RX   GPIOD /* PD9 */
 
#define GPIO_BANK_USART3_FR_CK   GPIOD /* PD10 */
 
#define GPIO_BANK_USART3_FR_CTS   GPIOD /* PD11 */
 
#define GPIO_BANK_USART3_FR_RTS   GPIOD /* PD12 */
 
#define GPIO_USART2_CTS   GPIO0 /* PA0 */
 
#define GPIO_USART2_RTS   GPIO1 /* PA1 */
 
#define GPIO_USART2_TX   GPIO2 /* PA2 */
 
#define GPIO_USART2_RX   GPIO3 /* PA3 */
 
#define GPIO_USART2_CK   GPIO4 /* PA4 */
 
#define GPIO_USART2_RE_CTS   GPIO3 /* PD3 */
 
#define GPIO_USART2_RE_RTS   GPIO4 /* PD4 */
 
#define GPIO_USART2_RE_TX   GPIO5 /* PD5 */
 
#define GPIO_USART2_RE_RX   GPIO6 /* PD6 */
 
#define GPIO_USART2_RE_CK   GPIO7 /* PD7 */
 
#define GPIO_BANK_USART2_CTS   GPIOA /* PA0 */
 
#define GPIO_BANK_USART2_RTS   GPIOA /* PA1 */
 
#define GPIO_BANK_USART2_TX   GPIOA /* PA2 */
 
#define GPIO_BANK_USART2_RX   GPIOA /* PA3 */
 
#define GPIO_BANK_USART2_CK   GPIOA /* PA4 */
 
#define GPIO_BANK_USART2_RE_CTS   GPIOD /* PD3 */
 
#define GPIO_BANK_USART2_RE_RTS   GPIOD /* PD4 */
 
#define GPIO_BANK_USART2_RE_TX   GPIOD /* PD5 */
 
#define GPIO_BANK_USART2_RE_RX   GPIOD /* PD6 */
 
#define GPIO_BANK_USART2_RE_CK   GPIOD /* PD7 */
 
#define GPIO_USART1_CTS   GPIO11 /* PA11 */
 
#define GPIO_USART1_RTS   GPIO12 /* PA12 */
 
#define GPIO_USART1_TX   GPIO9 /* PA9 */
 
#define GPIO_USART1_RX   GPIO10 /* PA10 */
 
#define GPIO_USART1_CK   GPIO8 /* PA8 */
 
#define GPIO_USART1_RE_TX   GPIO6 /* PB6 */
 
#define GPIO_USART1_RE_RX   GPIO7 /* PB7 */
 
#define GPIO_BANK_USART1_CTS   GPIOA /* PA11 */
 
#define GPIO_BANK_USART1_RTS   GPIOA /* PA12 */
 
#define GPIO_BANK_USART1_TX   GPIOA /* PA9 */
 
#define GPIO_BANK_USART1_RX   GPIOA /* PA10 */
 
#define GPIO_BANK_USART1_CK   GPIOA /* PA8 */
 
#define GPIO_BANK_USART1_RE_TX   GPIOB /* PB6 */
 
#define GPIO_BANK_USART1_RE_RX   GPIOB /* PB7 */
 
#define GPIO_I2C1_SMBAI   GPIO5 /* PB5 */
 
#define GPIO_I2C1_SCL   GPIO6 /* PB6 */
 
#define GPIO_I2C1_SDA   GPIO7 /* PB7 */
 
#define GPIO_I2C1_RE_SMBAI   GPIO5 /* PB5 */
 
#define GPIO_I2C1_RE_SCL   GPIO8 /* PB8 */
 
#define GPIO_I2C1_RE_SDA   GPIO9 /* PB9 */
 
#define GPIO_BANK_I2C1_SMBAI   GPIOB /* PB5 */
 
#define GPIO_BANK_I2C1_SCL   GPIOB /* PB6 */
 
#define GPIO_BANK_I2C1_SDA   GPIOB /* PB7 */
 
#define GPIO_BANK_I2C1_RE_SMBAI   GPIOB /* PB5 */
 
#define GPIO_BANK_I2C1_RE_SCL   GPIOB /* PB8 */
 
#define GPIO_BANK_I2C1_RE_SDA   GPIOB /* PB9 */
 
#define GPIO_I2C2_SCL   GPIO10 /* PB10 */
 
#define GPIO_I2C2_SDA   GPIO11 /* PB11 */
 
#define GPIO_I2C2_SMBAI   GPIO12 /* PB12 */
 
#define GPIO_BANK_I2C2_SCL   GPIOB /* PB10 */
 
#define GPIO_BANK_I2C2_SDA   GPIOB /* PB11 */
 
#define GPIO_BANK_I2C2_SMBAI   GPIOB /* PB12 */
 
#define GPIO_SPI1_NSS   GPIO4 /* PA4 */
 
#define GPIO_SPI1_SCK   GPIO5 /* PA5 */
 
#define GPIO_SPI1_MISO   GPIO6 /* PA6 */
 
#define GPIO_SPI1_MOSI   GPIO7 /* PA7 */
 
#define GPIO_SPI1_RE_NSS   GPIO15 /* PA15 */
 
#define GPIO_SPI1_RE_SCK   GPIO3 /* PB3 */
 
#define GPIO_SPI1_RE_MISO   GPIO4 /* PB4 */
 
#define GPIO_SPI1_RE_MOSI   GPIO5 /* PB5 */
 
#define GPIO_BANK_SPI1_NSS   GPIOA /* PA4 */
 
#define GPIO_BANK_SPI1_SCK   GPIOA /* PA5 */
 
#define GPIO_BANK_SPI1_MISO   GPIOA /* PA6 */
 
#define GPIO_BANK_SPI1_MOSI   GPIOA /* PA7 */
 
#define GPIO_BANK_SPI1_RE_NSS   GPIOA /* PA15 */
 
#define GPIO_BANK_SPI1_RE_SCK   GPIOB /* PB3 */
 
#define GPIO_BANK_SPI1_RE_MISO   GPIOB /* PB4 */
 
#define GPIO_BANK_SPI1_RE_MOSI   GPIOB /* PB5 */
 
#define GPIO_SPI2_NSS   GPIO12 /* PB12 */
 
#define GPIO_SPI2_SCK   GPIO13 /* PB13 */
 
#define GPIO_SPI2_MISO   GPIO14 /* PB14 */
 
#define GPIO_SPI2_MOSI   GPIO15 /* PB15 */
 
#define GPIO_BANK_SPI2_NSS   GPIOB /* PB12 */
 
#define GPIO_BANK_SPI2_SCK   GPIOB /* PB13 */
 
#define GPIO_BANK_SPI2_MISO   GPIOB /* PB14 */
 
#define GPIO_BANK_SPI2_MOSI   GPIOB /* PB15 */
 
#define GPIO_SPI3_NSS   GPIO15 /* PA15 */
 
#define GPIO_SPI3_SCK   GPIO3 /* PB3 */
 
#define GPIO_SPI3_MISO   GPIO4 /* PB4 */
 
#define GPIO_SPI3_MOSI   GPIO5 /* PB5 */
 
#define GPIO_SPI3_RE_NSS   GPIO4 /* PA4 */
 
#define GPIO_SPI3_RE_SCK   GPIO10 /* PC10 */
 
#define GPIO_SPI3_RE_MISO   GPIO11 /* PC11 */
 
#define GPIO_SPI3_RE_MOSI   GPIO12 /* PC12 */
 
#define GPIO_BANK_SPI3_NSS   GPIOA /* PA15 */
 
#define GPIO_BANK_SPI3_SCK   GPIOB /* PB3 */
 
#define GPIO_BANK_SPI3_MISO   GPIOB /* PB4 */
 
#define GPIO_BANK_SPI3_MOSI   GPIOB /* PB5 */
 
#define GPIO_BANK_SPI3_RE_NSS   GPIOA /* PA4 */
 
#define GPIO_BANK_SPI3_RE_SCK   GPIOC /* PC10 */
 
#define GPIO_BANK_SPI3_RE_MISO   GPIOC /* PC11 */
 
#define GPIO_BANK_SPI3_RE_MOSI   GPIOC /* PC12 */
 
#define GPIO_ETH_RX_DV_CRS_DV   GPIO7 /* PA7 */
 
#define GPIO_ETH_RXD0   GPIO4 /* PC4 */
 
#define GPIO_ETH_RXD1   GPIO5 /* PC5 */
 
#define GPIO_ETH_RXD2   GPIO0 /* PB0 */
 
#define GPIO_ETH_RXD3   GPIO1 /* PB1 */
 
#define GPIO_ETH_RE_RX_DV_CRS_DV   GPIO8 /* PD8 */
 
#define GPIO_ETH_RE_RXD0   GPIO9 /* PD9 */
 
#define GPIO_ETH_RE_RXD1   GPIO10 /* PD10 */
 
#define GPIO_ETH_RE_RXD2   GPIO11 /* PD11 */
 
#define GPIO_ETH_RE_RXD3   GPIO12 /* PD12 */
 
#define GPIO_BANK_ETH_RX_DV_CRS_DV   GPIOA /* PA7 */
 
#define GPIO_BANK_ETH_RXD0   GPIOC /* PC4 */
 
#define GPIO_BANK_ETH_RXD1   GPIOC /* PC5 */
 
#define GPIO_BANK_ETH_RXD2   GPIOB /* PB0 */
 
#define GPIO_BANK_ETH_RXD3   GPIOB /* PB1 */
 
#define GPIO_BANK_ETH_RE_RX_DV_CRS_DV   GPIOD /* PD8 */
 
#define GPIO_BANK_ETH_RE_RXD0   GPIOD /* PD9 */
 
#define GPIO_BANK_ETH_RE_RXD1   GPIOD /* PD10 */
 
#define GPIO_BANK_ETH_RE_RXD2   GPIOD /* PD11 */
 
#define GPIO_BANK_ETH_RE_RXD3   GPIOD /* PD12 */
 
#define GPIO_CRL(port)   MMIO32((port) + 0x00)
 
#define GPIOA_CRL   GPIO_CRL(GPIOA)
 
#define GPIOB_CRL   GPIO_CRL(GPIOB)
 
#define GPIOC_CRL   GPIO_CRL(GPIOC)
 
#define GPIOD_CRL   GPIO_CRL(GPIOD)
 
#define GPIOE_CRL   GPIO_CRL(GPIOE)
 
#define GPIOF_CRL   GPIO_CRL(GPIOF)
 
#define GPIOG_CRL   GPIO_CRL(GPIOG)
 
#define GPIO_CRH(port)   MMIO32((port) + 0x04)
 
#define GPIOA_CRH   GPIO_CRH(GPIOA)
 
#define GPIOB_CRH   GPIO_CRH(GPIOB)
 
#define GPIOC_CRH   GPIO_CRH(GPIOC)
 
#define GPIOD_CRH   GPIO_CRH(GPIOD)
 
#define GPIOE_CRH   GPIO_CRH(GPIOE)
 
#define GPIOF_CRH   GPIO_CRH(GPIOF)
 
#define GPIOG_CRH   GPIO_CRH(GPIOG)
 
#define GPIO_IDR(port)   MMIO32((port) + 0x08)
 
#define GPIOA_IDR   GPIO_IDR(GPIOA)
 
#define GPIOB_IDR   GPIO_IDR(GPIOB)
 
#define GPIOC_IDR   GPIO_IDR(GPIOC)
 
#define GPIOD_IDR   GPIO_IDR(GPIOD)
 
#define GPIOE_IDR   GPIO_IDR(GPIOE)
 
#define GPIOF_IDR   GPIO_IDR(GPIOF)
 
#define GPIOG_IDR   GPIO_IDR(GPIOG)
 
#define GPIO_ODR(port)   MMIO32((port) + 0x0c)
 
#define GPIOA_ODR   GPIO_ODR(GPIOA)
 
#define GPIOB_ODR   GPIO_ODR(GPIOB)
 
#define GPIOC_ODR   GPIO_ODR(GPIOC)
 
#define GPIOD_ODR   GPIO_ODR(GPIOD)
 
#define GPIOE_ODR   GPIO_ODR(GPIOE)
 
#define GPIOF_ODR   GPIO_ODR(GPIOF)
 
#define GPIOG_ODR   GPIO_ODR(GPIOG)
 
#define GPIO_BSRR(port)   MMIO32((port) + 0x10)
 
#define GPIOA_BSRR   GPIO_BSRR(GPIOA)
 
#define GPIOB_BSRR   GPIO_BSRR(GPIOB)
 
#define GPIOC_BSRR   GPIO_BSRR(GPIOC)
 
#define GPIOD_BSRR   GPIO_BSRR(GPIOD)
 
#define GPIOE_BSRR   GPIO_BSRR(GPIOE)
 
#define GPIOF_BSRR   GPIO_BSRR(GPIOF)
 
#define GPIOG_BSRR   GPIO_BSRR(GPIOG)
 
#define GPIO_BRR(port)   MMIO16((port) + 0x14)
 
#define GPIOA_BRR   GPIO_BRR(GPIOA)
 
#define GPIOB_BRR   GPIO_BRR(GPIOB)
 
#define GPIOC_BRR   GPIO_BRR(GPIOC)
 
#define GPIOD_BRR   GPIO_BRR(GPIOD)
 
#define GPIOE_BRR   GPIO_BRR(GPIOE)
 
#define GPIOF_BRR   GPIO_BRR(GPIOF)
 
#define GPIOG_BRR   GPIO_BRR(GPIOG)
 
#define GPIO_LCKR(port)   MMIO32((port) + 0x18)
 
#define GPIOA_LCKR   GPIO_LCKR(GPIOA)
 
#define GPIOB_LCKR   GPIO_LCKR(GPIOB)
 
#define GPIOC_LCKR   GPIO_LCKR(GPIOC)
 
#define GPIOD_LCKR   GPIO_LCKR(GPIOD)
 
#define GPIOE_LCKR   GPIO_LCKR(GPIOE)
 
#define GPIOF_LCKR   GPIO_LCKR(GPIOF)
 
#define GPIOG_LCKR   GPIO_LCKR(GPIOG)
 
#define AFIO_EVCR   MMIO32(AFIO_BASE + 0x00)
 
#define AFIO_MAPR   MMIO32(AFIO_BASE + 0x04)
 
#define AFIO_EXTICR(i)   MMIO32(AFIO_BASE + 0x08 + (i)*4)
 
#define AFIO_EXTICR1   AFIO_EXTICR(0)
 
#define AFIO_EXTICR2   AFIO_EXTICR(1)
 
#define AFIO_EXTICR3   AFIO_EXTICR(2)
 
#define AFIO_EXTICR4   AFIO_EXTICR(3)
 
#define AFIO_MAPR2   MMIO32(AFIO_BASE + 0x1C)
 
#define AFIO_EVCR_EVOE   (1 << 7)
 
#define AFIO_EXTICR_FIELDSIZE   4
 EXTICR port selection bits
More...
 
#define GPIO_LCKK   (1 << 16)
 

Functions

void gpio_set_mode (uint32_t gpioport, uint8_t mode, uint8_t cnf, uint16_t gpios)
 Set GPIO Pin Mode. More...
 
void gpio_set_eventout (uint8_t evoutport, uint8_t evoutpin)
 Map the EVENTOUT signal. More...
 
void gpio_primary_remap (uint32_t swjenable, uint32_t maps)
 Map Alternate Function Port Bits (Main Set) More...
 
void gpio_secondary_remap (uint32_t maps)
 Map Alternate Function Port Bits (Secondary Set) More...
 
void gpio_set (uint32_t gpioport, uint16_t gpios)
 Set a Group of Pins Atomic. More...
 
void gpio_clear (uint32_t gpioport, uint16_t gpios)
 Clear a Group of Pins Atomic. More...
 
uint16_t gpio_get (uint32_t gpioport, uint16_t gpios)
 Read a Group of Pins. More...
 
void gpio_toggle (uint32_t gpioport, uint16_t gpios)
 Toggle a Group of Pins. More...
 
uint16_t gpio_port_read (uint32_t gpioport)
 Read from a Port. More...
 
void gpio_port_write (uint32_t gpioport, uint16_t data)
 Write to a Port. More...
 
void gpio_port_config_lock (uint32_t gpioport, uint16_t gpios)
 Lock the Configuration of a Group of Pins. More...
 

Detailed Description

Defined Constants and Types for the STM32F1xx General Purpose I/O

Version
1.0.0
Date
1 July 2012

LGPL License Terms libopencm3 License

Author
© 2011 Fergus Noble fergu.nosp@m.snob.nosp@m.le@gm.nosp@m.ail..nosp@m.com
© 2012 Ken Sarkies ksark.nosp@m.ies@.nosp@m.inter.nosp@m.node.nosp@m..on.n.nosp@m.et

Macro Definition Documentation

◆ AFIO_EVCR

#define AFIO_EVCR   MMIO32(AFIO_BASE + 0x00)

Definition at line 668 of file f1/gpio.h.

◆ AFIO_EVCR_EVOE

#define AFIO_EVCR_EVOE   (1 << 7)

Definition at line 686 of file f1/gpio.h.

◆ AFIO_EXTICR

#define AFIO_EXTICR (   i)    MMIO32(AFIO_BASE + 0x08 + (i)*4)

Definition at line 674 of file f1/gpio.h.

◆ AFIO_EXTICR1

#define AFIO_EXTICR1   AFIO_EXTICR(0)

Definition at line 675 of file f1/gpio.h.

◆ AFIO_EXTICR2

#define AFIO_EXTICR2   AFIO_EXTICR(1)

Definition at line 676 of file f1/gpio.h.

◆ AFIO_EXTICR3

#define AFIO_EXTICR3   AFIO_EXTICR(2)

Definition at line 677 of file f1/gpio.h.

◆ AFIO_EXTICR4

#define AFIO_EXTICR4   AFIO_EXTICR(3)

Definition at line 678 of file f1/gpio.h.

◆ AFIO_EXTICR_FIELDSIZE

#define AFIO_EXTICR_FIELDSIZE   4

EXTICR port selection bits

Definition at line 943 of file f1/gpio.h.

◆ AFIO_MAPR

#define AFIO_MAPR   MMIO32(AFIO_BASE + 0x04)

Definition at line 671 of file f1/gpio.h.

◆ AFIO_MAPR2

#define AFIO_MAPR2   MMIO32(AFIO_BASE + 0x1C)

Definition at line 681 of file f1/gpio.h.

◆ GPIO_BANK_CAN1_PB_RX

#define GPIO_BANK_CAN1_PB_RX   GPIO_BANK_CAN_PB_RX /* Alias */

Definition at line 86 of file f1/gpio.h.

◆ GPIO_BANK_CAN1_PB_TX

#define GPIO_BANK_CAN1_PB_TX   GPIO_BANK_CAN_PB_TX /* Alias */

Definition at line 87 of file f1/gpio.h.

◆ GPIO_BANK_CAN1_PD_RX

#define GPIO_BANK_CAN1_PD_RX   GPIO_BANK_CAN_PD_RX /* Alias */

Definition at line 91 of file f1/gpio.h.

◆ GPIO_BANK_CAN1_PD_TX

#define GPIO_BANK_CAN1_PD_TX   GPIO_BANK_CAN_PD_TX /* Alias */

Definition at line 92 of file f1/gpio.h.

◆ GPIO_BANK_CAN1_RX

#define GPIO_BANK_CAN1_RX   GPIOA /* PA11 */

Definition at line 79 of file f1/gpio.h.

◆ GPIO_BANK_CAN1_TX

#define GPIO_BANK_CAN1_TX   GPIOA /* PA12 */

Definition at line 80 of file f1/gpio.h.

◆ GPIO_BANK_CAN2_RE_RX

#define GPIO_BANK_CAN2_RE_RX   GPIOB /* PB5 */

Definition at line 105 of file f1/gpio.h.

◆ GPIO_BANK_CAN2_RE_TX

#define GPIO_BANK_CAN2_RE_TX   GPIOB /* PB6 */

Definition at line 106 of file f1/gpio.h.

◆ GPIO_BANK_CAN2_RX

#define GPIO_BANK_CAN2_RX   GPIOB /* PB12 */

Definition at line 102 of file f1/gpio.h.

◆ GPIO_BANK_CAN2_TX

#define GPIO_BANK_CAN2_TX   GPIOB /* PB13 */

Definition at line 103 of file f1/gpio.h.

◆ GPIO_BANK_CAN_PB_RX

#define GPIO_BANK_CAN_PB_RX   GPIOB /* PB8 */

Definition at line 84 of file f1/gpio.h.

◆ GPIO_BANK_CAN_PB_TX

#define GPIO_BANK_CAN_PB_TX   GPIOB /* PB9 */

Definition at line 85 of file f1/gpio.h.

◆ GPIO_BANK_CAN_PD_RX

#define GPIO_BANK_CAN_PD_RX   GPIOD /* PD0 */

Definition at line 89 of file f1/gpio.h.

◆ GPIO_BANK_CAN_PD_TX

#define GPIO_BANK_CAN_PD_TX   GPIOD /* PD1 */

Definition at line 90 of file f1/gpio.h.

◆ GPIO_BANK_CAN_RX

#define GPIO_BANK_CAN_RX   GPIO_BANK_CAN1_RX /* Alias */

Definition at line 81 of file f1/gpio.h.

◆ GPIO_BANK_CAN_TX

#define GPIO_BANK_CAN_TX   GPIO_BANK_CAN1_TX /* Alias */

Definition at line 82 of file f1/gpio.h.

◆ GPIO_BANK_ETH_RE_RX_DV_CRS_DV

#define GPIO_BANK_ETH_RE_RX_DV_CRS_DV   GPIOD /* PD8 */

Definition at line 523 of file f1/gpio.h.

◆ GPIO_BANK_ETH_RE_RXD0

#define GPIO_BANK_ETH_RE_RXD0   GPIOD /* PD9 */

Definition at line 524 of file f1/gpio.h.

◆ GPIO_BANK_ETH_RE_RXD1

#define GPIO_BANK_ETH_RE_RXD1   GPIOD /* PD10 */

Definition at line 525 of file f1/gpio.h.

◆ GPIO_BANK_ETH_RE_RXD2

#define GPIO_BANK_ETH_RE_RXD2   GPIOD /* PD11 */

Definition at line 526 of file f1/gpio.h.

◆ GPIO_BANK_ETH_RE_RXD3

#define GPIO_BANK_ETH_RE_RXD3   GPIOD /* PD12 */

Definition at line 527 of file f1/gpio.h.

◆ GPIO_BANK_ETH_RX_DV_CRS_DV

#define GPIO_BANK_ETH_RX_DV_CRS_DV   GPIOA /* PA7 */

Definition at line 517 of file f1/gpio.h.

◆ GPIO_BANK_ETH_RXD0

#define GPIO_BANK_ETH_RXD0   GPIOC /* PC4 */

Definition at line 518 of file f1/gpio.h.

◆ GPIO_BANK_ETH_RXD1

#define GPIO_BANK_ETH_RXD1   GPIOC /* PC5 */

Definition at line 519 of file f1/gpio.h.

◆ GPIO_BANK_ETH_RXD2

#define GPIO_BANK_ETH_RXD2   GPIOB /* PB0 */

Definition at line 520 of file f1/gpio.h.

◆ GPIO_BANK_ETH_RXD3

#define GPIO_BANK_ETH_RXD3   GPIOB /* PB1 */

Definition at line 521 of file f1/gpio.h.

◆ GPIO_BANK_I2C1_RE_SCL

#define GPIO_BANK_I2C1_RE_SCL   GPIOB /* PB8 */

Definition at line 434 of file f1/gpio.h.

◆ GPIO_BANK_I2C1_RE_SDA

#define GPIO_BANK_I2C1_RE_SDA   GPIOB /* PB9 */

Definition at line 435 of file f1/gpio.h.

◆ GPIO_BANK_I2C1_RE_SMBAI

#define GPIO_BANK_I2C1_RE_SMBAI   GPIOB /* PB5 */

Definition at line 433 of file f1/gpio.h.

◆ GPIO_BANK_I2C1_SCL

#define GPIO_BANK_I2C1_SCL   GPIOB /* PB6 */

Definition at line 430 of file f1/gpio.h.

◆ GPIO_BANK_I2C1_SDA

#define GPIO_BANK_I2C1_SDA   GPIOB /* PB7 */

Definition at line 431 of file f1/gpio.h.

◆ GPIO_BANK_I2C1_SMBAI

#define GPIO_BANK_I2C1_SMBAI   GPIOB /* PB5 */

Definition at line 429 of file f1/gpio.h.

◆ GPIO_BANK_I2C2_SCL

#define GPIO_BANK_I2C2_SCL   GPIOB /* PB10 */

Definition at line 443 of file f1/gpio.h.

◆ GPIO_BANK_I2C2_SDA

#define GPIO_BANK_I2C2_SDA   GPIOB /* PB11 */

Definition at line 444 of file f1/gpio.h.

◆ GPIO_BANK_I2C2_SMBAI

#define GPIO_BANK_I2C2_SMBAI   GPIOB /* PB12 */

Definition at line 445 of file f1/gpio.h.

◆ GPIO_BANK_JNTRST

#define GPIO_BANK_JNTRST   GPIOB /* PB4 */

Definition at line 125 of file f1/gpio.h.

◆ GPIO_BANK_JTCK_SWCLK

#define GPIO_BANK_JTCK_SWCLK   GPIOA /* PA14 */

Definition at line 122 of file f1/gpio.h.

◆ GPIO_BANK_JTDI

#define GPIO_BANK_JTDI   GPIOA /* PA15 */

Definition at line 123 of file f1/gpio.h.

◆ GPIO_BANK_JTDO_TRACESWO

#define GPIO_BANK_JTDO_TRACESWO   GPIOB /* PB3 */

Definition at line 124 of file f1/gpio.h.

◆ GPIO_BANK_JTMS_SWDIO

#define GPIO_BANK_JTMS_SWDIO   GPIOA /* PA13 */

Definition at line 121 of file f1/gpio.h.

◆ GPIO_BANK_SPI1_MISO

#define GPIO_BANK_SPI1_MISO   GPIOA /* PA6 */

Definition at line 461 of file f1/gpio.h.

◆ GPIO_BANK_SPI1_MOSI

#define GPIO_BANK_SPI1_MOSI   GPIOA /* PA7 */

Definition at line 462 of file f1/gpio.h.

◆ GPIO_BANK_SPI1_NSS

#define GPIO_BANK_SPI1_NSS   GPIOA /* PA4 */

Definition at line 459 of file f1/gpio.h.

◆ GPIO_BANK_SPI1_RE_MISO

#define GPIO_BANK_SPI1_RE_MISO   GPIOB /* PB4 */

Definition at line 466 of file f1/gpio.h.

◆ GPIO_BANK_SPI1_RE_MOSI

#define GPIO_BANK_SPI1_RE_MOSI   GPIOB /* PB5 */

Definition at line 467 of file f1/gpio.h.

◆ GPIO_BANK_SPI1_RE_NSS

#define GPIO_BANK_SPI1_RE_NSS   GPIOA /* PA15 */

Definition at line 464 of file f1/gpio.h.

◆ GPIO_BANK_SPI1_RE_SCK

#define GPIO_BANK_SPI1_RE_SCK   GPIOB /* PB3 */

Definition at line 465 of file f1/gpio.h.

◆ GPIO_BANK_SPI1_SCK

#define GPIO_BANK_SPI1_SCK   GPIOA /* PA5 */

Definition at line 460 of file f1/gpio.h.

◆ GPIO_BANK_SPI2_MISO

#define GPIO_BANK_SPI2_MISO   GPIOB /* PB14 */

Definition at line 478 of file f1/gpio.h.

◆ GPIO_BANK_SPI2_MOSI

#define GPIO_BANK_SPI2_MOSI   GPIOB /* PB15 */

Definition at line 479 of file f1/gpio.h.

◆ GPIO_BANK_SPI2_NSS

#define GPIO_BANK_SPI2_NSS   GPIOB /* PB12 */

Definition at line 476 of file f1/gpio.h.

◆ GPIO_BANK_SPI2_SCK

#define GPIO_BANK_SPI2_SCK   GPIOB /* PB13 */

Definition at line 477 of file f1/gpio.h.

◆ GPIO_BANK_SPI3_MISO

#define GPIO_BANK_SPI3_MISO   GPIOB /* PB4 */

Definition at line 495 of file f1/gpio.h.

◆ GPIO_BANK_SPI3_MOSI

#define GPIO_BANK_SPI3_MOSI   GPIOB /* PB5 */

Definition at line 496 of file f1/gpio.h.

◆ GPIO_BANK_SPI3_NSS

#define GPIO_BANK_SPI3_NSS   GPIOA /* PA15 */

Definition at line 493 of file f1/gpio.h.

◆ GPIO_BANK_SPI3_RE_MISO

#define GPIO_BANK_SPI3_RE_MISO   GPIOC /* PC11 */

Definition at line 500 of file f1/gpio.h.

◆ GPIO_BANK_SPI3_RE_MOSI

#define GPIO_BANK_SPI3_RE_MOSI   GPIOC /* PC12 */

Definition at line 501 of file f1/gpio.h.

◆ GPIO_BANK_SPI3_RE_NSS

#define GPIO_BANK_SPI3_RE_NSS   GPIOA /* PA4 */

Definition at line 498 of file f1/gpio.h.

◆ GPIO_BANK_SPI3_RE_SCK

#define GPIO_BANK_SPI3_RE_SCK   GPIOC /* PC10 */

Definition at line 499 of file f1/gpio.h.

◆ GPIO_BANK_SPI3_SCK

#define GPIO_BANK_SPI3_SCK   GPIOB /* PB3 */

Definition at line 494 of file f1/gpio.h.

◆ GPIO_BANK_TIM1_BKIN

#define GPIO_BANK_TIM1_BKIN   GPIOB /* PB12 */

Definition at line 289 of file f1/gpio.h.

◆ GPIO_BANK_TIM1_BKIN_CH123N

#define GPIO_BANK_TIM1_BKIN_CH123N   GPIOB

Definition at line 294 of file f1/gpio.h.

◆ GPIO_BANK_TIM1_CH1

#define GPIO_BANK_TIM1_CH1   GPIOA /* PA8 */

Definition at line 285 of file f1/gpio.h.

◆ GPIO_BANK_TIM1_CH1N

#define GPIO_BANK_TIM1_CH1N   GPIOB /* PB13 */

Definition at line 290 of file f1/gpio.h.

◆ GPIO_BANK_TIM1_CH2

#define GPIO_BANK_TIM1_CH2   GPIOA /* PA9 */

Definition at line 286 of file f1/gpio.h.

◆ GPIO_BANK_TIM1_CH2N

#define GPIO_BANK_TIM1_CH2N   GPIOB /* PB14 */

Definition at line 291 of file f1/gpio.h.

◆ GPIO_BANK_TIM1_CH3

#define GPIO_BANK_TIM1_CH3   GPIOA /* PA10 */

Definition at line 287 of file f1/gpio.h.

◆ GPIO_BANK_TIM1_CH3N

#define GPIO_BANK_TIM1_CH3N   GPIOB /* PB15 */

Definition at line 292 of file f1/gpio.h.

◆ GPIO_BANK_TIM1_CH4

#define GPIO_BANK_TIM1_CH4   GPIOA /* PA11 */

Definition at line 288 of file f1/gpio.h.

◆ GPIO_BANK_TIM1_ETR

#define GPIO_BANK_TIM1_ETR   GPIOA /* PA12 */

Definition at line 284 of file f1/gpio.h.

◆ GPIO_BANK_TIM1_ETR_CH1234

#define GPIO_BANK_TIM1_ETR_CH1234   GPIOA

Definition at line 293 of file f1/gpio.h.

◆ GPIO_BANK_TIM1_FR

#define GPIO_BANK_TIM1_FR   GPIOE

Definition at line 317 of file f1/gpio.h.

◆ GPIO_BANK_TIM1_FR_BKIN

#define GPIO_BANK_TIM1_FR_BKIN   GPIOE /* PE15 */

Definition at line 313 of file f1/gpio.h.

◆ GPIO_BANK_TIM1_FR_CH1

#define GPIO_BANK_TIM1_FR_CH1   GPIOE /* PE9 */

Definition at line 309 of file f1/gpio.h.

◆ GPIO_BANK_TIM1_FR_CH1N

#define GPIO_BANK_TIM1_FR_CH1N   GPIOE /* PE8 */

Definition at line 314 of file f1/gpio.h.

◆ GPIO_BANK_TIM1_FR_CH2

#define GPIO_BANK_TIM1_FR_CH2   GPIOE /* PE11 */

Definition at line 310 of file f1/gpio.h.

◆ GPIO_BANK_TIM1_FR_CH2N

#define GPIO_BANK_TIM1_FR_CH2N   GPIOE /* PE10 */

Definition at line 315 of file f1/gpio.h.

◆ GPIO_BANK_TIM1_FR_CH3

#define GPIO_BANK_TIM1_FR_CH3   GPIOE /* PE13 */

Definition at line 311 of file f1/gpio.h.

◆ GPIO_BANK_TIM1_FR_CH3N

#define GPIO_BANK_TIM1_FR_CH3N   GPIOE /* PE12 */

Definition at line 316 of file f1/gpio.h.

◆ GPIO_BANK_TIM1_FR_CH4

#define GPIO_BANK_TIM1_FR_CH4   GPIOE /* PE14 */

Definition at line 312 of file f1/gpio.h.

◆ GPIO_BANK_TIM1_FR_ETR

#define GPIO_BANK_TIM1_FR_ETR   GPIOE /* PE7 */

Definition at line 308 of file f1/gpio.h.

◆ GPIO_BANK_TIM1_PR_BKIN

#define GPIO_BANK_TIM1_PR_BKIN   GPIOA /* PA6 */

Definition at line 301 of file f1/gpio.h.

◆ GPIO_BANK_TIM1_PR_CH1

#define GPIO_BANK_TIM1_PR_CH1   GPIOA /* PA8 */

Definition at line 297 of file f1/gpio.h.

◆ GPIO_BANK_TIM1_PR_CH1N

#define GPIO_BANK_TIM1_PR_CH1N   GPIOA /* PA7 */

Definition at line 302 of file f1/gpio.h.

◆ GPIO_BANK_TIM1_PR_CH2

#define GPIO_BANK_TIM1_PR_CH2   GPIOA /* PA9 */

Definition at line 298 of file f1/gpio.h.

◆ GPIO_BANK_TIM1_PR_CH23N

#define GPIO_BANK_TIM1_PR_CH23N   GPIOB

Definition at line 306 of file f1/gpio.h.

◆ GPIO_BANK_TIM1_PR_CH2N

#define GPIO_BANK_TIM1_PR_CH2N   GPIOB /* PB0 */

Definition at line 303 of file f1/gpio.h.

◆ GPIO_BANK_TIM1_PR_CH3

#define GPIO_BANK_TIM1_PR_CH3   GPIOA /* PA10 */

Definition at line 299 of file f1/gpio.h.

◆ GPIO_BANK_TIM1_PR_CH3N

#define GPIO_BANK_TIM1_PR_CH3N   GPIOB /* PB1 */

Definition at line 304 of file f1/gpio.h.

◆ GPIO_BANK_TIM1_PR_CH4

#define GPIO_BANK_TIM1_PR_CH4   GPIOA /* PA11 */

Definition at line 300 of file f1/gpio.h.

◆ GPIO_BANK_TIM1_PR_ETR

#define GPIO_BANK_TIM1_PR_ETR   GPIOA /* PA12 */

Definition at line 296 of file f1/gpio.h.

◆ GPIO_BANK_TIM1_PR_ETR_CH1234_BKIN_CH1N

#define GPIO_BANK_TIM1_PR_ETR_CH1234_BKIN_CH1N   GPIOA

Definition at line 305 of file f1/gpio.h.

◆ GPIO_BANK_TIM2

#define GPIO_BANK_TIM2   GPIOA

Definition at line 231 of file f1/gpio.h.

◆ GPIO_BANK_TIM2_CH1_ETR

#define GPIO_BANK_TIM2_CH1_ETR   GPIOA /* PA0 */

Definition at line 227 of file f1/gpio.h.

◆ GPIO_BANK_TIM2_CH2

#define GPIO_BANK_TIM2_CH2   GPIOA /* PA1 */

Definition at line 228 of file f1/gpio.h.

◆ GPIO_BANK_TIM2_CH3

#define GPIO_BANK_TIM2_CH3   GPIOA /* PA2 */

Definition at line 229 of file f1/gpio.h.

◆ GPIO_BANK_TIM2_CH4

#define GPIO_BANK_TIM2_CH4   GPIOA /* PA3 */

Definition at line 230 of file f1/gpio.h.

◆ GPIO_BANK_TIM2_FR_CH1_ETR

#define GPIO_BANK_TIM2_FR_CH1_ETR   GPIOA /* PA15 */

Definition at line 246 of file f1/gpio.h.

◆ GPIO_BANK_TIM2_FR_CH2

#define GPIO_BANK_TIM2_FR_CH2   GPIOB /* PB3 */

Definition at line 247 of file f1/gpio.h.

◆ GPIO_BANK_TIM2_FR_CH234

#define GPIO_BANK_TIM2_FR_CH234   GPIOB

Definition at line 250 of file f1/gpio.h.

◆ GPIO_BANK_TIM2_FR_CH3

#define GPIO_BANK_TIM2_FR_CH3   GPIOB /* PB10 */

Definition at line 248 of file f1/gpio.h.

◆ GPIO_BANK_TIM2_FR_CH4

#define GPIO_BANK_TIM2_FR_CH4   GPIOB /* PB11 */

Definition at line 249 of file f1/gpio.h.

◆ GPIO_BANK_TIM2_PR1_CH134

#define GPIO_BANK_TIM2_PR1_CH134   GPIOA

Definition at line 237 of file f1/gpio.h.

◆ GPIO_BANK_TIM2_PR1_CH1_ETR

#define GPIO_BANK_TIM2_PR1_CH1_ETR   GPIOA /* PA15 */

Definition at line 233 of file f1/gpio.h.

◆ GPIO_BANK_TIM2_PR1_CH2

#define GPIO_BANK_TIM2_PR1_CH2   GPIOB /* PB3 */

Definition at line 234 of file f1/gpio.h.

◆ GPIO_BANK_TIM2_PR1_CH3

#define GPIO_BANK_TIM2_PR1_CH3   GPIOA /* PA2 */

Definition at line 235 of file f1/gpio.h.

◆ GPIO_BANK_TIM2_PR1_CH4

#define GPIO_BANK_TIM2_PR1_CH4   GPIOA /* PA3 */

Definition at line 236 of file f1/gpio.h.

◆ GPIO_BANK_TIM2_PR2_CH12

#define GPIO_BANK_TIM2_PR2_CH12   GPIOA

Definition at line 243 of file f1/gpio.h.

◆ GPIO_BANK_TIM2_PR2_CH1_ETR

#define GPIO_BANK_TIM2_PR2_CH1_ETR   GPIOA /* PA0 */

Definition at line 239 of file f1/gpio.h.

◆ GPIO_BANK_TIM2_PR2_CH2

#define GPIO_BANK_TIM2_PR2_CH2   GPIOA /* PA1 */

Definition at line 240 of file f1/gpio.h.

◆ GPIO_BANK_TIM2_PR2_CH3

#define GPIO_BANK_TIM2_PR2_CH3   GPIOB /* PB10 */

Definition at line 241 of file f1/gpio.h.

◆ GPIO_BANK_TIM2_PR2_CH34

#define GPIO_BANK_TIM2_PR2_CH34   GPIOB

Definition at line 244 of file f1/gpio.h.

◆ GPIO_BANK_TIM2_PR2_CH4

#define GPIO_BANK_TIM2_PR2_CH4   GPIOB /* PB11 */

Definition at line 242 of file f1/gpio.h.

◆ GPIO_BANK_TIM3_CH1

#define GPIO_BANK_TIM3_CH1   GPIOA /* PA6 */

Definition at line 186 of file f1/gpio.h.

◆ GPIO_BANK_TIM3_CH12

#define GPIO_BANK_TIM3_CH12   GPIOA

Definition at line 190 of file f1/gpio.h.

◆ GPIO_BANK_TIM3_CH2

#define GPIO_BANK_TIM3_CH2   GPIOA /* PA7 */

Definition at line 187 of file f1/gpio.h.

◆ GPIO_BANK_TIM3_CH3

#define GPIO_BANK_TIM3_CH3   GPIOB /* PB0 */

Definition at line 188 of file f1/gpio.h.

◆ GPIO_BANK_TIM3_CH34

#define GPIO_BANK_TIM3_CH34   GPIOB

Definition at line 191 of file f1/gpio.h.

◆ GPIO_BANK_TIM3_CH4

#define GPIO_BANK_TIM3_CH4   GPIOB /* PB1 */

Definition at line 189 of file f1/gpio.h.

◆ GPIO_BANK_TIM3_FR

#define GPIO_BANK_TIM3_FR   GPIOC

Definition at line 203 of file f1/gpio.h.

◆ GPIO_BANK_TIM3_FR_CH1

#define GPIO_BANK_TIM3_FR_CH1   GPIOC /* PC6 */

Definition at line 199 of file f1/gpio.h.

◆ GPIO_BANK_TIM3_FR_CH2

#define GPIO_BANK_TIM3_FR_CH2   GPIOC /* PC7 */

Definition at line 200 of file f1/gpio.h.

◆ GPIO_BANK_TIM3_FR_CH3

#define GPIO_BANK_TIM3_FR_CH3   GPIOC /* PC8 */

Definition at line 201 of file f1/gpio.h.

◆ GPIO_BANK_TIM3_FR_CH4

#define GPIO_BANK_TIM3_FR_CH4   GPIOC /* PC9 */

Definition at line 202 of file f1/gpio.h.

◆ GPIO_BANK_TIM3_PR

#define GPIO_BANK_TIM3_PR   GPIOB

Definition at line 197 of file f1/gpio.h.

◆ GPIO_BANK_TIM3_PR_CH1

#define GPIO_BANK_TIM3_PR_CH1   GPIOB /* PB4 */

Definition at line 193 of file f1/gpio.h.

◆ GPIO_BANK_TIM3_PR_CH2

#define GPIO_BANK_TIM3_PR_CH2   GPIOB /* PB5 */

Definition at line 194 of file f1/gpio.h.

◆ GPIO_BANK_TIM3_PR_CH3

#define GPIO_BANK_TIM3_PR_CH3   GPIOB /* PB0 */

Definition at line 195 of file f1/gpio.h.

◆ GPIO_BANK_TIM3_PR_CH4

#define GPIO_BANK_TIM3_PR_CH4   GPIOB /* PB1 */

Definition at line 196 of file f1/gpio.h.

◆ GPIO_BANK_TIM4

#define GPIO_BANK_TIM4   GPIOB

Definition at line 161 of file f1/gpio.h.

◆ GPIO_BANK_TIM4_CH1

#define GPIO_BANK_TIM4_CH1   GPIOB /* PB6 */

Definition at line 157 of file f1/gpio.h.

◆ GPIO_BANK_TIM4_CH2

#define GPIO_BANK_TIM4_CH2   GPIOB /* PB7 */

Definition at line 158 of file f1/gpio.h.

◆ GPIO_BANK_TIM4_CH3

#define GPIO_BANK_TIM4_CH3   GPIOB /* PB8 */

Definition at line 159 of file f1/gpio.h.

◆ GPIO_BANK_TIM4_CH4

#define GPIO_BANK_TIM4_CH4   GPIOB /* PB9 */

Definition at line 160 of file f1/gpio.h.

◆ GPIO_BANK_TIM4_RE

#define GPIO_BANK_TIM4_RE   GPIOD

Definition at line 167 of file f1/gpio.h.

◆ GPIO_BANK_TIM4_RE_CH1

#define GPIO_BANK_TIM4_RE_CH1   GPIOD /* PD12 */

Definition at line 163 of file f1/gpio.h.

◆ GPIO_BANK_TIM4_RE_CH2

#define GPIO_BANK_TIM4_RE_CH2   GPIOD /* PD13 */

Definition at line 164 of file f1/gpio.h.

◆ GPIO_BANK_TIM4_RE_CH3

#define GPIO_BANK_TIM4_RE_CH3   GPIOD /* PD14 */

Definition at line 165 of file f1/gpio.h.

◆ GPIO_BANK_TIM4_RE_CH4

#define GPIO_BANK_TIM4_RE_CH4   GPIOD /* PD15 */

Definition at line 166 of file f1/gpio.h.

◆ GPIO_BANK_TIM5

#define GPIO_BANK_TIM5   GPIOA

Definition at line 143 of file f1/gpio.h.

◆ GPIO_BANK_TIM5_CH1

#define GPIO_BANK_TIM5_CH1   GPIOA /* PA0 */

Definition at line 139 of file f1/gpio.h.

◆ GPIO_BANK_TIM5_CH2

#define GPIO_BANK_TIM5_CH2   GPIOA /* PA1 */

Definition at line 140 of file f1/gpio.h.

◆ GPIO_BANK_TIM5_CH3

#define GPIO_BANK_TIM5_CH3   GPIOA /* PA2 */

Definition at line 141 of file f1/gpio.h.

◆ GPIO_BANK_TIM5_CH4

#define GPIO_BANK_TIM5_CH4   GPIOA /* PA3 */

Definition at line 142 of file f1/gpio.h.

◆ GPIO_BANK_TRACECK

#define GPIO_BANK_TRACECK   GPIOE /* PE2 */

Definition at line 126 of file f1/gpio.h.

◆ GPIO_BANK_TRACED0

#define GPIO_BANK_TRACED0   GPIOE /* PE3 */

Definition at line 127 of file f1/gpio.h.

◆ GPIO_BANK_TRACED1

#define GPIO_BANK_TRACED1   GPIOE /* PE4 */

Definition at line 128 of file f1/gpio.h.

◆ GPIO_BANK_TRACED2

#define GPIO_BANK_TRACED2   GPIOE /* PE5 */

Definition at line 129 of file f1/gpio.h.

◆ GPIO_BANK_TRACED3

#define GPIO_BANK_TRACED3   GPIOE /* PE6 */

Definition at line 130 of file f1/gpio.h.

◆ GPIO_BANK_UART4_RX

#define GPIO_BANK_UART4_RX   GPIOC /* PC11 */

Definition at line 333 of file f1/gpio.h.

◆ GPIO_BANK_UART4_TX

#define GPIO_BANK_UART4_TX   GPIOC /* PC10 */

Definition at line 332 of file f1/gpio.h.

◆ GPIO_BANK_UART5_RX

#define GPIO_BANK_UART5_RX   GPIOD /* PD2 */

Definition at line 325 of file f1/gpio.h.

◆ GPIO_BANK_UART5_TX

#define GPIO_BANK_UART5_TX   GPIOC /* PC12 */

Definition at line 324 of file f1/gpio.h.

◆ GPIO_BANK_USART1_CK

#define GPIO_BANK_USART1_CK   GPIOA /* PA8 */

Definition at line 414 of file f1/gpio.h.

◆ GPIO_BANK_USART1_CTS

#define GPIO_BANK_USART1_CTS   GPIOA /* PA11 */

Definition at line 410 of file f1/gpio.h.

◆ GPIO_BANK_USART1_RE_RX

#define GPIO_BANK_USART1_RE_RX   GPIOB /* PB7 */

Definition at line 417 of file f1/gpio.h.

◆ GPIO_BANK_USART1_RE_TX

#define GPIO_BANK_USART1_RE_TX   GPIOB /* PB6 */

Definition at line 416 of file f1/gpio.h.

◆ GPIO_BANK_USART1_RTS

#define GPIO_BANK_USART1_RTS   GPIOA /* PA12 */

Definition at line 411 of file f1/gpio.h.

◆ GPIO_BANK_USART1_RX

#define GPIO_BANK_USART1_RX   GPIOA /* PA10 */

Definition at line 413 of file f1/gpio.h.

◆ GPIO_BANK_USART1_TX

#define GPIO_BANK_USART1_TX   GPIOA /* PA9 */

Definition at line 412 of file f1/gpio.h.

◆ GPIO_BANK_USART2_CK

#define GPIO_BANK_USART2_CK   GPIOA /* PA4 */

Definition at line 391 of file f1/gpio.h.

◆ GPIO_BANK_USART2_CTS

#define GPIO_BANK_USART2_CTS   GPIOA /* PA0 */

Definition at line 387 of file f1/gpio.h.

◆ GPIO_BANK_USART2_RE_CK

#define GPIO_BANK_USART2_RE_CK   GPIOD /* PD7 */

Definition at line 397 of file f1/gpio.h.

◆ GPIO_BANK_USART2_RE_CTS

#define GPIO_BANK_USART2_RE_CTS   GPIOD /* PD3 */

Definition at line 393 of file f1/gpio.h.

◆ GPIO_BANK_USART2_RE_RTS

#define GPIO_BANK_USART2_RE_RTS   GPIOD /* PD4 */

Definition at line 394 of file f1/gpio.h.

◆ GPIO_BANK_USART2_RE_RX

#define GPIO_BANK_USART2_RE_RX   GPIOD /* PD6 */

Definition at line 396 of file f1/gpio.h.

◆ GPIO_BANK_USART2_RE_TX

#define GPIO_BANK_USART2_RE_TX   GPIOD /* PD5 */

Definition at line 395 of file f1/gpio.h.

◆ GPIO_BANK_USART2_RTS

#define GPIO_BANK_USART2_RTS   GPIOA /* PA1 */

Definition at line 388 of file f1/gpio.h.

◆ GPIO_BANK_USART2_RX

#define GPIO_BANK_USART2_RX   GPIOA /* PA3 */

Definition at line 390 of file f1/gpio.h.

◆ GPIO_BANK_USART2_TX

#define GPIO_BANK_USART2_TX   GPIOA /* PA2 */

Definition at line 389 of file f1/gpio.h.

◆ GPIO_BANK_USART3_CK

#define GPIO_BANK_USART3_CK   GPIOB /* PB12 */

Definition at line 357 of file f1/gpio.h.

◆ GPIO_BANK_USART3_CTS

#define GPIO_BANK_USART3_CTS   GPIOB /* PB13 */

Definition at line 358 of file f1/gpio.h.

◆ GPIO_BANK_USART3_FR_CK

#define GPIO_BANK_USART3_FR_CK   GPIOD /* PD10 */

Definition at line 369 of file f1/gpio.h.

◆ GPIO_BANK_USART3_FR_CTS

#define GPIO_BANK_USART3_FR_CTS   GPIOD /* PD11 */

Definition at line 370 of file f1/gpio.h.

◆ GPIO_BANK_USART3_FR_RTS

#define GPIO_BANK_USART3_FR_RTS   GPIOD /* PD12 */

Definition at line 371 of file f1/gpio.h.

◆ GPIO_BANK_USART3_FR_RX

#define GPIO_BANK_USART3_FR_RX   GPIOD /* PD9 */

Definition at line 368 of file f1/gpio.h.

◆ GPIO_BANK_USART3_FR_TX

#define GPIO_BANK_USART3_FR_TX   GPIOD /* PD8 */

Definition at line 367 of file f1/gpio.h.

◆ GPIO_BANK_USART3_PR_CK

#define GPIO_BANK_USART3_PR_CK   GPIOC /* PC12 */

Definition at line 363 of file f1/gpio.h.

◆ GPIO_BANK_USART3_PR_CTS

#define GPIO_BANK_USART3_PR_CTS   GPIOB /* PB13 */

Definition at line 364 of file f1/gpio.h.

◆ GPIO_BANK_USART3_PR_RTS

#define GPIO_BANK_USART3_PR_RTS   GPIOB /* PB14 */

Definition at line 365 of file f1/gpio.h.

◆ GPIO_BANK_USART3_PR_RX

#define GPIO_BANK_USART3_PR_RX   GPIOC /* PC11 */

Definition at line 362 of file f1/gpio.h.

◆ GPIO_BANK_USART3_PR_TX

#define GPIO_BANK_USART3_PR_TX   GPIOC /* PC10 */

Definition at line 361 of file f1/gpio.h.

◆ GPIO_BANK_USART3_RTS

#define GPIO_BANK_USART3_RTS   GPIOB /* PB14 */

Definition at line 359 of file f1/gpio.h.

◆ GPIO_BANK_USART3_RX

#define GPIO_BANK_USART3_RX   GPIOB /* PB11 */

Definition at line 356 of file f1/gpio.h.

◆ GPIO_BANK_USART3_TX

#define GPIO_BANK_USART3_TX   GPIOB /* PB10 */

Definition at line 355 of file f1/gpio.h.

◆ GPIO_BRR

#define GPIO_BRR (   port)    MMIO16((port) + 0x14)

Definition at line 582 of file f1/gpio.h.

◆ GPIO_BSRR

#define GPIO_BSRR (   port)    MMIO32((port) + 0x10)

Definition at line 572 of file f1/gpio.h.

◆ GPIO_CAN1_PB_RX

#define GPIO_CAN1_PB_RX   GPIO_CAN_PB_RX /* Alias */

Definition at line 70 of file f1/gpio.h.

◆ GPIO_CAN1_PB_TX

#define GPIO_CAN1_PB_TX   GPIO_CAN_PB_TX /* Alias */

Definition at line 71 of file f1/gpio.h.

◆ GPIO_CAN1_PD_RX

#define GPIO_CAN1_PD_RX   GPIO_CAN_PD_RX /* Alias */

Definition at line 75 of file f1/gpio.h.

◆ GPIO_CAN1_PD_TX

#define GPIO_CAN1_PD_TX   GPIO_CAN_PD_TX /* Alias */

Definition at line 76 of file f1/gpio.h.

◆ GPIO_CAN1_RX

#define GPIO_CAN1_RX   GPIO11 /* PA11 */

Definition at line 63 of file f1/gpio.h.

◆ GPIO_CAN1_TX

#define GPIO_CAN1_TX   GPIO12 /* PA12 */

Definition at line 64 of file f1/gpio.h.

◆ GPIO_CAN2_RE_RX

#define GPIO_CAN2_RE_RX   GPIO5 /* PB5 */

Definition at line 98 of file f1/gpio.h.

◆ GPIO_CAN2_RE_TX

#define GPIO_CAN2_RE_TX   GPIO6 /* PB6 */

Definition at line 99 of file f1/gpio.h.

◆ GPIO_CAN2_RX

#define GPIO_CAN2_RX   GPIO12 /* PB12 */

Definition at line 95 of file f1/gpio.h.

◆ GPIO_CAN2_TX

#define GPIO_CAN2_TX   GPIO13 /* PB13 */

Definition at line 96 of file f1/gpio.h.

◆ GPIO_CAN_PB_RX

#define GPIO_CAN_PB_RX   GPIO8 /* PB8 */

Definition at line 68 of file f1/gpio.h.

◆ GPIO_CAN_PB_TX

#define GPIO_CAN_PB_TX   GPIO9 /* PB9 */

Definition at line 69 of file f1/gpio.h.

◆ GPIO_CAN_PD_RX

#define GPIO_CAN_PD_RX   GPIO0 /* PD0 */

Definition at line 73 of file f1/gpio.h.

◆ GPIO_CAN_PD_TX

#define GPIO_CAN_PD_TX   GPIO1 /* PD1 */

Definition at line 74 of file f1/gpio.h.

◆ GPIO_CAN_RX

#define GPIO_CAN_RX   GPIO_CAN1_RX /* Alias */

Definition at line 65 of file f1/gpio.h.

◆ GPIO_CAN_TX

#define GPIO_CAN_TX   GPIO_CAN1_TX /* Alias */

Definition at line 66 of file f1/gpio.h.

◆ GPIO_CRH

#define GPIO_CRH (   port)    MMIO32((port) + 0x04)

Definition at line 542 of file f1/gpio.h.

◆ GPIO_CRL

#define GPIO_CRL (   port)    MMIO32((port) + 0x00)

Definition at line 532 of file f1/gpio.h.

◆ GPIO_ETH_RE_RX_DV_CRS_DV

#define GPIO_ETH_RE_RX_DV_CRS_DV   GPIO8 /* PD8 */

Definition at line 510 of file f1/gpio.h.

◆ GPIO_ETH_RE_RXD0

#define GPIO_ETH_RE_RXD0   GPIO9 /* PD9 */

Definition at line 511 of file f1/gpio.h.

◆ GPIO_ETH_RE_RXD1

#define GPIO_ETH_RE_RXD1   GPIO10 /* PD10 */

Definition at line 512 of file f1/gpio.h.

◆ GPIO_ETH_RE_RXD2

#define GPIO_ETH_RE_RXD2   GPIO11 /* PD11 */

Definition at line 513 of file f1/gpio.h.

◆ GPIO_ETH_RE_RXD3

#define GPIO_ETH_RE_RXD3   GPIO12 /* PD12 */

Definition at line 514 of file f1/gpio.h.

◆ GPIO_ETH_RX_DV_CRS_DV

#define GPIO_ETH_RX_DV_CRS_DV   GPIO7 /* PA7 */

Definition at line 504 of file f1/gpio.h.

◆ GPIO_ETH_RXD0

#define GPIO_ETH_RXD0   GPIO4 /* PC4 */

Definition at line 505 of file f1/gpio.h.

◆ GPIO_ETH_RXD1

#define GPIO_ETH_RXD1   GPIO5 /* PC5 */

Definition at line 506 of file f1/gpio.h.

◆ GPIO_ETH_RXD2

#define GPIO_ETH_RXD2   GPIO0 /* PB0 */

Definition at line 507 of file f1/gpio.h.

◆ GPIO_ETH_RXD3

#define GPIO_ETH_RXD3   GPIO1 /* PB1 */

Definition at line 508 of file f1/gpio.h.

◆ GPIO_I2C1_RE_SCL

#define GPIO_I2C1_RE_SCL   GPIO8 /* PB8 */

Definition at line 425 of file f1/gpio.h.

◆ GPIO_I2C1_RE_SDA

#define GPIO_I2C1_RE_SDA   GPIO9 /* PB9 */

Definition at line 426 of file f1/gpio.h.

◆ GPIO_I2C1_RE_SMBAI

#define GPIO_I2C1_RE_SMBAI   GPIO5 /* PB5 */

Definition at line 424 of file f1/gpio.h.

◆ GPIO_I2C1_SCL

#define GPIO_I2C1_SCL   GPIO6 /* PB6 */

Definition at line 421 of file f1/gpio.h.

◆ GPIO_I2C1_SDA

#define GPIO_I2C1_SDA   GPIO7 /* PB7 */

Definition at line 422 of file f1/gpio.h.

◆ GPIO_I2C1_SMBAI

#define GPIO_I2C1_SMBAI   GPIO5 /* PB5 */

Definition at line 420 of file f1/gpio.h.

◆ GPIO_I2C2_SCL

#define GPIO_I2C2_SCL   GPIO10 /* PB10 */

Definition at line 438 of file f1/gpio.h.

◆ GPIO_I2C2_SDA

#define GPIO_I2C2_SDA   GPIO11 /* PB11 */

Definition at line 439 of file f1/gpio.h.

◆ GPIO_I2C2_SMBAI

#define GPIO_I2C2_SMBAI   GPIO12 /* PB12 */

Definition at line 440 of file f1/gpio.h.

◆ GPIO_IDR

#define GPIO_IDR (   port)    MMIO32((port) + 0x08)

Definition at line 552 of file f1/gpio.h.

◆ GPIO_JNTRST

#define GPIO_JNTRST   GPIO4 /* PB4 */

Definition at line 113 of file f1/gpio.h.

◆ GPIO_JTCK_SWCLK

#define GPIO_JTCK_SWCLK   GPIO14 /* PA14 */

Definition at line 110 of file f1/gpio.h.

◆ GPIO_JTDI

#define GPIO_JTDI   GPIO15 /* PA15 */

Definition at line 111 of file f1/gpio.h.

◆ GPIO_JTDO_TRACESWO

#define GPIO_JTDO_TRACESWO   GPIO3 /* PB3 */

Definition at line 112 of file f1/gpio.h.

◆ GPIO_JTMS_SWDIO

#define GPIO_JTMS_SWDIO   GPIO13 /* PA13 */

Definition at line 109 of file f1/gpio.h.

◆ GPIO_LCKK

#define GPIO_LCKK   (1 << 16)

Definition at line 45 of file gpio_common_all.h.

◆ GPIO_LCKR

#define GPIO_LCKR (   port)    MMIO32((port) + 0x18)

Definition at line 592 of file f1/gpio.h.

◆ GPIO_ODR

#define GPIO_ODR (   port)    MMIO32((port) + 0x0c)

Definition at line 562 of file f1/gpio.h.

◆ GPIO_SPI1_MISO

#define GPIO_SPI1_MISO   GPIO6 /* PA6 */

Definition at line 450 of file f1/gpio.h.

◆ GPIO_SPI1_MOSI

#define GPIO_SPI1_MOSI   GPIO7 /* PA7 */

Definition at line 451 of file f1/gpio.h.

◆ GPIO_SPI1_NSS

#define GPIO_SPI1_NSS   GPIO4 /* PA4 */

Definition at line 448 of file f1/gpio.h.

◆ GPIO_SPI1_RE_MISO

#define GPIO_SPI1_RE_MISO   GPIO4 /* PB4 */

Definition at line 455 of file f1/gpio.h.

◆ GPIO_SPI1_RE_MOSI

#define GPIO_SPI1_RE_MOSI   GPIO5 /* PB5 */

Definition at line 456 of file f1/gpio.h.

◆ GPIO_SPI1_RE_NSS

#define GPIO_SPI1_RE_NSS   GPIO15 /* PA15 */

Definition at line 453 of file f1/gpio.h.

◆ GPIO_SPI1_RE_SCK

#define GPIO_SPI1_RE_SCK   GPIO3 /* PB3 */

Definition at line 454 of file f1/gpio.h.

◆ GPIO_SPI1_SCK

#define GPIO_SPI1_SCK   GPIO5 /* PA5 */

Definition at line 449 of file f1/gpio.h.

◆ GPIO_SPI2_MISO

#define GPIO_SPI2_MISO   GPIO14 /* PB14 */

Definition at line 472 of file f1/gpio.h.

◆ GPIO_SPI2_MOSI

#define GPIO_SPI2_MOSI   GPIO15 /* PB15 */

Definition at line 473 of file f1/gpio.h.

◆ GPIO_SPI2_NSS

#define GPIO_SPI2_NSS   GPIO12 /* PB12 */

Definition at line 470 of file f1/gpio.h.

◆ GPIO_SPI2_SCK

#define GPIO_SPI2_SCK   GPIO13 /* PB13 */

Definition at line 471 of file f1/gpio.h.

◆ GPIO_SPI3_MISO

#define GPIO_SPI3_MISO   GPIO4 /* PB4 */

Definition at line 484 of file f1/gpio.h.

◆ GPIO_SPI3_MOSI

#define GPIO_SPI3_MOSI   GPIO5 /* PB5 */

Definition at line 485 of file f1/gpio.h.

◆ GPIO_SPI3_NSS

#define GPIO_SPI3_NSS   GPIO15 /* PA15 */

Definition at line 482 of file f1/gpio.h.

◆ GPIO_SPI3_RE_MISO

#define GPIO_SPI3_RE_MISO   GPIO11 /* PC11 */

Definition at line 489 of file f1/gpio.h.

◆ GPIO_SPI3_RE_MOSI

#define GPIO_SPI3_RE_MOSI   GPIO12 /* PC12 */

Definition at line 490 of file f1/gpio.h.

◆ GPIO_SPI3_RE_NSS

#define GPIO_SPI3_RE_NSS   GPIO4 /* PA4 */

Definition at line 487 of file f1/gpio.h.

◆ GPIO_SPI3_RE_SCK

#define GPIO_SPI3_RE_SCK   GPIO10 /* PC10 */

Definition at line 488 of file f1/gpio.h.

◆ GPIO_SPI3_SCK

#define GPIO_SPI3_SCK   GPIO3 /* PB3 */

Definition at line 483 of file f1/gpio.h.

◆ GPIO_TIM1_BKIN

#define GPIO_TIM1_BKIN   GPIO12 /* PB12 */

Definition at line 258 of file f1/gpio.h.

◆ GPIO_TIM1_CH1

#define GPIO_TIM1_CH1   GPIO8 /* PA8 */

Definition at line 254 of file f1/gpio.h.

◆ GPIO_TIM1_CH1N

#define GPIO_TIM1_CH1N   GPIO13 /* PB13 */

Definition at line 259 of file f1/gpio.h.

◆ GPIO_TIM1_CH2

#define GPIO_TIM1_CH2   GPIO9 /* PA9 */

Definition at line 255 of file f1/gpio.h.

◆ GPIO_TIM1_CH2N

#define GPIO_TIM1_CH2N   GPIO14 /* PB14 */

Definition at line 260 of file f1/gpio.h.

◆ GPIO_TIM1_CH3

#define GPIO_TIM1_CH3   GPIO10 /* PA10 */

Definition at line 256 of file f1/gpio.h.

◆ GPIO_TIM1_CH3N

#define GPIO_TIM1_CH3N   GPIO15 /* PB15 */

Definition at line 261 of file f1/gpio.h.

◆ GPIO_TIM1_CH4

#define GPIO_TIM1_CH4   GPIO11 /* PA11 */

Definition at line 257 of file f1/gpio.h.

◆ GPIO_TIM1_ETR

#define GPIO_TIM1_ETR   GPIO12 /* PA12 */

Definition at line 253 of file f1/gpio.h.

◆ GPIO_TIM1_FR_BKIN

#define GPIO_TIM1_FR_BKIN   GPIO15 /* PE15 */

Definition at line 278 of file f1/gpio.h.

◆ GPIO_TIM1_FR_CH1

#define GPIO_TIM1_FR_CH1   GPIO9 /* PE9 */

Definition at line 274 of file f1/gpio.h.

◆ GPIO_TIM1_FR_CH1N

#define GPIO_TIM1_FR_CH1N   GPIO8 /* PE8 */

Definition at line 279 of file f1/gpio.h.

◆ GPIO_TIM1_FR_CH2

#define GPIO_TIM1_FR_CH2   GPIO11 /* PE11 */

Definition at line 275 of file f1/gpio.h.

◆ GPIO_TIM1_FR_CH2N

#define GPIO_TIM1_FR_CH2N   GPIO10 /* PE10 */

Definition at line 280 of file f1/gpio.h.

◆ GPIO_TIM1_FR_CH3

#define GPIO_TIM1_FR_CH3   GPIO13 /* PE13 */

Definition at line 276 of file f1/gpio.h.

◆ GPIO_TIM1_FR_CH3N

#define GPIO_TIM1_FR_CH3N   GPIO12 /* PE12 */

Definition at line 281 of file f1/gpio.h.

◆ GPIO_TIM1_FR_CH4

#define GPIO_TIM1_FR_CH4   GPIO14 /* PE14 */

Definition at line 277 of file f1/gpio.h.

◆ GPIO_TIM1_FR_ETR

#define GPIO_TIM1_FR_ETR   GPIO7 /* PE7 */

Definition at line 273 of file f1/gpio.h.

◆ GPIO_TIM1_PR_BKIN

#define GPIO_TIM1_PR_BKIN   GPIO6 /* PA6 */

Definition at line 268 of file f1/gpio.h.

◆ GPIO_TIM1_PR_CH1

#define GPIO_TIM1_PR_CH1   GPIO8 /* PA8 */

Definition at line 264 of file f1/gpio.h.

◆ GPIO_TIM1_PR_CH1N

#define GPIO_TIM1_PR_CH1N   GPIO7 /* PA7 */

Definition at line 269 of file f1/gpio.h.

◆ GPIO_TIM1_PR_CH2

#define GPIO_TIM1_PR_CH2   GPIO9 /* PA9 */

Definition at line 265 of file f1/gpio.h.

◆ GPIO_TIM1_PR_CH2N

#define GPIO_TIM1_PR_CH2N   GPIO0 /* PB0 */

Definition at line 270 of file f1/gpio.h.

◆ GPIO_TIM1_PR_CH3

#define GPIO_TIM1_PR_CH3   GPIO10 /* PA10 */

Definition at line 266 of file f1/gpio.h.

◆ GPIO_TIM1_PR_CH3N

#define GPIO_TIM1_PR_CH3N   GPIO1 /* PB1 */

Definition at line 271 of file f1/gpio.h.

◆ GPIO_TIM1_PR_CH4

#define GPIO_TIM1_PR_CH4   GPIO11 /* PA11 */

Definition at line 267 of file f1/gpio.h.

◆ GPIO_TIM1_PR_ETR

#define GPIO_TIM1_PR_ETR   GPIO12 /* PA12 */

Definition at line 263 of file f1/gpio.h.

◆ GPIO_TIM2_CH1_ETR

#define GPIO_TIM2_CH1_ETR   GPIO0 /* PA0 */

Definition at line 206 of file f1/gpio.h.

◆ GPIO_TIM2_CH2

#define GPIO_TIM2_CH2   GPIO1 /* PA1 */

Definition at line 207 of file f1/gpio.h.

◆ GPIO_TIM2_CH3

#define GPIO_TIM2_CH3   GPIO2 /* PA2 */

Definition at line 208 of file f1/gpio.h.

◆ GPIO_TIM2_CH4

#define GPIO_TIM2_CH4   GPIO3 /* PA3 */

Definition at line 209 of file f1/gpio.h.

◆ GPIO_TIM2_FR_CH1_ETR

#define GPIO_TIM2_FR_CH1_ETR   GPIO15 /* PA15 */

Definition at line 221 of file f1/gpio.h.

◆ GPIO_TIM2_FR_CH2

#define GPIO_TIM2_FR_CH2   GPIO3 /* PB3 */

Definition at line 222 of file f1/gpio.h.

◆ GPIO_TIM2_FR_CH3

#define GPIO_TIM2_FR_CH3   GPIO10 /* PB10 */

Definition at line 223 of file f1/gpio.h.

◆ GPIO_TIM2_FR_CH4

#define GPIO_TIM2_FR_CH4   GPIO11 /* PB11 */

Definition at line 224 of file f1/gpio.h.

◆ GPIO_TIM2_PR1_CH1_ETR

#define GPIO_TIM2_PR1_CH1_ETR   GPIO15 /* PA15 */

Definition at line 211 of file f1/gpio.h.

◆ GPIO_TIM2_PR1_CH2

#define GPIO_TIM2_PR1_CH2   GPIO3 /* PB3 */

Definition at line 212 of file f1/gpio.h.

◆ GPIO_TIM2_PR1_CH3

#define GPIO_TIM2_PR1_CH3   GPIO2 /* PA2 */

Definition at line 213 of file f1/gpio.h.

◆ GPIO_TIM2_PR1_CH4

#define GPIO_TIM2_PR1_CH4   GPIO3 /* PA3 */

Definition at line 214 of file f1/gpio.h.

◆ GPIO_TIM2_PR2_CH1_ETR

#define GPIO_TIM2_PR2_CH1_ETR   GPIO0 /* PA0 */

Definition at line 216 of file f1/gpio.h.

◆ GPIO_TIM2_PR2_CH2

#define GPIO_TIM2_PR2_CH2   GPIO1 /* PA1 */

Definition at line 217 of file f1/gpio.h.

◆ GPIO_TIM2_PR2_CH3

#define GPIO_TIM2_PR2_CH3   GPIO10 /* PB10 */

Definition at line 218 of file f1/gpio.h.

◆ GPIO_TIM2_PR2_CH4

#define GPIO_TIM2_PR2_CH4   GPIO11 /* PB11 */

Definition at line 219 of file f1/gpio.h.

◆ GPIO_TIM3_CH1

#define GPIO_TIM3_CH1   GPIO6 /* PA6 */

Definition at line 170 of file f1/gpio.h.

◆ GPIO_TIM3_CH2

#define GPIO_TIM3_CH2   GPIO7 /* PA7 */

Definition at line 171 of file f1/gpio.h.

◆ GPIO_TIM3_CH3

#define GPIO_TIM3_CH3   GPIO0 /* PB0 */

Definition at line 172 of file f1/gpio.h.

◆ GPIO_TIM3_CH4

#define GPIO_TIM3_CH4   GPIO1 /* PB1 */

Definition at line 173 of file f1/gpio.h.

◆ GPIO_TIM3_FR_CH1

#define GPIO_TIM3_FR_CH1   GPIO6 /* PC6 */

Definition at line 180 of file f1/gpio.h.

◆ GPIO_TIM3_FR_CH2

#define GPIO_TIM3_FR_CH2   GPIO7 /* PC7 */

Definition at line 181 of file f1/gpio.h.

◆ GPIO_TIM3_FR_CH3

#define GPIO_TIM3_FR_CH3   GPIO8 /* PC8 */

Definition at line 182 of file f1/gpio.h.

◆ GPIO_TIM3_FR_CH4

#define GPIO_TIM3_FR_CH4   GPIO9 /* PC9 */

Definition at line 183 of file f1/gpio.h.

◆ GPIO_TIM3_PR_CH1

#define GPIO_TIM3_PR_CH1   GPIO4 /* PB4 */

Definition at line 175 of file f1/gpio.h.

◆ GPIO_TIM3_PR_CH2

#define GPIO_TIM3_PR_CH2   GPIO5 /* PB5 */

Definition at line 176 of file f1/gpio.h.

◆ GPIO_TIM3_PR_CH3

#define GPIO_TIM3_PR_CH3   GPIO0 /* PB0 */

Definition at line 177 of file f1/gpio.h.

◆ GPIO_TIM3_PR_CH4

#define GPIO_TIM3_PR_CH4   GPIO1 /* PB1 */

Definition at line 178 of file f1/gpio.h.

◆ GPIO_TIM4_CH1

#define GPIO_TIM4_CH1   GPIO6 /* PB6 */

Definition at line 146 of file f1/gpio.h.

◆ GPIO_TIM4_CH2

#define GPIO_TIM4_CH2   GPIO7 /* PB7 */

Definition at line 147 of file f1/gpio.h.

◆ GPIO_TIM4_CH3

#define GPIO_TIM4_CH3   GPIO8 /* PB8 */

Definition at line 148 of file f1/gpio.h.

◆ GPIO_TIM4_CH4

#define GPIO_TIM4_CH4   GPIO9 /* PB9 */

Definition at line 149 of file f1/gpio.h.

◆ GPIO_TIM4_RE_CH1

#define GPIO_TIM4_RE_CH1   GPIO12 /* PD12 */

Definition at line 151 of file f1/gpio.h.

◆ GPIO_TIM4_RE_CH2

#define GPIO_TIM4_RE_CH2   GPIO13 /* PD13 */

Definition at line 152 of file f1/gpio.h.

◆ GPIO_TIM4_RE_CH3

#define GPIO_TIM4_RE_CH3   GPIO14 /* PD14 */

Definition at line 153 of file f1/gpio.h.

◆ GPIO_TIM4_RE_CH4

#define GPIO_TIM4_RE_CH4   GPIO15 /* PD15 */

Definition at line 154 of file f1/gpio.h.

◆ GPIO_TIM5_CH1

#define GPIO_TIM5_CH1   GPIO0 /* PA0 */

Definition at line 133 of file f1/gpio.h.

◆ GPIO_TIM5_CH2

#define GPIO_TIM5_CH2   GPIO1 /* PA1 */

Definition at line 134 of file f1/gpio.h.

◆ GPIO_TIM5_CH3

#define GPIO_TIM5_CH3   GPIO2 /* PA2 */

Definition at line 135 of file f1/gpio.h.

◆ GPIO_TIM5_CH4

#define GPIO_TIM5_CH4   GPIO3 /* PA3 */

Definition at line 136 of file f1/gpio.h.

◆ GPIO_TRACECK

#define GPIO_TRACECK   GPIO2 /* PE2 */

Definition at line 114 of file f1/gpio.h.

◆ GPIO_TRACED0

#define GPIO_TRACED0   GPIO3 /* PE3 */

Definition at line 115 of file f1/gpio.h.

◆ GPIO_TRACED1

#define GPIO_TRACED1   GPIO4 /* PE4 */

Definition at line 116 of file f1/gpio.h.

◆ GPIO_TRACED2

#define GPIO_TRACED2   GPIO5 /* PE5 */

Definition at line 117 of file f1/gpio.h.

◆ GPIO_TRACED3

#define GPIO_TRACED3   GPIO6 /* PE6 */

Definition at line 118 of file f1/gpio.h.

◆ GPIO_UART4_RX

#define GPIO_UART4_RX   GPIO11 /* PC11 */

Definition at line 329 of file f1/gpio.h.

◆ GPIO_UART4_TX

#define GPIO_UART4_TX   GPIO10 /* PC10 */

Definition at line 328 of file f1/gpio.h.

◆ GPIO_UART5_RX

#define GPIO_UART5_RX   GPIO2 /* PD2 */

Definition at line 321 of file f1/gpio.h.

◆ GPIO_UART5_TX

#define GPIO_UART5_TX   GPIO12 /* PC12 */

Definition at line 320 of file f1/gpio.h.

◆ GPIO_USART1_CK

#define GPIO_USART1_CK   GPIO8 /* PA8 */

Definition at line 404 of file f1/gpio.h.

◆ GPIO_USART1_CTS

#define GPIO_USART1_CTS   GPIO11 /* PA11 */

Definition at line 400 of file f1/gpio.h.

◆ GPIO_USART1_RE_RX

#define GPIO_USART1_RE_RX   GPIO7 /* PB7 */

Definition at line 407 of file f1/gpio.h.

◆ GPIO_USART1_RE_TX

#define GPIO_USART1_RE_TX   GPIO6 /* PB6 */

Definition at line 406 of file f1/gpio.h.

◆ GPIO_USART1_RTS

#define GPIO_USART1_RTS   GPIO12 /* PA12 */

Definition at line 401 of file f1/gpio.h.

◆ GPIO_USART1_RX

#define GPIO_USART1_RX   GPIO10 /* PA10 */

Definition at line 403 of file f1/gpio.h.

◆ GPIO_USART1_TX

#define GPIO_USART1_TX   GPIO9 /* PA9 */

Definition at line 402 of file f1/gpio.h.

◆ GPIO_USART2_CK

#define GPIO_USART2_CK   GPIO4 /* PA4 */

Definition at line 378 of file f1/gpio.h.

◆ GPIO_USART2_CTS

#define GPIO_USART2_CTS   GPIO0 /* PA0 */

Definition at line 374 of file f1/gpio.h.

◆ GPIO_USART2_RE_CK

#define GPIO_USART2_RE_CK   GPIO7 /* PD7 */

Definition at line 384 of file f1/gpio.h.

◆ GPIO_USART2_RE_CTS

#define GPIO_USART2_RE_CTS   GPIO3 /* PD3 */

Definition at line 380 of file f1/gpio.h.

◆ GPIO_USART2_RE_RTS

#define GPIO_USART2_RE_RTS   GPIO4 /* PD4 */

Definition at line 381 of file f1/gpio.h.

◆ GPIO_USART2_RE_RX

#define GPIO_USART2_RE_RX   GPIO6 /* PD6 */

Definition at line 383 of file f1/gpio.h.

◆ GPIO_USART2_RE_TX

#define GPIO_USART2_RE_TX   GPIO5 /* PD5 */

Definition at line 382 of file f1/gpio.h.

◆ GPIO_USART2_RTS

#define GPIO_USART2_RTS   GPIO1 /* PA1 */

Definition at line 375 of file f1/gpio.h.

◆ GPIO_USART2_RX

#define GPIO_USART2_RX   GPIO3 /* PA3 */

Definition at line 377 of file f1/gpio.h.

◆ GPIO_USART2_TX

#define GPIO_USART2_TX   GPIO2 /* PA2 */

Definition at line 376 of file f1/gpio.h.

◆ GPIO_USART3_CK

#define GPIO_USART3_CK   GPIO12 /* PB12 */

Definition at line 338 of file f1/gpio.h.

◆ GPIO_USART3_CTS

#define GPIO_USART3_CTS   GPIO13 /* PB13 */

Definition at line 339 of file f1/gpio.h.

◆ GPIO_USART3_FR_CK

#define GPIO_USART3_FR_CK   GPIO10 /* PD10 */

Definition at line 350 of file f1/gpio.h.

◆ GPIO_USART3_FR_CTS

#define GPIO_USART3_FR_CTS   GPIO11 /* PD11 */

Definition at line 351 of file f1/gpio.h.

◆ GPIO_USART3_FR_RTS

#define GPIO_USART3_FR_RTS   GPIO12 /* PD12 */

Definition at line 352 of file f1/gpio.h.

◆ GPIO_USART3_FR_RX

#define GPIO_USART3_FR_RX   GPIO9 /* PD9 */

Definition at line 349 of file f1/gpio.h.

◆ GPIO_USART3_FR_TX

#define GPIO_USART3_FR_TX   GPIO8 /* PD8 */

Definition at line 348 of file f1/gpio.h.

◆ GPIO_USART3_PR_CK

#define GPIO_USART3_PR_CK   GPIO12 /* PC12 */

Definition at line 344 of file f1/gpio.h.

◆ GPIO_USART3_PR_CTS

#define GPIO_USART3_PR_CTS   GPIO13 /* PB13 */

Definition at line 345 of file f1/gpio.h.

◆ GPIO_USART3_PR_RTS

#define GPIO_USART3_PR_RTS   GPIO14 /* PB14 */

Definition at line 346 of file f1/gpio.h.

◆ GPIO_USART3_PR_RX

#define GPIO_USART3_PR_RX   GPIO11 /* PC11 */

Definition at line 343 of file f1/gpio.h.

◆ GPIO_USART3_PR_TX

#define GPIO_USART3_PR_TX   GPIO10 /* PC10 */

Definition at line 342 of file f1/gpio.h.

◆ GPIO_USART3_RTS

#define GPIO_USART3_RTS   GPIO14 /* PB14 */

Definition at line 340 of file f1/gpio.h.

◆ GPIO_USART3_RX

#define GPIO_USART3_RX   GPIO11 /* PB11 */

Definition at line 337 of file f1/gpio.h.

◆ GPIO_USART3_TX

#define GPIO_USART3_TX   GPIO10 /* PB10 */

Definition at line 336 of file f1/gpio.h.

◆ GPIOA_BRR

#define GPIOA_BRR   GPIO_BRR(GPIOA)

Definition at line 583 of file f1/gpio.h.

◆ GPIOA_BSRR

#define GPIOA_BSRR   GPIO_BSRR(GPIOA)

Definition at line 573 of file f1/gpio.h.

◆ GPIOA_CRH

#define GPIOA_CRH   GPIO_CRH(GPIOA)

Definition at line 543 of file f1/gpio.h.

◆ GPIOA_CRL

#define GPIOA_CRL   GPIO_CRL(GPIOA)

Definition at line 533 of file f1/gpio.h.

◆ GPIOA_IDR

#define GPIOA_IDR   GPIO_IDR(GPIOA)

Definition at line 553 of file f1/gpio.h.

◆ GPIOA_LCKR

#define GPIOA_LCKR   GPIO_LCKR(GPIOA)

Definition at line 593 of file f1/gpio.h.

◆ GPIOA_ODR

#define GPIOA_ODR   GPIO_ODR(GPIOA)

Definition at line 563 of file f1/gpio.h.

◆ GPIOB_BRR

#define GPIOB_BRR   GPIO_BRR(GPIOB)

Definition at line 584 of file f1/gpio.h.

◆ GPIOB_BSRR

#define GPIOB_BSRR   GPIO_BSRR(GPIOB)

Definition at line 574 of file f1/gpio.h.

◆ GPIOB_CRH

#define GPIOB_CRH   GPIO_CRH(GPIOB)

Definition at line 544 of file f1/gpio.h.

◆ GPIOB_CRL

#define GPIOB_CRL   GPIO_CRL(GPIOB)

Definition at line 534 of file f1/gpio.h.

◆ GPIOB_IDR

#define GPIOB_IDR   GPIO_IDR(GPIOB)

Definition at line 554 of file f1/gpio.h.

◆ GPIOB_LCKR

#define GPIOB_LCKR   GPIO_LCKR(GPIOB)

Definition at line 594 of file f1/gpio.h.

◆ GPIOB_ODR

#define GPIOB_ODR   GPIO_ODR(GPIOB)

Definition at line 564 of file f1/gpio.h.

◆ GPIOC_BRR

#define GPIOC_BRR   GPIO_BRR(GPIOC)

Definition at line 585 of file f1/gpio.h.

◆ GPIOC_BSRR

#define GPIOC_BSRR   GPIO_BSRR(GPIOC)

Definition at line 575 of file f1/gpio.h.

◆ GPIOC_CRH

#define GPIOC_CRH   GPIO_CRH(GPIOC)

Definition at line 545 of file f1/gpio.h.

◆ GPIOC_CRL

#define GPIOC_CRL   GPIO_CRL(GPIOC)

Definition at line 535 of file f1/gpio.h.

◆ GPIOC_IDR

#define GPIOC_IDR   GPIO_IDR(GPIOC)

Definition at line 555 of file f1/gpio.h.

◆ GPIOC_LCKR

#define GPIOC_LCKR   GPIO_LCKR(GPIOC)

Definition at line 595 of file f1/gpio.h.

◆ GPIOC_ODR

#define GPIOC_ODR   GPIO_ODR(GPIOC)

Definition at line 565 of file f1/gpio.h.

◆ GPIOD_BRR

#define GPIOD_BRR   GPIO_BRR(GPIOD)

Definition at line 586 of file f1/gpio.h.

◆ GPIOD_BSRR

#define GPIOD_BSRR   GPIO_BSRR(GPIOD)

Definition at line 576 of file f1/gpio.h.

◆ GPIOD_CRH

#define GPIOD_CRH   GPIO_CRH(GPIOD)

Definition at line 546 of file f1/gpio.h.

◆ GPIOD_CRL

#define GPIOD_CRL   GPIO_CRL(GPIOD)

Definition at line 536 of file f1/gpio.h.

◆ GPIOD_IDR

#define GPIOD_IDR   GPIO_IDR(GPIOD)

Definition at line 556 of file f1/gpio.h.

◆ GPIOD_LCKR

#define GPIOD_LCKR   GPIO_LCKR(GPIOD)

Definition at line 596 of file f1/gpio.h.

◆ GPIOD_ODR

#define GPIOD_ODR   GPIO_ODR(GPIOD)

Definition at line 566 of file f1/gpio.h.

◆ GPIOE_BRR

#define GPIOE_BRR   GPIO_BRR(GPIOE)

Definition at line 587 of file f1/gpio.h.

◆ GPIOE_BSRR

#define GPIOE_BSRR   GPIO_BSRR(GPIOE)

Definition at line 577 of file f1/gpio.h.

◆ GPIOE_CRH

#define GPIOE_CRH   GPIO_CRH(GPIOE)

Definition at line 547 of file f1/gpio.h.

◆ GPIOE_CRL

#define GPIOE_CRL   GPIO_CRL(GPIOE)

Definition at line 537 of file f1/gpio.h.

◆ GPIOE_IDR

#define GPIOE_IDR   GPIO_IDR(GPIOE)

Definition at line 557 of file f1/gpio.h.

◆ GPIOE_LCKR

#define GPIOE_LCKR   GPIO_LCKR(GPIOE)

Definition at line 597 of file f1/gpio.h.

◆ GPIOE_ODR

#define GPIOE_ODR   GPIO_ODR(GPIOE)

Definition at line 567 of file f1/gpio.h.

◆ GPIOF_BRR

#define GPIOF_BRR   GPIO_BRR(GPIOF)

Definition at line 588 of file f1/gpio.h.

◆ GPIOF_BSRR

#define GPIOF_BSRR   GPIO_BSRR(GPIOF)

Definition at line 578 of file f1/gpio.h.

◆ GPIOF_CRH

#define GPIOF_CRH   GPIO_CRH(GPIOF)

Definition at line 548 of file f1/gpio.h.

◆ GPIOF_CRL

#define GPIOF_CRL   GPIO_CRL(GPIOF)

Definition at line 538 of file f1/gpio.h.

◆ GPIOF_IDR

#define GPIOF_IDR   GPIO_IDR(GPIOF)

Definition at line 558 of file f1/gpio.h.

◆ GPIOF_LCKR

#define GPIOF_LCKR   GPIO_LCKR(GPIOF)

Definition at line 598 of file f1/gpio.h.

◆ GPIOF_ODR

#define GPIOF_ODR   GPIO_ODR(GPIOF)

Definition at line 568 of file f1/gpio.h.

◆ GPIOG_BRR

#define GPIOG_BRR   GPIO_BRR(GPIOG)

Definition at line 589 of file f1/gpio.h.

◆ GPIOG_BSRR

#define GPIOG_BSRR   GPIO_BSRR(GPIOG)

Definition at line 579 of file f1/gpio.h.

◆ GPIOG_CRH

#define GPIOG_CRH   GPIO_CRH(GPIOG)

Definition at line 549 of file f1/gpio.h.

◆ GPIOG_CRL

#define GPIOG_CRL   GPIO_CRL(GPIOG)

Definition at line 539 of file f1/gpio.h.

◆ GPIOG_IDR

#define GPIOG_IDR   GPIO_IDR(GPIOG)

Definition at line 559 of file f1/gpio.h.

◆ GPIOG_LCKR

#define GPIOG_LCKR   GPIO_LCKR(GPIOG)

Definition at line 599 of file f1/gpio.h.

◆ GPIOG_ODR

#define GPIOG_ODR   GPIO_ODR(GPIOG)

Definition at line 569 of file f1/gpio.h.

Function Documentation

◆ gpio_clear()

void gpio_clear ( uint32_t  gpioport,
uint16_t  gpios 
)

Clear a Group of Pins Atomic.

Clear one or more pins of the given GPIO port to 0 in an atomic operation.

Parameters
[in]gpioportUnsigned int32. Port identifier GPIO Port IDs
[in]gpiosUnsigned int16. Pin identifiers GPIO Pin Identifiers If multiple pins are to be changed, use bitwise OR '|' to separate them.

Definition at line 56 of file gpio_common_all.c.

References GPIO_BSRR.

◆ gpio_get()

uint16_t gpio_get ( uint32_t  gpioport,
uint16_t  gpios 
)

Read a Group of Pins.

Parameters
[in]gpioportUnsigned int32. Port identifier GPIO Port IDs
[in]gpiosUnsigned int16. Pin identifiers GPIO Pin Identifiers If multiple pins are to be read, use bitwise OR '|' to separate them.
Returns
Unsigned int16 value of the pin values. The bit position of the pin value returned corresponds to the pin number.

Definition at line 71 of file gpio_common_all.c.

References gpio_port_read().

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◆ gpio_port_config_lock()

void gpio_port_config_lock ( uint32_t  gpioport,
uint16_t  gpios 
)

Lock the Configuration of a Group of Pins.

The configuration of one or more pins of the given GPIO port is locked. There is no mechanism to unlock these via software. Unlocking occurs at the next reset.

Parameters
[in]gpioportUnsigned int32. Port identifier GPIO Port IDs
[in]gpiosUnsigned int16. Pin identifiers GPIO Pin Identifiers If multiple pins are to be locked, use bitwise OR '|' to separate them.

Definition at line 132 of file gpio_common_all.c.

References GPIO_LCKK, and GPIO_LCKR.

◆ gpio_port_read()

uint16_t gpio_port_read ( uint32_t  gpioport)

Read from a Port.

Read the current value of the given GPIO port. Only the lower 16 bits contain valid pin data.

Parameters
[in]gpioportUnsigned int32. Port identifier GPIO Port IDs
Returns
Unsigned int16. The value held in the specified GPIO port.

Definition at line 102 of file gpio_common_all.c.

References GPIO_IDR.

Referenced by gpio_get().

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◆ gpio_port_write()

void gpio_port_write ( uint32_t  gpioport,
uint16_t  data 
)

Write to a Port.

Write a value to the given GPIO port.

Parameters
[in]gpioportUnsigned int32. Port identifier GPIO Port IDs
[in]dataUnsigned int16. The value to be written to the GPIO port.

Definition at line 115 of file gpio_common_all.c.

References GPIO_ODR.

◆ gpio_primary_remap()

void gpio_primary_remap ( uint32_t  swjdisable,
uint32_t  maps 
)

Map Alternate Function Port Bits (Main Set)

A number of alternate function ports can be remapped to defined alternative port bits to avoid clashes in cases where multiple alternate functions are present. Refer to the datasheets for the particular mapping desired. This provides the main set of remap functionality. See gpio_secondary_remap for a number of lesser used remaps.

The AFIO remapping feature is used only with the STM32F10x series.

Note
The Serial Wire JTAG disable controls allow certain GPIO ports to become available in place of some of the SWJ signals. Full SWJ capability is obtained by setting this to zero. The value of this must be specified for every call to this function as its current value cannot be ascertained from the hardware.
Parameters
[in]swjdisableDisable parts of the SWJ capability Serial Wire JTAG disables.
[in]mapsBitwise OR of map enable controls you wish to enable from Alternate Function Remap Controls, Alternate Function Remap Controls for CAN 1, Alternate Function Remap Controls for Timer 3, Alternate Function Remap Controls for Timer 2, Alternate Function Remap Controls for Timer 1, Alternate Function Remap Controls for USART 3. For connectivity line devices only Alternate Function Remap Controls for Connectivity are also available.

Definition at line 167 of file gpio.c.

References AFIO_MAPR.

◆ gpio_secondary_remap()

void gpio_secondary_remap ( uint32_t  maps)

Map Alternate Function Port Bits (Secondary Set)

A number of alternate function ports can be remapped to defined alternative port bits to avoid clashes in cases where multiple alternate functions are present. Refer to the datasheets for the particular mapping desired. This provides the second smaller and less used set of remap functionality. See gpio_primary_remap for the main set of remaps.

The AFIO remapping feature is used only with the STM32F10x series.

Parameters
[in]mapsUnsigned int32. Bitwise OR of map enable controls from Alternate Function Remap Controls Secondary Set

Definition at line 192 of file gpio.c.

References AFIO_MAPR2.

◆ gpio_set()

void gpio_set ( uint32_t  gpioport,
uint16_t  gpios 
)

Set a Group of Pins Atomic.

Set one or more pins of the given GPIO port to 1 in an atomic operation.

Parameters
[in]gpioportUnsigned int32. Port identifier GPIO Port IDs
[in]gpiosUnsigned int16. Pin identifiers GPIO Pin Identifiers If multiple pins are to be changed, use bitwise OR '|' to separate them.

Definition at line 41 of file gpio_common_all.c.

References GPIO_BSRR.

◆ gpio_set_eventout()

void gpio_set_eventout ( uint8_t  evoutport,
uint8_t  evoutpin 
)

Map the EVENTOUT signal.

Enable the EVENTOUT signal and select the port and pin to be used.

Parameters
[in]evoutportUnsigned int8. Port for EVENTOUT signal EVENTOUT Port selection
[in]evoutpinUnsigned int8. Pin for EVENTOUT signal EVENTOUT Pin selection

Definition at line 139 of file gpio.c.

References AFIO_EVCR, and AFIO_EVCR_EVOE.

◆ gpio_set_mode()

void gpio_set_mode ( uint32_t  gpioport,
uint8_t  mode,
uint8_t  cnf,
uint16_t  gpios 
)

Set GPIO Pin Mode.

Sets the mode (input/output) and configuration (analog/digitial and open drain/push pull), for a set of GPIO pins on a given GPIO port.

Parameters
[in]gpioportUnsigned int32. Port identifier GPIO Port IDs
[in]modeUnsigned int8. Pin mode GPIO Pin Mode
[in]cnfUnsigned int8. Pin configuration GPIO Pin Configuration
[in]gpiosUnsigned int16. Pin identifiers GPIO Pin Identifiers If multiple pins are to be set, use bitwise OR '|' to separate them.

Definition at line 93 of file gpio.c.

References GPIO_CRH, and GPIO_CRL.

◆ gpio_toggle()

void gpio_toggle ( uint32_t  gpioport,
uint16_t  gpios 
)

Toggle a Group of Pins.

Toggle one or more pins of the given GPIO port. The toggling is not atomic, but the non-toggled pins are not affected.

Parameters
[in]gpioportUnsigned int32. Port identifier GPIO Port IDs
[in]gpiosUnsigned int16. Pin identifiers GPIO Pin Identifiers If multiple pins are to be changed, use bitwise OR '|' to separate them.

Definition at line 87 of file gpio_common_all.c.

References GPIO_BSRR, and GPIO_ODR.