Defined Constants and Types for the STM32F4xx Flexible Memory Controller More...

Collaboration diagram for FMC Defines:

Data Structures
struct	sdram_timing

Macros
#define	FMC_BANK5_BASE 0xa0000000U

#define	FMC_BANK6_BASE 0xb0000000U

#define	FMC_BANK7_BASE 0xc0000000U

#define	FMC_BANK8_BASE 0xd0000000U

#define	FMC_SDCR(x) MMIO32(FSMC_BASE + 0x140 + 4 * (x))

#define	FMC_SDCR1 FMC_SDCR(0)

#define	FMC_SDCR2 FMC_SDCR(1)

#define	FMC_SDTR(x) MMIO32(FSMC_BASE + 0x148 + 4 * (x))

#define	FMC_SDTR1 FMC_SDTR(0)

#define	FMC_SDTR2 FMC_SDTR(1)

#define	FMC_SDCMR MMIO32(FSMC_BASE + (uint32_t) 0x150)

#define	FMC_SDRTR MMIO32(FSMC_BASE + 0x154)

#define	FMC_SDSR MMIO32(FSMC_BASE + (uint32_t) 0x158)

#define	FMC_SDCR_RPIPE_SHIFT 13

#define	FMC_SDCR_RPIPE_MASK (3 << FMC_SDCR_RPIPE_SHIFT)

#define	FMC_SDCR_RPIPE_NONE (0 << FMC_SDCR_RPIPE_SHIFT)

#define	FMC_SDCR_RPIPE_1CLK (1 << FMC_SDCR_RPIPE_SHIFT)

#define	FMC_SDCR_RPIPE_2CLK (2 << FMC_SDCR_RPIPE_SHIFT)

#define	FMC_SDCR_RBURST (1 << 12)

#define	FMC_SDCR_SDCLK_SHIFT 10

#define	FMC_SDCR_SDCLK_MASK (3 << FMC_SDCR_SDCLK_SHIFT)

#define	FMC_SDCR_SDCLK_DISABLE (0 << FMC_SDCR_SDCLK_SHIFT)

#define	FMC_SDCR_SDCLK_2HCLK (2 << FMC_SDCR_SDCLK_SHIFT)

#define	FMC_SDCR_SDCLK_3HCLK (3 << FMC_SDCR_SDCLK_SHIFT)

#define	FMC_SDCR_WP_ENABLE (1 << 9)

#define	FMC_SDCR_CAS_SHIFT 7

#define	FMC_SDCR_CAS_1CYC (1 << FMC_SDCR_CAS_SHIFT)

#define	FMC_SDCR_CAS_2CYC (2 << FMC_SDCR_CAS_SHIFT)

#define	FMC_SDCR_CAS_3CYC (3 << FMC_SDCR_CAS_SHIFT)

#define	FMC_SDCR_NB2 0

#define	FMC_SDCR_NB4 (1 << 6)

#define	FMC_SDCR_MWID_SHIFT 4

#define	FMC_SDCR_MWID_8b (0 << FMC_SDCR_MWID_SHIFT)

#define	FMC_SDCR_MWID_16b (1 << FMC_SDCR_MWID_SHIFT)

#define	FMC_SDCR_MWID_32b (2 << FMC_SDCR_MWID_SHIFT)

#define	FMC_SDCR_NR_SHIFT 2

#define	FMC_SDCR_NR_11 (0 << FMC_SDCR_NR_SHIFT)

#define	FMC_SDCR_NR_12 (1 << FMC_SDCR_NR_SHIFT)

#define	FMC_SDCR_NR_13 (2 << FMC_SDCR_NR_SHIFT)

#define	FMC_SDCR_NC_SHIFT 0

#define	FMC_SDCR_NC_8 (0 << FMC_SDCR_NC_SHIFT)

#define	FMC_SDCR_NC_9 (1 << FMC_SDCR_NC_SHIFT)

#define	FMC_SDCR_NC_10 (2 << FMC_SDCR_NC_SHIFT)

#define	FMC_SDCR_NC_11 (3 << FMC_SDCR_NC_SHIFT)

#define	FMC_SDTR_TRCD_SHIFT 24

#define	FMC_SDTR_TRCD_MASK (15 << FMC_SDTR_TRCD_SHIFT)

#define	FMC_SDTR_TRP_SHIFT 20

#define	FMC_SDTR_TRP_MASK (15 << FMC_SDTR_TRP_SHIFT)

#define	FMC_SDTR_TWR_SHIFT 16

#define	FMC_SDTR_TWR_MASK (15 << FMC_SDTR_TWR_SHIFT)

#define	FMC_SDTR_TRC_SHIFT 12

#define	FMC_SDTR_TRC_MASK (15 << FMC_SDTR_TRC_SHIFT)

#define	FMC_SDTR_TRAS_SHIFT 8

#define	FMC_SDTR_TRAS_MASK (15 << FMC_SDTR_TRAS_SHIFT)

#define	FMC_SDTR_TXSR_SHIFT 4

#define	FMC_SDTR_TXSR_MASK (15 << FMC_SDTR_TXSR_SHIFT)

#define	FMC_SDTR_TMRD_SHIFT 0

#define	FMC_SDTR_TMRD_MASK (15 << FMC_SDTR_TMRD_SHIFT)

#define	FMC_SDTR_DNC_MASK (FMC_SDTR_TRP_MASK \| FMC_SDTR_TRC_MASK)

#define	FMC_SDCR_DNC_MASK

#define	FMC_SDCMR_MRD_SHIFT 9

#define	FMC_SDCMR_MRD_MASK (0x1fff << FMC_SDCMR_MRD_SHIFT)

#define	FMC_SDCMR_NRFS_SHIFT 5

#define	FMC_SDCMR_NRFS_MASK (15 << FMC_SDCMR_NRFS_SHIFT)

#define	FMC_SDCMR_CTB1 (1 << 4)

#define	FMC_SDCMR_CTB2 (1 << 3)

#define	FMC_SDCMR_MODE_SHIFT 0

#define	FMC_SDCMR_MODE_MASK 7

#define	FMC_SDCMR_MODE_NORMAL 0

#define	FMC_SDCMR_MODE_CLOCK_CONFIG_ENA 1

#define	FMC_SDCMR_MODE_PALL 2

#define	FMC_SDCMR_MODE_AUTO_REFRESH 3

#define	FMC_SDCMR_MODE_LOAD_MODE_REGISTER 4

#define	FMC_SDCMR_MODE_SELF_REFRESH 5

#define	FMC_SDCMR_MODE_POWER_DOWN 6

#define	FMC_SDRTR_REIE (1 << 14)

#define	FMC_SDRTR_COUNT_SHIFT 1

#define	FMC_SDRTR_COUNT_MASK (0x1fff << FMC_SDRTR_COUNT_SHIFT)

#define	FMC_SDRTR_CRE (1 << 0)

#define	FMC_SDSR_BUSY (1 << 5)

#define	FMC_SDSR_MODE_NORMAL 0

#define	FMC_SDSR_MODE_SELF_REFRESH 1

#define	FMC_SDSR_MODE_POWER_DOWN 2

#define	FMC_SDSR_MODE2_SHIFT 3

#define	FMC_SDSR_MODE1_SHIFT 1

#define	FMC_SDSR_RE (1 << 0)

#define	SDRAM_MODE_BURST_LENGTH_1 ((uint16_t)0x0000)

#define	SDRAM_MODE_BURST_LENGTH_2 ((uint16_t)0x0001)

#define	SDRAM_MODE_BURST_LENGTH_4 ((uint16_t)0x0002)

#define	SDRAM_MODE_BURST_LENGTH_8 ((uint16_t)0x0004)

#define	SDRAM_MODE_BURST_TYPE_SEQUENTIAL ((uint16_t)0x0000)

#define	SDRAM_MODE_BURST_TYPE_INTERLEAVED ((uint16_t)0x0008)

#define	SDRAM_MODE_CAS_LATENCY_2 ((uint16_t)0x0020)

#define	SDRAM_MODE_CAS_LATENCY_3 ((uint16_t)0x0030)

#define	SDRAM_MODE_OPERATING_MODE_STANDARD ((uint16_t)0x0000)

#define	SDRAM_MODE_WRITEBURST_MODE_PROGRAMMED ((uint16_t)0x0000)

#define	SDRAM_MODE_WRITEBURST_MODE_SINGLE ((uint16_t)0x0200)

Enumerations
enum	fmc_sdram_bank { SDRAM_BANK1 , SDRAM_BANK2 , SDRAM_BOTH_BANKS }

enum	fmc_sdram_command { SDRAM_CLK_CONF , SDRAM_NORMAL , SDRAM_PALL , SDRAM_AUTO_REFRESH , SDRAM_LOAD_MODE , SDRAM_SELF_REFRESH , SDRAM_POWER_DOWN }

Functions
uint32_t	sdram_timing (struct sdram_timing *t)

void	sdram_command (enum fmc_sdram_bank bank, enum fmc_sdram_command cmd, int autorefresh, int modereg)

Detailed Description

Defined Constants and Types for the STM32F4xx Flexible Memory Controller

Version: 1.0.0

Author: © 2013 Chuck McManis cmcma.nosp@m.nis@.nosp@m.mcman.nosp@m.is.c.nosp@m.om

Date: 2013

This library supports the Flexible Memory Controller (FMC) in the STM32F4xx and STM32F7xx series of ARM Cortex Microcontrollers by ST Microelectronics.

LGPL License Terms libopencm3 License

Macro Definition Documentation

◆ FMC_BANK5_BASE

#define FMC_BANK5_BASE 0xa0000000U

Definition at line 43 of file fmc_common_f47.h.

◆ FMC_BANK6_BASE

#define FMC_BANK6_BASE 0xb0000000U

Definition at line 44 of file fmc_common_f47.h.

◆ FMC_BANK7_BASE

#define FMC_BANK7_BASE 0xc0000000U

Definition at line 45 of file fmc_common_f47.h.

◆ FMC_BANK8_BASE

#define FMC_BANK8_BASE 0xd0000000U

Definition at line 46 of file fmc_common_f47.h.

◆ FMC_SDCMR

#define FMC_SDCMR MMIO32(FSMC_BASE + (uint32_t) 0x150)

Definition at line 62 of file fmc_common_f47.h.

◆ FMC_SDCMR_CTB1

#define FMC_SDCMR_CTB1 (1 << 4)

Definition at line 179 of file fmc_common_f47.h.

◆ FMC_SDCMR_CTB2

#define FMC_SDCMR_CTB2 (1 << 3)

Definition at line 182 of file fmc_common_f47.h.

◆ FMC_SDCMR_MODE_AUTO_REFRESH

#define FMC_SDCMR_MODE_AUTO_REFRESH 3

Definition at line 190 of file fmc_common_f47.h.

◆ FMC_SDCMR_MODE_CLOCK_CONFIG_ENA

#define FMC_SDCMR_MODE_CLOCK_CONFIG_ENA 1

Definition at line 188 of file fmc_common_f47.h.

◆ FMC_SDCMR_MODE_LOAD_MODE_REGISTER

#define FMC_SDCMR_MODE_LOAD_MODE_REGISTER 4

Definition at line 191 of file fmc_common_f47.h.

◆ FMC_SDCMR_MODE_MASK

#define FMC_SDCMR_MODE_MASK 7

Definition at line 186 of file fmc_common_f47.h.

◆ FMC_SDCMR_MODE_NORMAL

#define FMC_SDCMR_MODE_NORMAL 0

Definition at line 187 of file fmc_common_f47.h.

◆ FMC_SDCMR_MODE_PALL

#define FMC_SDCMR_MODE_PALL 2

Definition at line 189 of file fmc_common_f47.h.

◆ FMC_SDCMR_MODE_POWER_DOWN

#define FMC_SDCMR_MODE_POWER_DOWN 6

Definition at line 193 of file fmc_common_f47.h.

◆ FMC_SDCMR_MODE_SELF_REFRESH

#define FMC_SDCMR_MODE_SELF_REFRESH 5

Definition at line 192 of file fmc_common_f47.h.

◆ FMC_SDCMR_MODE_SHIFT

#define FMC_SDCMR_MODE_SHIFT 0

Definition at line 185 of file fmc_common_f47.h.

◆ FMC_SDCMR_MRD_MASK

#define FMC_SDCMR_MRD_MASK (0x1fff << FMC_SDCMR_MRD_SHIFT)

Definition at line 172 of file fmc_common_f47.h.

◆ FMC_SDCMR_MRD_SHIFT

#define FMC_SDCMR_MRD_SHIFT 9

Definition at line 171 of file fmc_common_f47.h.

◆ FMC_SDCMR_NRFS_MASK

#define FMC_SDCMR_NRFS_MASK (15 << FMC_SDCMR_NRFS_SHIFT)

Definition at line 176 of file fmc_common_f47.h.

◆ FMC_SDCMR_NRFS_SHIFT

#define FMC_SDCMR_NRFS_SHIFT 5

Definition at line 175 of file fmc_common_f47.h.

◆ FMC_SDCR

#define FMC_SDCR ( x ) MMIO32(FSMC_BASE + 0x140 + 4 * (x))

Definition at line 51 of file fmc_common_f47.h.

◆ FMC_SDCR1

#define FMC_SDCR1 FMC_SDCR(0)

Definition at line 52 of file fmc_common_f47.h.

◆ FMC_SDCR2

#define FMC_SDCR2 FMC_SDCR(1)

Definition at line 53 of file fmc_common_f47.h.

◆ FMC_SDCR_CAS_1CYC

#define FMC_SDCR_CAS_1CYC (1 << FMC_SDCR_CAS_SHIFT)

Definition at line 96 of file fmc_common_f47.h.

◆ FMC_SDCR_CAS_2CYC

#define FMC_SDCR_CAS_2CYC (2 << FMC_SDCR_CAS_SHIFT)

Definition at line 97 of file fmc_common_f47.h.

◆ FMC_SDCR_CAS_3CYC

#define FMC_SDCR_CAS_3CYC (3 << FMC_SDCR_CAS_SHIFT)

Definition at line 98 of file fmc_common_f47.h.

◆ FMC_SDCR_CAS_SHIFT

#define FMC_SDCR_CAS_SHIFT 7

Definition at line 95 of file fmc_common_f47.h.

◆ FMC_SDCR_DNC_MASK

#define FMC_SDCR_DNC_MASK

Value:

                                 (FMC_SDCR_SDCLK_MASK | \
                                 FMC_SDCR_RPIPE_MASK  | \
                                 FMC_SDCR_RBURST)

Definition at line 162 of file fmc_common_f47.h.

◆ FMC_SDCR_MWID_16b

#define FMC_SDCR_MWID_16b (1 << FMC_SDCR_MWID_SHIFT)

Definition at line 107 of file fmc_common_f47.h.

◆ FMC_SDCR_MWID_32b

#define FMC_SDCR_MWID_32b (2 << FMC_SDCR_MWID_SHIFT)

Definition at line 108 of file fmc_common_f47.h.

◆ FMC_SDCR_MWID_8b

#define FMC_SDCR_MWID_8b (0 << FMC_SDCR_MWID_SHIFT)

Definition at line 106 of file fmc_common_f47.h.

◆ FMC_SDCR_MWID_SHIFT

#define FMC_SDCR_MWID_SHIFT 4

Definition at line 105 of file fmc_common_f47.h.

◆ FMC_SDCR_NB2

#define FMC_SDCR_NB2 0

Definition at line 101 of file fmc_common_f47.h.

◆ FMC_SDCR_NB4

#define FMC_SDCR_NB4 (1 << 6)

Definition at line 102 of file fmc_common_f47.h.

◆ FMC_SDCR_NC_10

#define FMC_SDCR_NC_10 (2 << FMC_SDCR_NC_SHIFT)

Definition at line 120 of file fmc_common_f47.h.

◆ FMC_SDCR_NC_11

#define FMC_SDCR_NC_11 (3 << FMC_SDCR_NC_SHIFT)

Definition at line 121 of file fmc_common_f47.h.

◆ FMC_SDCR_NC_8

#define FMC_SDCR_NC_8 (0 << FMC_SDCR_NC_SHIFT)

Definition at line 118 of file fmc_common_f47.h.

◆ FMC_SDCR_NC_9

#define FMC_SDCR_NC_9 (1 << FMC_SDCR_NC_SHIFT)

Definition at line 119 of file fmc_common_f47.h.

◆ FMC_SDCR_NC_SHIFT

#define FMC_SDCR_NC_SHIFT 0

Definition at line 117 of file fmc_common_f47.h.

◆ FMC_SDCR_NR_11

#define FMC_SDCR_NR_11 (0 << FMC_SDCR_NR_SHIFT)

Definition at line 112 of file fmc_common_f47.h.

◆ FMC_SDCR_NR_12

#define FMC_SDCR_NR_12 (1 << FMC_SDCR_NR_SHIFT)

Definition at line 113 of file fmc_common_f47.h.

◆ FMC_SDCR_NR_13

#define FMC_SDCR_NR_13 (2 << FMC_SDCR_NR_SHIFT)

Definition at line 114 of file fmc_common_f47.h.

◆ FMC_SDCR_NR_SHIFT

#define FMC_SDCR_NR_SHIFT 2

Definition at line 111 of file fmc_common_f47.h.

◆ FMC_SDCR_RBURST

#define FMC_SDCR_RBURST (1 << 12)

Definition at line 82 of file fmc_common_f47.h.

◆ FMC_SDCR_RPIPE_1CLK

#define FMC_SDCR_RPIPE_1CLK (1 << FMC_SDCR_RPIPE_SHIFT)

Definition at line 78 of file fmc_common_f47.h.

◆ FMC_SDCR_RPIPE_2CLK

#define FMC_SDCR_RPIPE_2CLK (2 << FMC_SDCR_RPIPE_SHIFT)

Definition at line 79 of file fmc_common_f47.h.

◆ FMC_SDCR_RPIPE_MASK

#define FMC_SDCR_RPIPE_MASK (3 << FMC_SDCR_RPIPE_SHIFT)

Definition at line 76 of file fmc_common_f47.h.

◆ FMC_SDCR_RPIPE_NONE

#define FMC_SDCR_RPIPE_NONE (0 << FMC_SDCR_RPIPE_SHIFT)

Definition at line 77 of file fmc_common_f47.h.

◆ FMC_SDCR_RPIPE_SHIFT

#define FMC_SDCR_RPIPE_SHIFT 13

Definition at line 75 of file fmc_common_f47.h.

◆ FMC_SDCR_SDCLK_2HCLK

#define FMC_SDCR_SDCLK_2HCLK (2 << FMC_SDCR_SDCLK_SHIFT)

Definition at line 88 of file fmc_common_f47.h.

◆ FMC_SDCR_SDCLK_3HCLK

#define FMC_SDCR_SDCLK_3HCLK (3 << FMC_SDCR_SDCLK_SHIFT)

Definition at line 89 of file fmc_common_f47.h.

◆ FMC_SDCR_SDCLK_DISABLE

#define FMC_SDCR_SDCLK_DISABLE (0 << FMC_SDCR_SDCLK_SHIFT)

Definition at line 87 of file fmc_common_f47.h.

◆ FMC_SDCR_SDCLK_MASK

#define FMC_SDCR_SDCLK_MASK (3 << FMC_SDCR_SDCLK_SHIFT)

Definition at line 86 of file fmc_common_f47.h.

◆ FMC_SDCR_SDCLK_SHIFT

#define FMC_SDCR_SDCLK_SHIFT 10

Definition at line 85 of file fmc_common_f47.h.

◆ FMC_SDCR_WP_ENABLE

#define FMC_SDCR_WP_ENABLE (1 << 9)

Definition at line 92 of file fmc_common_f47.h.

◆ FMC_SDRTR

#define FMC_SDRTR MMIO32(FSMC_BASE + 0x154)

Definition at line 65 of file fmc_common_f47.h.

◆ FMC_SDRTR_COUNT_MASK

#define FMC_SDRTR_COUNT_MASK (0x1fff << FMC_SDRTR_COUNT_SHIFT)

Definition at line 204 of file fmc_common_f47.h.

◆ FMC_SDRTR_COUNT_SHIFT

#define FMC_SDRTR_COUNT_SHIFT 1

Definition at line 203 of file fmc_common_f47.h.

◆ FMC_SDRTR_CRE

#define FMC_SDRTR_CRE (1 << 0)

Definition at line 207 of file fmc_common_f47.h.

◆ FMC_SDRTR_REIE

#define FMC_SDRTR_REIE (1 << 14)

Definition at line 200 of file fmc_common_f47.h.

◆ FMC_SDSR

#define FMC_SDSR MMIO32(FSMC_BASE + (uint32_t) 0x158)

Definition at line 68 of file fmc_common_f47.h.

◆ FMC_SDSR_BUSY

#define FMC_SDSR_BUSY (1 << 5)

Definition at line 214 of file fmc_common_f47.h.

◆ FMC_SDSR_MODE1_SHIFT

#define FMC_SDSR_MODE1_SHIFT 1

Definition at line 223 of file fmc_common_f47.h.

◆ FMC_SDSR_MODE2_SHIFT

#define FMC_SDSR_MODE2_SHIFT 3

Definition at line 222 of file fmc_common_f47.h.

◆ FMC_SDSR_MODE_NORMAL

#define FMC_SDSR_MODE_NORMAL 0

Definition at line 217 of file fmc_common_f47.h.

◆ FMC_SDSR_MODE_POWER_DOWN

#define FMC_SDSR_MODE_POWER_DOWN 2

Definition at line 219 of file fmc_common_f47.h.

◆ FMC_SDSR_MODE_SELF_REFRESH

#define FMC_SDSR_MODE_SELF_REFRESH 1

Definition at line 218 of file fmc_common_f47.h.

◆ FMC_SDSR_RE

#define FMC_SDSR_RE (1 << 0)

Definition at line 226 of file fmc_common_f47.h.

◆ FMC_SDTR

#define FMC_SDTR ( x ) MMIO32(FSMC_BASE + 0x148 + 4 * (x))

Definition at line 57 of file fmc_common_f47.h.

◆ FMC_SDTR1

#define FMC_SDTR1 FMC_SDTR(0)

Definition at line 58 of file fmc_common_f47.h.

◆ FMC_SDTR2

#define FMC_SDTR2 FMC_SDTR(1)

Definition at line 59 of file fmc_common_f47.h.

◆ FMC_SDTR_DNC_MASK

#define FMC_SDTR_DNC_MASK (FMC_SDTR_TRP_MASK | FMC_SDTR_TRC_MASK)

Definition at line 161 of file fmc_common_f47.h.

◆ FMC_SDTR_TMRD_MASK

#define FMC_SDTR_TMRD_MASK (15 << FMC_SDTR_TMRD_SHIFT)

Definition at line 153 of file fmc_common_f47.h.

◆ FMC_SDTR_TMRD_SHIFT

#define FMC_SDTR_TMRD_SHIFT 0

Definition at line 152 of file fmc_common_f47.h.

◆ FMC_SDTR_TRAS_MASK

#define FMC_SDTR_TRAS_MASK (15 << FMC_SDTR_TRAS_SHIFT)

Definition at line 145 of file fmc_common_f47.h.

◆ FMC_SDTR_TRAS_SHIFT

#define FMC_SDTR_TRAS_SHIFT 8

Definition at line 144 of file fmc_common_f47.h.

◆ FMC_SDTR_TRC_MASK

#define FMC_SDTR_TRC_MASK (15 << FMC_SDTR_TRC_SHIFT)

Definition at line 141 of file fmc_common_f47.h.

◆ FMC_SDTR_TRC_SHIFT

#define FMC_SDTR_TRC_SHIFT 12

Definition at line 140 of file fmc_common_f47.h.

◆ FMC_SDTR_TRCD_MASK

#define FMC_SDTR_TRCD_MASK (15 << FMC_SDTR_TRCD_SHIFT)

Definition at line 129 of file fmc_common_f47.h.

◆ FMC_SDTR_TRCD_SHIFT

#define FMC_SDTR_TRCD_SHIFT 24

Definition at line 128 of file fmc_common_f47.h.

◆ FMC_SDTR_TRP_MASK

#define FMC_SDTR_TRP_MASK (15 << FMC_SDTR_TRP_SHIFT)

Definition at line 133 of file fmc_common_f47.h.

◆ FMC_SDTR_TRP_SHIFT

#define FMC_SDTR_TRP_SHIFT 20

Definition at line 132 of file fmc_common_f47.h.

◆ FMC_SDTR_TWR_MASK

#define FMC_SDTR_TWR_MASK (15 << FMC_SDTR_TWR_SHIFT)

Definition at line 137 of file fmc_common_f47.h.

◆ FMC_SDTR_TWR_SHIFT

#define FMC_SDTR_TWR_SHIFT 16

Definition at line 136 of file fmc_common_f47.h.

◆ FMC_SDTR_TXSR_MASK

#define FMC_SDTR_TXSR_MASK (15 << FMC_SDTR_TXSR_SHIFT)

Definition at line 149 of file fmc_common_f47.h.

◆ FMC_SDTR_TXSR_SHIFT

#define FMC_SDTR_TXSR_SHIFT 4

Definition at line 148 of file fmc_common_f47.h.

◆ SDRAM_MODE_BURST_LENGTH_1

#define SDRAM_MODE_BURST_LENGTH_1 ((uint16_t)0x0000)

Definition at line 240 of file fmc_common_f47.h.

◆ SDRAM_MODE_BURST_LENGTH_2

#define SDRAM_MODE_BURST_LENGTH_2 ((uint16_t)0x0001)

Definition at line 241 of file fmc_common_f47.h.

◆ SDRAM_MODE_BURST_LENGTH_4

#define SDRAM_MODE_BURST_LENGTH_4 ((uint16_t)0x0002)

Definition at line 242 of file fmc_common_f47.h.

◆ SDRAM_MODE_BURST_LENGTH_8

#define SDRAM_MODE_BURST_LENGTH_8 ((uint16_t)0x0004)

Definition at line 243 of file fmc_common_f47.h.

◆ SDRAM_MODE_BURST_TYPE_INTERLEAVED

#define SDRAM_MODE_BURST_TYPE_INTERLEAVED ((uint16_t)0x0008)

Definition at line 245 of file fmc_common_f47.h.

◆ SDRAM_MODE_BURST_TYPE_SEQUENTIAL

#define SDRAM_MODE_BURST_TYPE_SEQUENTIAL ((uint16_t)0x0000)

Definition at line 244 of file fmc_common_f47.h.

◆ SDRAM_MODE_CAS_LATENCY_2

#define SDRAM_MODE_CAS_LATENCY_2 ((uint16_t)0x0020)

Definition at line 246 of file fmc_common_f47.h.

◆ SDRAM_MODE_CAS_LATENCY_3

#define SDRAM_MODE_CAS_LATENCY_3 ((uint16_t)0x0030)

Definition at line 247 of file fmc_common_f47.h.

◆ SDRAM_MODE_OPERATING_MODE_STANDARD

#define SDRAM_MODE_OPERATING_MODE_STANDARD ((uint16_t)0x0000)

Definition at line 248 of file fmc_common_f47.h.

◆ SDRAM_MODE_WRITEBURST_MODE_PROGRAMMED

#define SDRAM_MODE_WRITEBURST_MODE_PROGRAMMED ((uint16_t)0x0000)

Definition at line 249 of file fmc_common_f47.h.

◆ SDRAM_MODE_WRITEBURST_MODE_SINGLE

#define SDRAM_MODE_WRITEBURST_MODE_SINGLE ((uint16_t)0x0200)

Definition at line 250 of file fmc_common_f47.h.

Enumeration Type Documentation

◆ fmc_sdram_bank

enum fmc_sdram_bank

Enumerator
SDRAM_BANK1
SDRAM_BANK2
SDRAM_BOTH_BANKS

Definition at line 252 of file fmc_common_f47.h.

◆ fmc_sdram_command

enum fmc_sdram_command

Enumerator
SDRAM_CLK_CONF
SDRAM_NORMAL
SDRAM_PALL
SDRAM_AUTO_REFRESH
SDRAM_LOAD_MODE
SDRAM_SELF_REFRESH
SDRAM_POWER_DOWN

Definition at line 253 of file fmc_common_f47.h.

Function Documentation

◆ sdram_command()

void sdram_command	(	enum fmc_sdram_bank	bank,
		enum fmc_sdram_command	cmd,
		int	autorefresh,
		int	modereg
	)

◆ sdram_timing()

uint32_t sdram_timing ( struct sdram_timing * t )

Definition at line 43 of file fmc_common_f47.c.

References FMC_SDTR_TMRD_SHIFT, FMC_SDTR_TRAS_SHIFT, FMC_SDTR_TRC_SHIFT, FMC_SDTR_TRCD_SHIFT, FMC_SDTR_TRP_SHIFT, FMC_SDTR_TWR_SHIFT, FMC_SDTR_TXSR_SHIFT, sdram_timing::tmrd, sdram_timing::tras, sdram_timing::trc, sdram_timing::trcd, sdram_timing::trp, sdram_timing::twr, and sdram_timing::txsr.

Data Structures

Macros

Enumerations

Functions