libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
Macros
DSI Defines
STM32F7xx Defines

Defines Constants and Macros for the STM32F7xx Display Serial Interface Host and Wrapper More...

Collaboration diagram for DSI Defines:

Macros

#define DSI_VR   MMIO32(DSI_BASE + 0x0U)
 DSI Host Version Register. More...
 
#define DSI_CR   MMIO32(DSI_BASE + 0x4U)
 DSI Host Control Register. More...
 
#define DSI_CR_EN   (1 << 0)
 
#define DSI_CCR   MMIO32(DSI_BASE + 0x8U)
 DSI Host Clock Control Register. More...
 
#define DSI_CCR_TOCKDIV_SHIFT   8
 
#define DSI_CCR_TOCKDIV_MASK   0xff
 
#define DSI_CCR_TXECKDIV_SHIFT   0
 
#define DSI_CCR_TXECKDIV_MASK   0xff
 
#define DSI_LVCIDR   MMIO32(DSI_BASE + 0xcU)
 DSI Host LTDC VCID Register. More...
 
#define DSI_LVCIDR_VCID_SHIFT   0
 
#define DSI_LVCIDR_VCID_MASK   0x3
 
#define DSI_LCOLCR   MMIO32(DSI_BASE + 0x10U)
 DSI Host LTDC Color Coding Register. More...
 
#define DSI_LCOLCR_LPE   (1 << 8)
 
#define DSI_LCOLCR_COLC_SHIFT   0
 
#define DSI_LCOLCR_COLC_MASK   0xf
 
#define DSI_LPCR   MMIO32(DSI_BASE + 0x14U)
 DSI Host LTDC Polarity Configuration Register. More...
 
#define DSI_LPCR_HSP   (1 << 2)
 
#define DSI_LPCR_VSP   (1 << 1)
 
#define DSI_LPCR_DEP   (1 << 0)
 
#define DSI_LPMCR   MMIO32(DSI_BASE + 0x18U)
 DSI Host Low-power Configuration Register. More...
 
#define DSI_LPMCR_LPSIZE_SHIFT   16
 
#define DSI_LPMCR_LPSIZE_MASK   0xff
 
#define DSI_LPMCR_VLPSIZE_SHIFT   0
 
#define DSI_LPMCR_VLPSIZE_MASK   0xff
 
#define DSI_PCR   MMIO32(DSI_BASE + 0x2cU)
 DSI Host Protocol Configuration Register. More...
 
#define DSI_PCR_CRCRXE   (1 << 4)
 
#define DSI_PCR_ECCRXE   (1 << 3)
 
#define DSI_PCR_BTAE   (1 << 2)
 
#define DSI_PCR_ETRXE   (1 << 1)
 
#define DSI_PCR_ETTXE   (1 << 0)
 
#define DSI_GVCIDR   MMIO32(DSI_BASE + 0x30U)
 DSI Host Generic VCID Register. More...
 
#define DSI_GVCIDR_VCID_SHIFT   0
 
#define DSI_GVCIDR_VCID_MASK   0x3
 
#define DSI_MCR   MMIO32(DSI_BASE + 0x34U)
 DSI Host mode Configuration Register. More...
 
#define DSI_MCR_CMDM   (1 << 0)
 
#define DSI_VMCR   MMIO32(DSI_BASE + 0x38U)
 DSI Host Video mode Configuration Register. More...
 
#define DSI_VMCR_PGO   (1 << 24)
 
#define DSI_VMCR_PGM   (1 << 20)
 
#define DSI_VMCR_PGE   (1 << 16)
 
#define DSI_VMCR_LPCE   (1 << 15)
 
#define DSI_VMCR_FBTAAE   (1 << 14)
 
#define DSI_VMCR_LPHFPE   (1 << 13)
 
#define DSI_VMCR_LPHBPE   (1 << 12)
 
#define DSI_VMCR_LPVAE   (1 << 11)
 
#define DSI_VMCR_LPVFPE   (1 << 10)
 
#define DSI_VMCR_LPVBPE   (1 << 9)
 
#define DSI_VMCR_LPVSAE   (1 << 8)
 
#define DSI_VMCR_VMT_SHIFT   0
 
#define DSI_VMCR_VMT_MASK   0x3
 
#define DSI_VMCR_VMT_NON_BURST_PULSE   0x0
 
#define DSI_VMCR_VMT_NON_BURSE_EVENT   0x1
 
#define DSI_VMCR_VMT_BURST   0x2
 
#define DSI_VPCR   MMIO32(DSI_BASE + 0x3CU)
 DSI Host Video Packet Configuration Register. More...
 
#define DSI_VPCR_VPSIZE_SHIFT   0
 
#define DSI_VPCR_VPSIZE_MASK   0x3fff
 
#define DSI_VCCR   MMIO32(DSI_BASE + 0x40U)
 DSI Host Video Chunks Configuration Register. More...
 
#define DSI_VCCR_NUMC_SHIFT   0
 
#define DSI_VCCR_NUMC_MASK   0x1fff
 
#define DSI_VNPCR   MMIO32(DSI_BASE + 0x44U)
 DSI Host Video Null Packet Configuration Register. More...
 
#define DSI_VNPCR_NPSIZE_SHIFT   0
 
#define DSI_VNPCR_NPSIZE_MASK   0x1fff
 
#define DSI_VHSACR   MMIO32(DSI_BASE + 0x48U)
 DSI Host Video HSA Configuration Register. More...
 
#define DSI_VHSACR_HSA_SHIFT   0
 
#define DSI_VHSACR_HSA_MASK   0xfff
 
#define DSI_VHBPCR   MMIO32(DSI_BASE + 0x4CU)
 DSI Host Video HBP Configuration Register. More...
 
#define DSI_VHBPCR_HBP_SHIFT   0
 
#define DSI_VHBPCR_HBP_MASK   0xfff
 
#define DSI_VLCR   MMIO32(DSI_BASE + 0x50U)
 DSI Host Video Line Configuration Register. More...
 
#define DSI_VLCR_HLINE_SHIFT   0
 
#define DSI_VLCR_HLINE_MASK   0x7fff
 
#define DSI_VVSACR   MMIO32(DSI_BASE + 0x54U)
 DSI Host Video VSA Configuration Register. More...
 
#define DSI_VVSACR_VSA_SHIFT   0
 
#define DSI_VVSACR_VSA_MASK   0x3ff
 
#define DSI_VVBPCR   MMIO32(DSI_BASE + 0x58U)
 DSI Host Video VBP Configuration Register. More...
 
#define DSI_VVBPCR_VBP_SHIFT   0
 
#define DSI_VVBPCR_VBP_MASK   0x3ff
 
#define DSI_VVFPCR   MMIO32(DSI_BASE + 0x5CU)
 DSI Host Video VFP Configuration Register. More...
 
#define DSI_VVFPCR_VFP_SHIFT   0
 
#define DSI_VVFPCR_VFP_MASK   0x3ff
 
#define DSI_VVACR   MMIO32(DSI_BASE + 0x60U)
 DSI Host Video VA Configuration Register. More...
 
#define DSI_VVACR_VA_SHIFT   0
 
#define DSI_VVACR_VA_MASK   0x3fff
 
#define DSI_LCCR   MMIO32(DSI_BASE + 0x64U)
 DSI Host LTDC Command Configuration Register. More...
 
#define DSI_LCCR_CMDSIZE_SHIFT   0
 
#define DSI_LCCR_CMDSIZE_MASK   0xffff
 
#define DSI_CMCR   MMIO32(DSI_BASE + 0x68U)
 DSI Host Command mode Configuration Register. More...
 
#define DSI_CMCR_MRDPS   (1 << 24)
 
#define DSI_CMCR_DLWTX   (1 << 19)
 
#define DSI_CMCR_DSR0TX   (1 << 18)
 
#define DSI_CMCR_DSW1TX   (1 << 17)
 
#define DSI_CMCR_DSW0TX   (1 << 16)
 
#define DSI_CMCR_GLWTX   (1 << 14)
 
#define DSI_CMCR_GSR2TX   (1 << 13)
 
#define DSI_CMCR_GSR1TX   (1 << 12)
 
#define DSI_CMCR_GSR0TX   (1 << 11)
 
#define DSI_CMCR_GSW2TX   (1 << 10)
 
#define DSI_CMCR_GSW1TX   (1 << 9)
 
#define DSI_CMCR_GSW0TX   (1 << 8)
 
#define DSI_CMCR_ARE   (1 << 1)
 
#define DSI_CMCR_TEARE   (1 << 0)
 
#define DSI_GHCR   MMIO32(DSI_BASE + 0x6CU)
 DSI Host Generic Header Configuration Register. More...
 
#define DSI_GHCR_WCMSB_SHIFT   16
 
#define DSI_GHCR_WCMSB_MASK   0xff
 
#define DSI_GHCR_WCLSB_SHIFT   8
 
#define DSI_GHCR_WCLSB_MASK   0xff
 
#define DSI_GHCR_DATA1_SHIFT   16 /* data 1 in 'short' mode */
 
#define DSI_GHCR_DATA1_MASK   0xff
 
#define DSI_GHCR_DATA0_SHIFT   8 /* data 0 in 'short' mode */
 
#define DSI_GHCR_DATA0_MASK   0xff
 
#define DSI_GHCR_VCID_SHIFT   6
 
#define DSI_GHCR_VCID_MASK   0x3
 
#define DSI_GHCR_DT_SHIFT   0
 
#define DSI_GHCR_DT_MASK   0x3f
 
#define DSI_GPDR   MMIO32(DSI_BASE + 0x70U)
 DSI Host Generic Payload Data Register. More...
 
#define DSI_GPDR_BYTE4_SHIFT   24
 
#define DSI_GPDR_BYTE4_MASK   0xff
 
#define DSI_GPDR_BYTE3_SHIFT   16
 
#define DSI_GPDR_BYTE3_MASK   0xff
 
#define DSI_GPDR_BYTE2_SHIFT   8
 
#define DSI_GPDR_BYTE2_MASK   0xff
 
#define DSI_GPDR_BYTE1_SHIFT   0
 
#define DSI_GPDR_BYTE1_MASK   0xff
 
#define DSI_GPSR   MMIO32(DSI_BASE + 0x74U)
 DSI Host Generate Packet Status Register. More...
 
#define DSI_GPSR_RCB   (1 << 6)
 
#define DSI_GPSR_PRDFF   (1 << 5)
 
#define DSI_GPSR_PRDFE   (1 << 4)
 
#define DSI_GPSR_PWRFF   (1 << 3)
 
#define DSI_GPSR_PWRFE   (1 << 2)
 
#define DSI_GPSR_CMDFF   (1 << 1)
 
#define DSI_GPSR_CMDFE   (1 << 0)
 
#define DSI_TCCR0   MMIO32(DSI_BASE + 0x78U)
 DSI Host Timeout Counter Configuration Register. More...
 
#define DSI_TCCR0_HSTX_TOCNT_SHIFT   16
 
#define DSI_TCCR0_HSTX_TOCNT_MASK   0xffff
 
#define DSI_TCCR0_LPRX_TOCNT_SHIFT   0
 
#define DSI_TCCR0_LPRX_TOCNT_MASK   0xffff
 
#define DSI_TCCR1   MMIO32(DSI_BASE + 0x7CU)
 DSI Host Timeout Counter Configuration Register 1. More...
 
#define DSI_TCCR1_HSRD_TOCNT_SHIFT   0
 
#define DSI_TCCR1_HSRD_TOCNT_MASK   0xffff
 
#define DSI_TCCR2   MMIO32(DSI_BASE + 0x80U)
 DSI Host Timeout Counter Configuration Register 2. More...
 
#define DSI_TCCR2_LPRD_TOCNT_SHIFT   0
 
#define DSI_TCCR2_LPRD_TOCNT_MASK   0xffff
 
#define DSI_TCCR3   MMIO32(DSI_BASE + 0x84U)
 DSI Host Timeout Counter Configuration Register 3. More...
 
#define DSI_TCCR3_PM   (1 << 24)
 
#define DSI_TCCR3_HSWR_TOCNT_SHIFT   0
 
#define DSI_TCCR3_HSWR_TOCNT_MASK   0xffff
 
#define DSI_TCCR4   MMIO32(DSI_BASE + 0x88U)
 DSI Host Timeout Counter Configuration Register 4. More...
 
#define DSI_TCCR4_LPWR_TOCNT_SHIFT   0
 
#define DSI_TCCR4_LPWR_TOCNT_MASK   0xffff
 
#define DSI_TCCR5   MMIO32(DSI_BASE + 0x8CU)
 DSI Host Timeout Counter Configuration Register 5. More...
 
#define DSI_TCCR5_BTA_TOCNT_SHIFT   0
 
#define DSI_TCCR5_BTA_TOCNT_MASK   0xffff
 
#define DSI_CLCR   MMIO32(DSI_BASE + 0x94U)
 DSI Host Clock Lane Configuration Register. More...
 
#define DSI_CLCR_ACR   (1 << 1)
 
#define DSI_CLCR_DPCC   (1 << 0)
 
#define DSI_CLTCR   MMIO32(DSI_BASE + 0x98U)
 DSI Host Clock Lane Timer Configuration Register. More...
 
#define DSI_CLTCR_HS2LP_TIME_SHIFT   16
 
#define DSI_CLTCR_HS2LP_TIME_MASK   0x3ff
 
#define DSI_CLTCR_LP2HS_TIME_SHIFT   0
 
#define DSI_CLTCR_LP2HS_TIME_MASK   0x3ff
 
#define DSI_DLTCR   MMIO32(DSI_BASE + 0x9CU)
 DSI Host Data Lane Time Configuration Register. More...
 
#define DSI_DLTCR_HS2LP_TIME_SHIFT   24
 
#define DSI_DLTCR_HS2LP_TIME_MASK   0xff
 
#define DSI_DLTCR_LP2HS_TIME_SHIFT   16
 
#define DSI_DLTCR_LP2HS_TIME_MASK   0xff
 
#define DSI_DLTCR_MRD_TIME_SHIFT   0
 
#define DSI_DLTCR_MRD_TIME_MASK   0x7fff
 
#define DSI_PCTLR   MMIO32(DSI_BASE + 0xA0U)
 DSI Host PHY Control Register. More...
 
#define DSI_PCTLR_CKE   (1 << 2)
 
#define DSI_PCTLR_DEN   (1 << 1)
 
#define DSI_PCONFR   MMIO32(DSI_BASE + 0xA4U)
 DSI Host PHY Configuration Register. More...
 
#define DSI_PCONFR_SW_TIME_SHIFT   8
 
#define DSI_PCONFR_SW_TIME_MASK   0xff
 
#define DSI_PCONFR_NL_SHIFT   0
 
#define DSI_PCONFR_NL_MASK   0x3
 
#define DSI_PCONFR_NL_1LANE   0
 
#define DSI_PCONFR_NL_2LANE   1
 
#define DSI_PUCR   MMIO32(DSI_BASE + 0xA8U)
 DSI Host PHY ULPS Control Register. More...
 
#define DSI_PUCR_UEDL   (1 << 3)
 
#define DSI_PUCR_URDL   (1 << 2)
 
#define DSI_PUCR_UECL   (1 << 1)
 
#define DSI_PUCR_URCL   (1 << 0)
 
#define DSI_PTTCR   MMIO32(DSI_BASE + 0xACU)
 DSI Host PHY TX Triggers Configuration Register. More...
 
#define DSI_PTTCR_TX_TRIG_SHIFT   0
 
#define DSI_PTTCR_TX_TRIG_MASK   0xf
 
#define DSI_PTTCR_TX_TRIG_1   0x1
 
#define DSI_PTTCR_TX_TRIG_2   0x2
 
#define DSI_PTTCR_TX_TRIG_3   0x4
 
#define DSI_PTTCR_TX_TRIG_4   0x8
 
#define DSI_PSR   MMIO32(DSI_BASE + 0xB0U)
 DSI Host PHY Status Register. More...
 
#define DSI_PSR_UAN1   (1 << 8)
 
#define DSI_PSR_PSS1   (1 << 7)
 
#define DSI_PSR_RUE0   (1 << 6)
 
#define DSI_PSR_UAN0   (1 << 5)
 
#define DSI_PSR_PSS0   (1 << 4)
 
#define DSI_PSR_UANC   (1 << 3)
 
#define DSI_PSR_PSSC   (1 << 2)
 
#define DSI_PSR_PD   (1 << 1)
 
#define DSI_ISR0   MMIO32(DSI_BASE + 0xBCU)
 DSI Host Interrupt & Status Register 0. More...
 
#define DSI_ISR0_PE4   (1 << 20)
 
#define DSI_ISR0_PE3   (1 << 19)
 
#define DSI_ISR0_PE2   (1 << 18)
 
#define DSI_ISR0_PE1   (1 << 17)
 
#define DSI_ISR0_PE0   (1 << 16)
 
#define DSI_ISR0_AE15   (1 << 15)
 
#define DSI_ISR0_AE14   (1 << 14)
 
#define DSI_ISR0_AE13   (1 << 13)
 
#define DSI_ISR0_AE12   (1 << 12)
 
#define DSI_ISR0_AE11   (1 << 11)
 
#define DSI_ISR0_AE10   (1 << 10)
 
#define DSI_ISR0_AE9   (1 << 9)
 
#define DSI_ISR0_AE8   (1 << 8)
 
#define DSI_ISR0_AE7   (1 << 7)
 
#define DSI_ISR0_AE6   (1 << 6)
 
#define DSI_ISR0_AE5   (1 << 5)
 
#define DSI_ISR0_AE4   (1 << 4)
 
#define DSI_ISR0_AE3   (1 << 3)
 
#define DSI_ISR0_AE2   (1 << 2)
 
#define DSI_ISR0_AE1   (1 << 1)
 
#define DSI_ISR0_AE0   (1 << 0)
 
#define DSI_ISR1   MMIO32(DSI_BASE + 0xC0U)
 DSI Host Interrupt & Status Register 1. More...
 
#define DSI_ISR1_GPRXE   (1 << 12)
 
#define DSI_ISR1_GPRDE   (1 << 11)
 
#define DSI_ISR1_GPTXE   (1 << 10)
 
#define DSI_ISR1_GPWRE   (1 << 9)
 
#define DSI_ISR1_GCWRE   (1 << 8)
 
#define DSI_ISR1_LPWRE   (1 << 7)
 
#define DSI_ISR1_EOTPE   (1 << 6)
 
#define DSI_ISR1_PSE   (1 << 5)
 
#define DSI_ISR1_CRCE   (1 << 4)
 
#define DSI_ISR1_ECCME   (1 << 3)
 
#define DSI_ISR1_ECCSE   (1 << 2)
 
#define DSI_ISR1_TOLPRX   (1 << 1)
 
#define DSI_ISR1_TOHSTX   (1 << 0)
 
#define DSI_IER0   MMIO32(DSI_BASE + 0xC4U)
 DSI Host Interrupt Enable Register 0. More...
 
#define DSI_IER0_PE4IE   (1 << 20)
 
#define DSI_IER0_PE3IE   (1 << 19)
 
#define DSI_IER0_PE2IE   (1 << 18)
 
#define DSI_IER0_PE1IE   (1 << 17)
 
#define DSI_IER0_PE0IE   (1 << 16)
 
#define DSI_IER0_AE15IE   (1 << 15)
 
#define DSI_IER0_AE14IE   (1 << 14)
 
#define DSI_IER0_AE13IE   (1 << 13)
 
#define DSI_IER0_AE12IE   (1 << 12)
 
#define DSI_IER0_AE11IE   (1 << 11)
 
#define DSI_IER0_AE10IE   (1 << 10)
 
#define DSI_IER0_AE9IE   (1 << 9)
 
#define DSI_IER0_AE8IE   (1 << 8)
 
#define DSI_IER0_AE7IE   (1 << 7)
 
#define DSI_IER0_AE6IE   (1 << 6)
 
#define DSI_IER0_AE5IE   (1 << 5)
 
#define DSI_IER0_AE4IE   (1 << 4)
 
#define DSI_IER0_AE3IE   (1 << 3)
 
#define DSI_IER0_AE2IE   (1 << 2)
 
#define DSI_IER0_AE1IE   (1 << 1)
 
#define DSI_IER0_AE0IE   (1 << 0)
 
#define DSI_IER1   MMIO32(DSI_BASE + 0xC8U)
 DSI Host Interrupt Enable Register 1. More...
 
#define DSI_IER1_GPRXEIE   (1 << 12)
 
#define DSI_IER1_GPRDEIE   (1 << 11)
 
#define DSI_IER1_GPTXEIE   (1 << 10)
 
#define DSI_IER1_GPWREIE   (1 << 9)
 
#define DSI_IER1_GCWREIE   (1 << 8)
 
#define DSI_IER1_LPWREIE   (1 << 7)
 
#define DSI_IER1_EOTPEIE   (1 << 6)
 
#define DSI_IER1_PSEIE   (1 << 5)
 
#define DSI_IER1_CRCEIE   (1 << 4)
 
#define DSI_IER1_ECCMEIE   (1 << 3)
 
#define DSI_IER1_ECCSEIE   (1 << 2)
 
#define DSI_IER1_TOLPRXIE   (1 << 1)
 
#define DSI_IER1_TOHSTXIE   (1 << 0)
 
#define DSI_FIR0   MMIO32(DSI_BASE + 0xD8U)
 DSI Host Force Interrupt Register 0. More...
 
#define DSI_FIR0_FPE4   (1 << 20)
 
#define DSI_FIR0_FPE3   (1 << 19)
 
#define DSI_FIR0_FPE2   (1 << 18)
 
#define DSI_FIR0_FPE1   (1 << 17)
 
#define DSI_FIR0_FPE0   (1 << 16)
 
#define DSI_FIR0_FAE15   (1 << 15)
 
#define DSI_FIR0_FAE14   (1 << 14)
 
#define DSI_FIR0_FAE13   (1 << 13)
 
#define DSI_FIR0_FAE12   (1 << 12)
 
#define DSI_FIR0_FAE11   (1 << 11)
 
#define DSI_FIR0_FAE10   (1 << 10)
 
#define DSI_FIR0_FAE9   (1 << 9)
 
#define DSI_FIR0_FAE8   (1 << 8)
 
#define DSI_FIR0_FAE7   (1 << 7)
 
#define DSI_FIR0_FAE6   (1 << 6)
 
#define DSI_FIR0_FAE5   (1 << 5)
 
#define DSI_FIR0_FAE4   (1 << 4)
 
#define DSI_FIR0_FAE3   (1 << 3)
 
#define DSI_FIR0_FAE2   (1 << 2)
 
#define DSI_FIR0_FAE1   (1 << 1)
 
#define DSI_FIR0_FAE0   (1 << 0)
 
#define DSI_FIR1   MMIO32(DSI_BASE + 0xDCU)
 DSI Host Force Interrupt Register 1. More...
 
#define DSI_FIR1_FGPRXE   (1 << 12)
 
#define DSI_FIR1_FGPRDE   (1 << 11)
 
#define DSI_FIR1_FGPTXE   (1 << 10)
 
#define DSI_FIR1_FGPWRE   (1 << 9)
 
#define DSI_FIR1_FGCWRE   (1 << 8)
 
#define DSI_FIR1_FLPWRE   (1 << 7)
 
#define DSI_FIR1_FEOTPE   (1 << 6)
 
#define DSI_FIR1_FPSE   (1 << 5)
 
#define DSI_FIR1_FCRCE   (1 << 4)
 
#define DSI_FIR1_FECCME   (1 << 3)
 
#define DSI_FIR1_FECCSE   (1 << 2)
 
#define DSI_FIR1_FTOLPRX   (1 << 1)
 
#define DSI_FIR1_FTOHSTX   (1 << 0)
 
#define DSI_VSCR   MMIO32(DSI_BASE + 0x100U)
 DSI Host Video Shadow Control Register. More...
 
#define DSI_VSCR_UR   (1 << 8)
 
#define DSI_VSCR_EN   (1 << 0)
 
#define DSI_LCVCIDR   MMIO32(DSI_BASE + 0x10CU)
 DSI Host LTDC Current VCID Register. More...
 
#define DSI_LCVCIDR_VCID_SHIFT   0
 
#define DSI_LCVCIDR_VCID_MASK   0x3
 
#define DSI_LCCCR   MMIO32(DSI_BASE + 0x110U)
 DSI Host LTCD Current Color Coding Register. More...
 
#define DSI_LCCR_LPE   (1 << 8)
 
#define DSI_LCCR_COLC_SHIFT   0
 
#define DSI_LCCR_COLC_MASK   0xf
 
#define DSI_LPMCCR   MMIO32(DSI_BASE + 0x118U)
 DSI Host Low-power mode Current Configuration Register. More...
 
#define DSI_LPMCCR_LPSIZE_SHIFT   16
 
#define DSI_LPMCCR_LPSIZE_MASK   0xff
 
#define DSI_LPMCCR_VLPSIZE_SHIFT   0
 
#define DSI_LPMCCR_VLPSIZE_MASK   0xff
 
#define DSI_VMCCR   MMIO32(DSI_BASE + 0x138U)
 DSI Host Video mode Current Configuration Register. More...
 
#define DSI_VMCCR_LPCE   (1 << 9)
 
#define DSI_VMCCR_FBTAAE   (1 << 8)
 
#define DSI_VMCCR_LPHFE   (1 << 7)
 
#define DSI_VMCCR_LPHBPE   (1 << 6)
 
#define DSI_VMCCR_LPVAE   (1 << 5)
 
#define DSI_VMCCR_LPVFPE   (1 << 4)
 
#define DSI_VMCCR_LPVBPE   (1 << 3)
 
#define DSI_VMCCR_LPVSAE   (1 << 2)
 
#define DSI_VMCCR_VMT_SHIFT   0
 
#define DSI_VMCCR_VMT_MASK   0x3
 
#define DSI_VPCCR   MMIO32(DSI_BASE + 0x13CU)
 DSI Host Video Packet Current Configuration Register. More...
 
#define DSI_VPCCR_VPSIZE_SHIFT   0
 
#define DSI_VPCCR_VPSIZE_MASK   0x3fff
 
#define DSI_VCCCR   MMIO32(DSI_BASE + 0x140U)
 DSI Host Video Chunks Current Configuration Register. More...
 
#define DSI_VCCCR_NUMC_SHIFT   0
 
#define DSI_VCCCR_NUMC_MASK   0x1fff
 
#define DSI_VNPCCR   MMIO32(DSI_BASE + 0x144U)
 DSI Host Video Null Packet Current Configuration Register. More...
 
#define DSI_VNPCCR_NPSIZE_SHIFT   0
 
#define DSI_VNPCCR_NPSIZE_MASK   0x1fff
 
#define DSI_VHSACCR   MMIO32(DSI_BASE + 0x148U)
 DSI Host Video HSA Current Configuration Register. More...
 
#define DSI_VHSACCR_HSA_SHIFT   0
 
#define DSI_VHSACCR_HSA_MASK   0xfff
 
#define DSI_VHBPCCR   MMIO32(DSI_BASE + 0x14CU)
 DSI Host Video HBP Current Configuration Register. More...
 
#define DSI_VHBPCCR_HBP_SHIFT   0
 
#define DSI_VHBPCCR_HBP_MASK   0xfff
 
#define DSI_VLCCR   MMIO32(DSI_BASE + 0x150U)
 DSI Host Video Line Current Configuration Register. More...
 
#define DSI_VLCCR_HLINE_SHIFT   0
 
#define DSI_VLCCR_HLINE_MASK   0x7fff
 
#define DSI_VVSACCR   MMIO32(DSI_BASE + 0x154U)
 DSI Host Video VSA Current Configuration Register. More...
 
#define DSI_VVSACCR_VSA_SHIFT   0
 
#define DSI_VVSACCR_VSA_MASK   0x3ff
 
#define DSI_VVBPCCR   MMIO32(DSI_BASE + 0x0158U)
 DSI Host Video VBP Current Configuration Register. More...
 
#define DSI_VVBPCCR_VBP_SHIFT   0
 
#define DSI_VVBPCCR_VBP_MAST   0x3ff
 
#define DSI_VVFPCCR   MMIO32(DSI_BASE + 0x15CU)
 DSI Host Video VFP Current Configuration Register. More...
 
#define DSI_VVFPCCR_VFP_SHIFT   0
 
#define DSI_VVFPCCR_VFP_MASK   0x3ff
 
#define DSI_VVACCR   MMIO32(DSI_BASE + 0x160U)
 DSI Host Video VA Current Configuration Register. More...
 
#define DSI_VVACCR_VA_SHIFT   0
 
#define DSI_VVACCR_VA_MASK   0x3fff
 
#define DSI_WCFGR   MMIO32(DSI_BASE + 0x400U)
 DSI Wrapper Configuration Register. More...
 
#define DSI_WCFGR_VSPOL   (1 << 7)
 
#define DSI_WCFGR_AR   (1 << 6)
 
#define DSI_WCFGR_TEPOL   (1 << 5)
 
#define DSI_WCFGR_TESRC   (1 << 4)
 
#define DSI_WCFGR_COLMUX_SHIFT   1
 
#define DSI_WCFGR_COLMUX_MASK   7
 
#define DSI_WCFGR_DSIM   (1 << 0)
 
#define DSI_WCR   MMIO32(DSI_BASE + 0x404U)
 DSI Wrapper Control Register. More...
 
#define DSI_WCR_DSIEN   (1 << 3)
 
#define DSI_WCR_LTDCEN   (1 << 2)
 
#define DSI_WCR_SHTDN   (1 << 1)
 
#define DSI_WCR_COLM   (1 << 0)
 
#define DSI_WIER   MMIO32(DSI_BASE + 0x408U)
 DSI Wrapper Interrupt Enable Register. More...
 
#define DSI_WIER_RRIE   (1 << 13)
 
#define DSI_WIER_PLLUIE   (1 << 10)
 
#define DSI_WIER_PLLLIE   (1 << 9)
 
#define DSI_WIER_ERIE   (1 << 1)
 
#define DSI_WIER_TEIE   (1 << 0)
 
#define DSI_WISR   MMIO32(DSI_BASE + 0x40CU)
 DSI Wrapper Interrupt & Status Register. More...
 
#define DSI_WISR_RRIF   (1 << 13)
 
#define DSI_WISR_RRS   (1 << 12)
 
#define DSI_WISR_PLLUIF   (1 << 10)
 
#define DSI_WISR_PLLLIF   (1 << 9)
 
#define DSI_WISR_PLLLS   (1 << 8)
 
#define DSI_WISR_BUSY   (1 << 2)
 
#define DSI_WISR_ERIF   (1 << 1)
 
#define DSI_WISR_TEIF   (1 << 0)
 
#define DSI_WIFCR   MMIO32(DSI_BASE + 0x410U)
 DSI Wrapper Interrupt Flag Clear Register. More...
 
#define DSI_WIFCR_CRRIF   (1 << 13)
 
#define DSI_WIFCR_CPLLUIF   (1 << 10)
 
#define DSI_WIFCR_CPLLLIF   (1 << 9)
 
#define DSI_WIFCR_CERIF   (1 << 1)
 
#define DSI_WIFCR_CTEIF   (1 << 0)
 
#define DSI_WPCR0   MMIO32(DSI_BASE + 0x418U)
 DSI Wrapper PHY Configuration Register 0. More...
 
#define DSI_WPCR0_TCLKPOSTEN   (1 << 27)
 
#define DSI_WPCR0_TLPXCEN   (1 << 26)
 
#define DSI_WPCR0_THSEXITEN   (1 << 25)
 
#define DSI_WPCR0_TLPXDEN   (1 << 24)
 
#define DSI_WPCR0_THSZEROEN   (1 << 23)
 
#define DSI_WPCR0_THSTRAILEN   (1 << 22)
 
#define DSI_WPCR0_THSPREPEN   (1 << 21)
 
#define DSI_WPCR0_TCLKZEROEN   (1 << 20)
 
#define DSI_WPCR0_TCLKPREPEN   (1 << 19)
 
#define DSI_WPCR0_PDEN   (1 << 18)
 
#define DSI_WPCR0_TDDL   (1 << 16)
 
#define DSI_WPCR0_CDOFFDL   (1 << 14)
 
#define DSI_WPCR0_FTXSMDL   (1 << 13)
 
#define DSI_WPCR0_FTXSMCL   (1 << 12)
 
#define DSI_WPCR0_HSIDL1   (1 << 11)
 
#define DSI_WPCR0_HSIDL0   (1 << 10)
 
#define DSI_WPCR0_HSICL   (1 << 9)
 
#define DSI_WPCR0_SWDL1   (1 << 8)
 
#define DSI_WPCR0_SWDL0   (1 << 7)
 
#define DSI_WPCR0_SWCL   (1 << 6)
 
#define DSI_WPCR0_UIX4_SHIFT   0
 
#define DSI_WPCR0_UIX4_MASK   0x3f
 
#define DSI_WPCR1   MMIO32(DSI_BASE + 0x41CU)
 DSI Wrapper PHY Configration Register 1. More...
 
#define DSI_WPCR1_LPRXFT_SHIFT   25
 
#define DSI_WPCR1_LPRXFT_MASK   0x3
 
#define DSI_WPCR1_FLPRXLPM   (1 << 22)
 
#define DSI_WPCR1_HSTXSRCDL_SHIFT   18
 
#define DSI_WPCR1_HSTXSRCDL_MASK   0x3
 
#define DSI_WPCR1_HSTXSRCCL_SHIFT   16
 
#define DSI_WPCR1_HSTXSRCCL_MASK   0x3
 
#define DSI_WPCR1_SDDC   (1 << 12)
 
#define DSI_WPCR1_LPSRCDL_SHIFT   8
 
#define DSI_WPCR1_LPSRCDL_MASK   0x3
 
#define DSI_WPCR1_HSTXDDL_SHIFT   2
 
#define DSI_WPCR1_HSTXDDL_MASK   0x3
 
#define DSI_WPCR1_HSTXDCL_SHIFT   0
 
#define DSI_WPCR1_HSTXDCL_MASK   0x3
 
#define DSI_WPCR2   MMIO32(DSI_BASE + 0x420U)
 DSI Wrapper PHY Configuration Register 2. More...
 
#define DSI_WPCR2_THSTRAIL_SHIFT   24
 
#define DSI_WPCR2_THSTRAIL_MASK   0xff
 
#define DSI_WPCR2_THSPREP_SHIFT   16
 
#define DSI_WPCR2_THSPREP_MASK   0xff
 
#define DSI_WPCR2_TCLKZERO_SHIFT   8
 
#define DSI_WPCR2_TCLKZERO_MASK   0xff
 
#define DSI_WPCR2_TCLKPREP_SHIFT   0
 
#define DSI_WPCR2_TCLKPREP_MASK   0xff
 
#define DSI_WPCR3   MMIO32(DSI_BASE + 0x424U)
 DSI Wrapper PHY Configuration Register 3. More...
 
#define DSI_WPCR3_TLPXC_SHIFT   24
 
#define DSI_WPCR3_TLPXC_MASK   0xff
 
#define DSI_WPCR3_THSEXIT_SHIFT   16
 
#define DSI_WPCR3_THSEXIT_MASK   0xff
 
#define DSI_WPCR3_TLPXD_SHIFT   8
 
#define DSI_WPCR3_TLPXD_MASK   0xff
 
#define DSI_WPCR3_THSZERO_SHIFT   0
 
#define DSI_WPCR3_THSZERO_MASK   0xff
 
#define DSI_WPCR4   MMIO32(DSI_BASE + 0x428U)
 DSI Wrapper PHY Configuration Register 4. More...
 
#define DSI_WPCR4_TCLKPOST_SHIFT   0
 
#define DSI_WPCR4_TCLKPOST_MASK   0xff
 
#define DSI_WRPCR   MMIO32(DSI_BASE + 0x430U)
 DSI Wrapper Regulator and PLL Control Register. More...
 
#define DSI_WRPCR_REGEN   (1 << 24)
 
#define DSI_WRPCR_ODF_SHIFT   16
 
#define DSI_WRPCR_ODF_MASK   0x3
 
#define DSI_WRPCR_ODF_DIV_1   0
 
#define DSI_WRPCR_ODF_DIV_2   1
 
#define DSI_WRPCR_ODF_DIV_4   2
 
#define DSI_WRPCR_ODF_DIV_8   3
 
#define DSI_WRPCR_IDF_SHIFT   11
 
#define DSI_WRPCR_IDF_MASK   0xf
 
#define DSI_WRPCR_IDF_DIV_1   1
 
#define DSI_WRPCR_IDF_DIV_2   2
 
#define DSI_WRPCR_IDF_DIV_3   3
 
#define DSI_WRPCR_IDF_DIV_4   4
 
#define DSI_WRPCR_IDF_DIV_5   5
 
#define DSI_WRPCR_IDF_DIV_6   6
 
#define DSI_WRPCR_IDF_DIV_7   7
 
#define DSI_WRPCR_NDIV_SHIFT   2
 
#define DSI_WRPCR_NDIV_MASK   0x7f
 
#define DSI_WRPCR_PLLEN   (1 << 0)
 

Detailed Description

Defines Constants and Macros for the STM32F7xx Display Serial Interface Host and Wrapper

Version
1.0.0
Date
7 July 2016
Author
© 2016 Chuck McManis cmcma.nosp@m.nis@.nosp@m.mcman.nosp@m.is.c.nosp@m.om

This library supports the Display Serial Interface Host and Wrapper in the STM32F4xx and STM32F7xx series of ARM Cortex Microcontrollers by ST Microelectronics.

LGPL License Terms libopencm3 License

Macro Definition Documentation

◆ DSI_CCR

#define DSI_CCR   MMIO32(DSI_BASE + 0x8U)

DSI Host Clock Control Register.

Definition at line 64 of file dsi_common_f47.h.

◆ DSI_CCR_TOCKDIV_MASK

#define DSI_CCR_TOCKDIV_MASK   0xff

Definition at line 66 of file dsi_common_f47.h.

◆ DSI_CCR_TOCKDIV_SHIFT

#define DSI_CCR_TOCKDIV_SHIFT   8

Definition at line 65 of file dsi_common_f47.h.

◆ DSI_CCR_TXECKDIV_MASK

#define DSI_CCR_TXECKDIV_MASK   0xff

Definition at line 68 of file dsi_common_f47.h.

◆ DSI_CCR_TXECKDIV_SHIFT

#define DSI_CCR_TXECKDIV_SHIFT   0

Definition at line 67 of file dsi_common_f47.h.

◆ DSI_CLCR

#define DSI_CLCR   MMIO32(DSI_BASE + 0x94U)

DSI Host Clock Lane Configuration Register.

Definition at line 335 of file dsi_common_f47.h.

◆ DSI_CLCR_ACR

#define DSI_CLCR_ACR   (1 << 1)

Definition at line 336 of file dsi_common_f47.h.

◆ DSI_CLCR_DPCC

#define DSI_CLCR_DPCC   (1 << 0)

Definition at line 337 of file dsi_common_f47.h.

◆ DSI_CLTCR

#define DSI_CLTCR   MMIO32(DSI_BASE + 0x98U)

DSI Host Clock Lane Timer Configuration Register.

Definition at line 342 of file dsi_common_f47.h.

◆ DSI_CLTCR_HS2LP_TIME_MASK

#define DSI_CLTCR_HS2LP_TIME_MASK   0x3ff

Definition at line 344 of file dsi_common_f47.h.

◆ DSI_CLTCR_HS2LP_TIME_SHIFT

#define DSI_CLTCR_HS2LP_TIME_SHIFT   16

Definition at line 343 of file dsi_common_f47.h.

◆ DSI_CLTCR_LP2HS_TIME_MASK

#define DSI_CLTCR_LP2HS_TIME_MASK   0x3ff

Definition at line 346 of file dsi_common_f47.h.

◆ DSI_CLTCR_LP2HS_TIME_SHIFT

#define DSI_CLTCR_LP2HS_TIME_SHIFT   0

Definition at line 345 of file dsi_common_f47.h.

◆ DSI_CMCR

#define DSI_CMCR   MMIO32(DSI_BASE + 0x68U)

DSI Host Command mode Configuration Register.

Definition at line 226 of file dsi_common_f47.h.

◆ DSI_CMCR_ARE

#define DSI_CMCR_ARE   (1 << 1)

Definition at line 241 of file dsi_common_f47.h.

◆ DSI_CMCR_DLWTX

#define DSI_CMCR_DLWTX   (1 << 19)

Definition at line 228 of file dsi_common_f47.h.

◆ DSI_CMCR_DSR0TX

#define DSI_CMCR_DSR0TX   (1 << 18)

Definition at line 229 of file dsi_common_f47.h.

◆ DSI_CMCR_DSW0TX

#define DSI_CMCR_DSW0TX   (1 << 16)

Definition at line 231 of file dsi_common_f47.h.

◆ DSI_CMCR_DSW1TX

#define DSI_CMCR_DSW1TX   (1 << 17)

Definition at line 230 of file dsi_common_f47.h.

◆ DSI_CMCR_GLWTX

#define DSI_CMCR_GLWTX   (1 << 14)

Definition at line 233 of file dsi_common_f47.h.

◆ DSI_CMCR_GSR0TX

#define DSI_CMCR_GSR0TX   (1 << 11)

Definition at line 236 of file dsi_common_f47.h.

◆ DSI_CMCR_GSR1TX

#define DSI_CMCR_GSR1TX   (1 << 12)

Definition at line 235 of file dsi_common_f47.h.

◆ DSI_CMCR_GSR2TX

#define DSI_CMCR_GSR2TX   (1 << 13)

Definition at line 234 of file dsi_common_f47.h.

◆ DSI_CMCR_GSW0TX

#define DSI_CMCR_GSW0TX   (1 << 8)

Definition at line 239 of file dsi_common_f47.h.

◆ DSI_CMCR_GSW1TX

#define DSI_CMCR_GSW1TX   (1 << 9)

Definition at line 238 of file dsi_common_f47.h.

◆ DSI_CMCR_GSW2TX

#define DSI_CMCR_GSW2TX   (1 << 10)

Definition at line 237 of file dsi_common_f47.h.

◆ DSI_CMCR_MRDPS

#define DSI_CMCR_MRDPS   (1 << 24)

Definition at line 227 of file dsi_common_f47.h.

◆ DSI_CMCR_TEARE

#define DSI_CMCR_TEARE   (1 << 0)

Definition at line 242 of file dsi_common_f47.h.

◆ DSI_CR

#define DSI_CR   MMIO32(DSI_BASE + 0x4U)

DSI Host Control Register.

Definition at line 58 of file dsi_common_f47.h.

◆ DSI_CR_EN

#define DSI_CR_EN   (1 << 0)

Definition at line 59 of file dsi_common_f47.h.

◆ DSI_DLTCR

#define DSI_DLTCR   MMIO32(DSI_BASE + 0x9CU)

DSI Host Data Lane Time Configuration Register.

Definition at line 351 of file dsi_common_f47.h.

◆ DSI_DLTCR_HS2LP_TIME_MASK

#define DSI_DLTCR_HS2LP_TIME_MASK   0xff

Definition at line 353 of file dsi_common_f47.h.

◆ DSI_DLTCR_HS2LP_TIME_SHIFT

#define DSI_DLTCR_HS2LP_TIME_SHIFT   24

Definition at line 352 of file dsi_common_f47.h.

◆ DSI_DLTCR_LP2HS_TIME_MASK

#define DSI_DLTCR_LP2HS_TIME_MASK   0xff

Definition at line 355 of file dsi_common_f47.h.

◆ DSI_DLTCR_LP2HS_TIME_SHIFT

#define DSI_DLTCR_LP2HS_TIME_SHIFT   16

Definition at line 354 of file dsi_common_f47.h.

◆ DSI_DLTCR_MRD_TIME_MASK

#define DSI_DLTCR_MRD_TIME_MASK   0x7fff

Definition at line 357 of file dsi_common_f47.h.

◆ DSI_DLTCR_MRD_TIME_SHIFT

#define DSI_DLTCR_MRD_TIME_SHIFT   0

Definition at line 356 of file dsi_common_f47.h.

◆ DSI_FIR0

#define DSI_FIR0   MMIO32(DSI_BASE + 0xD8U)

DSI Host Force Interrupt Register 0.

Definition at line 501 of file dsi_common_f47.h.

◆ DSI_FIR0_FAE0

#define DSI_FIR0_FAE0   (1 << 0)

Definition at line 522 of file dsi_common_f47.h.

◆ DSI_FIR0_FAE1

#define DSI_FIR0_FAE1   (1 << 1)

Definition at line 521 of file dsi_common_f47.h.

◆ DSI_FIR0_FAE10

#define DSI_FIR0_FAE10   (1 << 10)

Definition at line 512 of file dsi_common_f47.h.

◆ DSI_FIR0_FAE11

#define DSI_FIR0_FAE11   (1 << 11)

Definition at line 511 of file dsi_common_f47.h.

◆ DSI_FIR0_FAE12

#define DSI_FIR0_FAE12   (1 << 12)

Definition at line 510 of file dsi_common_f47.h.

◆ DSI_FIR0_FAE13

#define DSI_FIR0_FAE13   (1 << 13)

Definition at line 509 of file dsi_common_f47.h.

◆ DSI_FIR0_FAE14

#define DSI_FIR0_FAE14   (1 << 14)

Definition at line 508 of file dsi_common_f47.h.

◆ DSI_FIR0_FAE15

#define DSI_FIR0_FAE15   (1 << 15)

Definition at line 507 of file dsi_common_f47.h.

◆ DSI_FIR0_FAE2

#define DSI_FIR0_FAE2   (1 << 2)

Definition at line 520 of file dsi_common_f47.h.

◆ DSI_FIR0_FAE3

#define DSI_FIR0_FAE3   (1 << 3)

Definition at line 519 of file dsi_common_f47.h.

◆ DSI_FIR0_FAE4

#define DSI_FIR0_FAE4   (1 << 4)

Definition at line 518 of file dsi_common_f47.h.

◆ DSI_FIR0_FAE5

#define DSI_FIR0_FAE5   (1 << 5)

Definition at line 517 of file dsi_common_f47.h.

◆ DSI_FIR0_FAE6

#define DSI_FIR0_FAE6   (1 << 6)

Definition at line 516 of file dsi_common_f47.h.

◆ DSI_FIR0_FAE7

#define DSI_FIR0_FAE7   (1 << 7)

Definition at line 515 of file dsi_common_f47.h.

◆ DSI_FIR0_FAE8

#define DSI_FIR0_FAE8   (1 << 8)

Definition at line 514 of file dsi_common_f47.h.

◆ DSI_FIR0_FAE9

#define DSI_FIR0_FAE9   (1 << 9)

Definition at line 513 of file dsi_common_f47.h.

◆ DSI_FIR0_FPE0

#define DSI_FIR0_FPE0   (1 << 16)

Definition at line 506 of file dsi_common_f47.h.

◆ DSI_FIR0_FPE1

#define DSI_FIR0_FPE1   (1 << 17)

Definition at line 505 of file dsi_common_f47.h.

◆ DSI_FIR0_FPE2

#define DSI_FIR0_FPE2   (1 << 18)

Definition at line 504 of file dsi_common_f47.h.

◆ DSI_FIR0_FPE3

#define DSI_FIR0_FPE3   (1 << 19)

Definition at line 503 of file dsi_common_f47.h.

◆ DSI_FIR0_FPE4

#define DSI_FIR0_FPE4   (1 << 20)

Definition at line 502 of file dsi_common_f47.h.

◆ DSI_FIR1

#define DSI_FIR1   MMIO32(DSI_BASE + 0xDCU)

DSI Host Force Interrupt Register 1.

Definition at line 527 of file dsi_common_f47.h.

◆ DSI_FIR1_FCRCE

#define DSI_FIR1_FCRCE   (1 << 4)

Definition at line 536 of file dsi_common_f47.h.

◆ DSI_FIR1_FECCME

#define DSI_FIR1_FECCME   (1 << 3)

Definition at line 537 of file dsi_common_f47.h.

◆ DSI_FIR1_FECCSE

#define DSI_FIR1_FECCSE   (1 << 2)

Definition at line 538 of file dsi_common_f47.h.

◆ DSI_FIR1_FEOTPE

#define DSI_FIR1_FEOTPE   (1 << 6)

Definition at line 534 of file dsi_common_f47.h.

◆ DSI_FIR1_FGCWRE

#define DSI_FIR1_FGCWRE   (1 << 8)

Definition at line 532 of file dsi_common_f47.h.

◆ DSI_FIR1_FGPRDE

#define DSI_FIR1_FGPRDE   (1 << 11)

Definition at line 529 of file dsi_common_f47.h.

◆ DSI_FIR1_FGPRXE

#define DSI_FIR1_FGPRXE   (1 << 12)

Definition at line 528 of file dsi_common_f47.h.

◆ DSI_FIR1_FGPTXE

#define DSI_FIR1_FGPTXE   (1 << 10)

Definition at line 530 of file dsi_common_f47.h.

◆ DSI_FIR1_FGPWRE

#define DSI_FIR1_FGPWRE   (1 << 9)

Definition at line 531 of file dsi_common_f47.h.

◆ DSI_FIR1_FLPWRE

#define DSI_FIR1_FLPWRE   (1 << 7)

Definition at line 533 of file dsi_common_f47.h.

◆ DSI_FIR1_FPSE

#define DSI_FIR1_FPSE   (1 << 5)

Definition at line 535 of file dsi_common_f47.h.

◆ DSI_FIR1_FTOHSTX

#define DSI_FIR1_FTOHSTX   (1 << 0)

Definition at line 540 of file dsi_common_f47.h.

◆ DSI_FIR1_FTOLPRX

#define DSI_FIR1_FTOLPRX   (1 << 1)

Definition at line 539 of file dsi_common_f47.h.

◆ DSI_GHCR

#define DSI_GHCR   MMIO32(DSI_BASE + 0x6CU)

DSI Host Generic Header Configuration Register.

Definition at line 247 of file dsi_common_f47.h.

◆ DSI_GHCR_DATA0_MASK

#define DSI_GHCR_DATA0_MASK   0xff

Definition at line 255 of file dsi_common_f47.h.

◆ DSI_GHCR_DATA0_SHIFT

#define DSI_GHCR_DATA0_SHIFT   8 /* data 0 in 'short' mode */

Definition at line 254 of file dsi_common_f47.h.

◆ DSI_GHCR_DATA1_MASK

#define DSI_GHCR_DATA1_MASK   0xff

Definition at line 253 of file dsi_common_f47.h.

◆ DSI_GHCR_DATA1_SHIFT

#define DSI_GHCR_DATA1_SHIFT   16 /* data 1 in 'short' mode */

Definition at line 252 of file dsi_common_f47.h.

◆ DSI_GHCR_DT_MASK

#define DSI_GHCR_DT_MASK   0x3f

Definition at line 259 of file dsi_common_f47.h.

◆ DSI_GHCR_DT_SHIFT

#define DSI_GHCR_DT_SHIFT   0

Definition at line 258 of file dsi_common_f47.h.

◆ DSI_GHCR_VCID_MASK

#define DSI_GHCR_VCID_MASK   0x3

Definition at line 257 of file dsi_common_f47.h.

◆ DSI_GHCR_VCID_SHIFT

#define DSI_GHCR_VCID_SHIFT   6

Definition at line 256 of file dsi_common_f47.h.

◆ DSI_GHCR_WCLSB_MASK

#define DSI_GHCR_WCLSB_MASK   0xff

Definition at line 251 of file dsi_common_f47.h.

◆ DSI_GHCR_WCLSB_SHIFT

#define DSI_GHCR_WCLSB_SHIFT   8

Definition at line 250 of file dsi_common_f47.h.

◆ DSI_GHCR_WCMSB_MASK

#define DSI_GHCR_WCMSB_MASK   0xff

Definition at line 249 of file dsi_common_f47.h.

◆ DSI_GHCR_WCMSB_SHIFT

#define DSI_GHCR_WCMSB_SHIFT   16

Definition at line 248 of file dsi_common_f47.h.

◆ DSI_GPDR

#define DSI_GPDR   MMIO32(DSI_BASE + 0x70U)

DSI Host Generic Payload Data Register.

Definition at line 264 of file dsi_common_f47.h.

◆ DSI_GPDR_BYTE1_MASK

#define DSI_GPDR_BYTE1_MASK   0xff

Definition at line 272 of file dsi_common_f47.h.

◆ DSI_GPDR_BYTE1_SHIFT

#define DSI_GPDR_BYTE1_SHIFT   0

Definition at line 271 of file dsi_common_f47.h.

◆ DSI_GPDR_BYTE2_MASK

#define DSI_GPDR_BYTE2_MASK   0xff

Definition at line 270 of file dsi_common_f47.h.

◆ DSI_GPDR_BYTE2_SHIFT

#define DSI_GPDR_BYTE2_SHIFT   8

Definition at line 269 of file dsi_common_f47.h.

◆ DSI_GPDR_BYTE3_MASK

#define DSI_GPDR_BYTE3_MASK   0xff

Definition at line 268 of file dsi_common_f47.h.

◆ DSI_GPDR_BYTE3_SHIFT

#define DSI_GPDR_BYTE3_SHIFT   16

Definition at line 267 of file dsi_common_f47.h.

◆ DSI_GPDR_BYTE4_MASK

#define DSI_GPDR_BYTE4_MASK   0xff

Definition at line 266 of file dsi_common_f47.h.

◆ DSI_GPDR_BYTE4_SHIFT

#define DSI_GPDR_BYTE4_SHIFT   24

Definition at line 265 of file dsi_common_f47.h.

◆ DSI_GPSR

#define DSI_GPSR   MMIO32(DSI_BASE + 0x74U)

DSI Host Generate Packet Status Register.

Definition at line 277 of file dsi_common_f47.h.

◆ DSI_GPSR_CMDFE

#define DSI_GPSR_CMDFE   (1 << 0)

Definition at line 285 of file dsi_common_f47.h.

◆ DSI_GPSR_CMDFF

#define DSI_GPSR_CMDFF   (1 << 1)

Definition at line 284 of file dsi_common_f47.h.

◆ DSI_GPSR_PRDFE

#define DSI_GPSR_PRDFE   (1 << 4)

Definition at line 281 of file dsi_common_f47.h.

◆ DSI_GPSR_PRDFF

#define DSI_GPSR_PRDFF   (1 << 5)

Definition at line 280 of file dsi_common_f47.h.

◆ DSI_GPSR_PWRFE

#define DSI_GPSR_PWRFE   (1 << 2)

Definition at line 283 of file dsi_common_f47.h.

◆ DSI_GPSR_PWRFF

#define DSI_GPSR_PWRFF   (1 << 3)

Definition at line 282 of file dsi_common_f47.h.

◆ DSI_GPSR_RCB

#define DSI_GPSR_RCB   (1 << 6)

Definition at line 279 of file dsi_common_f47.h.

◆ DSI_GVCIDR

#define DSI_GVCIDR   MMIO32(DSI_BASE + 0x30U)

DSI Host Generic VCID Register.

Definition at line 115 of file dsi_common_f47.h.

◆ DSI_GVCIDR_VCID_MASK

#define DSI_GVCIDR_VCID_MASK   0x3

Definition at line 117 of file dsi_common_f47.h.

◆ DSI_GVCIDR_VCID_SHIFT

#define DSI_GVCIDR_VCID_SHIFT   0

Definition at line 116 of file dsi_common_f47.h.

◆ DSI_IER0

#define DSI_IER0   MMIO32(DSI_BASE + 0xC4U)

DSI Host Interrupt Enable Register 0.

Definition at line 457 of file dsi_common_f47.h.

◆ DSI_IER0_AE0IE

#define DSI_IER0_AE0IE   (1 << 0)

Definition at line 478 of file dsi_common_f47.h.

◆ DSI_IER0_AE10IE

#define DSI_IER0_AE10IE   (1 << 10)

Definition at line 468 of file dsi_common_f47.h.

◆ DSI_IER0_AE11IE

#define DSI_IER0_AE11IE   (1 << 11)

Definition at line 467 of file dsi_common_f47.h.

◆ DSI_IER0_AE12IE

#define DSI_IER0_AE12IE   (1 << 12)

Definition at line 466 of file dsi_common_f47.h.

◆ DSI_IER0_AE13IE

#define DSI_IER0_AE13IE   (1 << 13)

Definition at line 465 of file dsi_common_f47.h.

◆ DSI_IER0_AE14IE

#define DSI_IER0_AE14IE   (1 << 14)

Definition at line 464 of file dsi_common_f47.h.

◆ DSI_IER0_AE15IE

#define DSI_IER0_AE15IE   (1 << 15)

Definition at line 463 of file dsi_common_f47.h.

◆ DSI_IER0_AE1IE

#define DSI_IER0_AE1IE   (1 << 1)

Definition at line 477 of file dsi_common_f47.h.

◆ DSI_IER0_AE2IE

#define DSI_IER0_AE2IE   (1 << 2)

Definition at line 476 of file dsi_common_f47.h.

◆ DSI_IER0_AE3IE

#define DSI_IER0_AE3IE   (1 << 3)

Definition at line 475 of file dsi_common_f47.h.

◆ DSI_IER0_AE4IE

#define DSI_IER0_AE4IE   (1 << 4)

Definition at line 474 of file dsi_common_f47.h.

◆ DSI_IER0_AE5IE

#define DSI_IER0_AE5IE   (1 << 5)

Definition at line 473 of file dsi_common_f47.h.

◆ DSI_IER0_AE6IE

#define DSI_IER0_AE6IE   (1 << 6)

Definition at line 472 of file dsi_common_f47.h.

◆ DSI_IER0_AE7IE

#define DSI_IER0_AE7IE   (1 << 7)

Definition at line 471 of file dsi_common_f47.h.

◆ DSI_IER0_AE8IE

#define DSI_IER0_AE8IE   (1 << 8)

Definition at line 470 of file dsi_common_f47.h.

◆ DSI_IER0_AE9IE

#define DSI_IER0_AE9IE   (1 << 9)

Definition at line 469 of file dsi_common_f47.h.

◆ DSI_IER0_PE0IE

#define DSI_IER0_PE0IE   (1 << 16)

Definition at line 462 of file dsi_common_f47.h.

◆ DSI_IER0_PE1IE

#define DSI_IER0_PE1IE   (1 << 17)

Definition at line 461 of file dsi_common_f47.h.

◆ DSI_IER0_PE2IE

#define DSI_IER0_PE2IE   (1 << 18)

Definition at line 460 of file dsi_common_f47.h.

◆ DSI_IER0_PE3IE

#define DSI_IER0_PE3IE   (1 << 19)

Definition at line 459 of file dsi_common_f47.h.

◆ DSI_IER0_PE4IE

#define DSI_IER0_PE4IE   (1 << 20)

Definition at line 458 of file dsi_common_f47.h.

◆ DSI_IER1

#define DSI_IER1   MMIO32(DSI_BASE + 0xC8U)

DSI Host Interrupt Enable Register 1.

Definition at line 483 of file dsi_common_f47.h.

◆ DSI_IER1_CRCEIE

#define DSI_IER1_CRCEIE   (1 << 4)

Definition at line 492 of file dsi_common_f47.h.

◆ DSI_IER1_ECCMEIE

#define DSI_IER1_ECCMEIE   (1 << 3)

Definition at line 493 of file dsi_common_f47.h.

◆ DSI_IER1_ECCSEIE

#define DSI_IER1_ECCSEIE   (1 << 2)

Definition at line 494 of file dsi_common_f47.h.

◆ DSI_IER1_EOTPEIE

#define DSI_IER1_EOTPEIE   (1 << 6)

Definition at line 490 of file dsi_common_f47.h.

◆ DSI_IER1_GCWREIE

#define DSI_IER1_GCWREIE   (1 << 8)

Definition at line 488 of file dsi_common_f47.h.

◆ DSI_IER1_GPRDEIE

#define DSI_IER1_GPRDEIE   (1 << 11)

Definition at line 485 of file dsi_common_f47.h.

◆ DSI_IER1_GPRXEIE

#define DSI_IER1_GPRXEIE   (1 << 12)

Definition at line 484 of file dsi_common_f47.h.

◆ DSI_IER1_GPTXEIE

#define DSI_IER1_GPTXEIE   (1 << 10)

Definition at line 486 of file dsi_common_f47.h.

◆ DSI_IER1_GPWREIE

#define DSI_IER1_GPWREIE   (1 << 9)

Definition at line 487 of file dsi_common_f47.h.

◆ DSI_IER1_LPWREIE

#define DSI_IER1_LPWREIE   (1 << 7)

Definition at line 489 of file dsi_common_f47.h.

◆ DSI_IER1_PSEIE

#define DSI_IER1_PSEIE   (1 << 5)

Definition at line 491 of file dsi_common_f47.h.

◆ DSI_IER1_TOHSTXIE

#define DSI_IER1_TOHSTXIE   (1 << 0)

Definition at line 496 of file dsi_common_f47.h.

◆ DSI_IER1_TOLPRXIE

#define DSI_IER1_TOLPRXIE   (1 << 1)

Definition at line 495 of file dsi_common_f47.h.

◆ DSI_ISR0

#define DSI_ISR0   MMIO32(DSI_BASE + 0xBCU)

DSI Host Interrupt & Status Register 0.

Definition at line 413 of file dsi_common_f47.h.

◆ DSI_ISR0_AE0

#define DSI_ISR0_AE0   (1 << 0)

Definition at line 434 of file dsi_common_f47.h.

◆ DSI_ISR0_AE1

#define DSI_ISR0_AE1   (1 << 1)

Definition at line 433 of file dsi_common_f47.h.

◆ DSI_ISR0_AE10

#define DSI_ISR0_AE10   (1 << 10)

Definition at line 424 of file dsi_common_f47.h.

◆ DSI_ISR0_AE11

#define DSI_ISR0_AE11   (1 << 11)

Definition at line 423 of file dsi_common_f47.h.

◆ DSI_ISR0_AE12

#define DSI_ISR0_AE12   (1 << 12)

Definition at line 422 of file dsi_common_f47.h.

◆ DSI_ISR0_AE13

#define DSI_ISR0_AE13   (1 << 13)

Definition at line 421 of file dsi_common_f47.h.

◆ DSI_ISR0_AE14

#define DSI_ISR0_AE14   (1 << 14)

Definition at line 420 of file dsi_common_f47.h.

◆ DSI_ISR0_AE15

#define DSI_ISR0_AE15   (1 << 15)

Definition at line 419 of file dsi_common_f47.h.

◆ DSI_ISR0_AE2

#define DSI_ISR0_AE2   (1 << 2)

Definition at line 432 of file dsi_common_f47.h.

◆ DSI_ISR0_AE3

#define DSI_ISR0_AE3   (1 << 3)

Definition at line 431 of file dsi_common_f47.h.

◆ DSI_ISR0_AE4

#define DSI_ISR0_AE4   (1 << 4)

Definition at line 430 of file dsi_common_f47.h.

◆ DSI_ISR0_AE5

#define DSI_ISR0_AE5   (1 << 5)

Definition at line 429 of file dsi_common_f47.h.

◆ DSI_ISR0_AE6

#define DSI_ISR0_AE6   (1 << 6)

Definition at line 428 of file dsi_common_f47.h.

◆ DSI_ISR0_AE7

#define DSI_ISR0_AE7   (1 << 7)

Definition at line 427 of file dsi_common_f47.h.

◆ DSI_ISR0_AE8

#define DSI_ISR0_AE8   (1 << 8)

Definition at line 426 of file dsi_common_f47.h.

◆ DSI_ISR0_AE9

#define DSI_ISR0_AE9   (1 << 9)

Definition at line 425 of file dsi_common_f47.h.

◆ DSI_ISR0_PE0

#define DSI_ISR0_PE0   (1 << 16)

Definition at line 418 of file dsi_common_f47.h.

◆ DSI_ISR0_PE1

#define DSI_ISR0_PE1   (1 << 17)

Definition at line 417 of file dsi_common_f47.h.

◆ DSI_ISR0_PE2

#define DSI_ISR0_PE2   (1 << 18)

Definition at line 416 of file dsi_common_f47.h.

◆ DSI_ISR0_PE3

#define DSI_ISR0_PE3   (1 << 19)

Definition at line 415 of file dsi_common_f47.h.

◆ DSI_ISR0_PE4

#define DSI_ISR0_PE4   (1 << 20)

Definition at line 414 of file dsi_common_f47.h.

◆ DSI_ISR1

#define DSI_ISR1   MMIO32(DSI_BASE + 0xC0U)

DSI Host Interrupt & Status Register 1.

Definition at line 439 of file dsi_common_f47.h.

◆ DSI_ISR1_CRCE

#define DSI_ISR1_CRCE   (1 << 4)

Definition at line 448 of file dsi_common_f47.h.

◆ DSI_ISR1_ECCME

#define DSI_ISR1_ECCME   (1 << 3)

Definition at line 449 of file dsi_common_f47.h.

◆ DSI_ISR1_ECCSE

#define DSI_ISR1_ECCSE   (1 << 2)

Definition at line 450 of file dsi_common_f47.h.

◆ DSI_ISR1_EOTPE

#define DSI_ISR1_EOTPE   (1 << 6)

Definition at line 446 of file dsi_common_f47.h.

◆ DSI_ISR1_GCWRE

#define DSI_ISR1_GCWRE   (1 << 8)

Definition at line 444 of file dsi_common_f47.h.

◆ DSI_ISR1_GPRDE

#define DSI_ISR1_GPRDE   (1 << 11)

Definition at line 441 of file dsi_common_f47.h.

◆ DSI_ISR1_GPRXE

#define DSI_ISR1_GPRXE   (1 << 12)

Definition at line 440 of file dsi_common_f47.h.

◆ DSI_ISR1_GPTXE

#define DSI_ISR1_GPTXE   (1 << 10)

Definition at line 442 of file dsi_common_f47.h.

◆ DSI_ISR1_GPWRE

#define DSI_ISR1_GPWRE   (1 << 9)

Definition at line 443 of file dsi_common_f47.h.

◆ DSI_ISR1_LPWRE

#define DSI_ISR1_LPWRE   (1 << 7)

Definition at line 445 of file dsi_common_f47.h.

◆ DSI_ISR1_PSE

#define DSI_ISR1_PSE   (1 << 5)

Definition at line 447 of file dsi_common_f47.h.

◆ DSI_ISR1_TOHSTX

#define DSI_ISR1_TOHSTX   (1 << 0)

Definition at line 452 of file dsi_common_f47.h.

◆ DSI_ISR1_TOLPRX

#define DSI_ISR1_TOLPRX   (1 << 1)

Definition at line 451 of file dsi_common_f47.h.

◆ DSI_LCCCR

#define DSI_LCCCR   MMIO32(DSI_BASE + 0x110U)

DSI Host LTCD Current Color Coding Register.

Definition at line 559 of file dsi_common_f47.h.

◆ DSI_LCCR

#define DSI_LCCR   MMIO32(DSI_BASE + 0x64U)

DSI Host LTDC Command Configuration Register.

Definition at line 219 of file dsi_common_f47.h.

◆ DSI_LCCR_CMDSIZE_MASK

#define DSI_LCCR_CMDSIZE_MASK   0xffff

Definition at line 221 of file dsi_common_f47.h.

◆ DSI_LCCR_CMDSIZE_SHIFT

#define DSI_LCCR_CMDSIZE_SHIFT   0

Definition at line 220 of file dsi_common_f47.h.

◆ DSI_LCCR_COLC_MASK

#define DSI_LCCR_COLC_MASK   0xf

Definition at line 562 of file dsi_common_f47.h.

◆ DSI_LCCR_COLC_SHIFT

#define DSI_LCCR_COLC_SHIFT   0

Definition at line 561 of file dsi_common_f47.h.

◆ DSI_LCCR_LPE

#define DSI_LCCR_LPE   (1 << 8)

Definition at line 560 of file dsi_common_f47.h.

◆ DSI_LCOLCR

#define DSI_LCOLCR   MMIO32(DSI_BASE + 0x10U)

DSI Host LTDC Color Coding Register.

Definition at line 80 of file dsi_common_f47.h.

◆ DSI_LCOLCR_COLC_MASK

#define DSI_LCOLCR_COLC_MASK   0xf

Definition at line 83 of file dsi_common_f47.h.

◆ DSI_LCOLCR_COLC_SHIFT

#define DSI_LCOLCR_COLC_SHIFT   0

Definition at line 82 of file dsi_common_f47.h.

◆ DSI_LCOLCR_LPE

#define DSI_LCOLCR_LPE   (1 << 8)

Definition at line 81 of file dsi_common_f47.h.

◆ DSI_LCVCIDR

#define DSI_LCVCIDR   MMIO32(DSI_BASE + 0x10CU)

DSI Host LTDC Current VCID Register.

Definition at line 552 of file dsi_common_f47.h.

◆ DSI_LCVCIDR_VCID_MASK

#define DSI_LCVCIDR_VCID_MASK   0x3

Definition at line 554 of file dsi_common_f47.h.

◆ DSI_LCVCIDR_VCID_SHIFT

#define DSI_LCVCIDR_VCID_SHIFT   0

Definition at line 553 of file dsi_common_f47.h.

◆ DSI_LPCR

#define DSI_LPCR   MMIO32(DSI_BASE + 0x14U)

DSI Host LTDC Polarity Configuration Register.

Definition at line 88 of file dsi_common_f47.h.

◆ DSI_LPCR_DEP

#define DSI_LPCR_DEP   (1 << 0)

Definition at line 91 of file dsi_common_f47.h.

◆ DSI_LPCR_HSP

#define DSI_LPCR_HSP   (1 << 2)

Definition at line 89 of file dsi_common_f47.h.

◆ DSI_LPCR_VSP

#define DSI_LPCR_VSP   (1 << 1)

Definition at line 90 of file dsi_common_f47.h.

◆ DSI_LPMCCR

#define DSI_LPMCCR   MMIO32(DSI_BASE + 0x118U)

DSI Host Low-power mode Current Configuration Register.

Definition at line 567 of file dsi_common_f47.h.

◆ DSI_LPMCCR_LPSIZE_MASK

#define DSI_LPMCCR_LPSIZE_MASK   0xff

Definition at line 569 of file dsi_common_f47.h.

◆ DSI_LPMCCR_LPSIZE_SHIFT

#define DSI_LPMCCR_LPSIZE_SHIFT   16

Definition at line 568 of file dsi_common_f47.h.

◆ DSI_LPMCCR_VLPSIZE_MASK

#define DSI_LPMCCR_VLPSIZE_MASK   0xff

Definition at line 571 of file dsi_common_f47.h.

◆ DSI_LPMCCR_VLPSIZE_SHIFT

#define DSI_LPMCCR_VLPSIZE_SHIFT   0

Definition at line 570 of file dsi_common_f47.h.

◆ DSI_LPMCR

#define DSI_LPMCR   MMIO32(DSI_BASE + 0x18U)

DSI Host Low-power Configuration Register.

Definition at line 96 of file dsi_common_f47.h.

◆ DSI_LPMCR_LPSIZE_MASK

#define DSI_LPMCR_LPSIZE_MASK   0xff

Definition at line 98 of file dsi_common_f47.h.

◆ DSI_LPMCR_LPSIZE_SHIFT

#define DSI_LPMCR_LPSIZE_SHIFT   16

Definition at line 97 of file dsi_common_f47.h.

◆ DSI_LPMCR_VLPSIZE_MASK

#define DSI_LPMCR_VLPSIZE_MASK   0xff

Definition at line 100 of file dsi_common_f47.h.

◆ DSI_LPMCR_VLPSIZE_SHIFT

#define DSI_LPMCR_VLPSIZE_SHIFT   0

Definition at line 99 of file dsi_common_f47.h.

◆ DSI_LVCIDR

#define DSI_LVCIDR   MMIO32(DSI_BASE + 0xcU)

DSI Host LTDC VCID Register.

Definition at line 73 of file dsi_common_f47.h.

◆ DSI_LVCIDR_VCID_MASK

#define DSI_LVCIDR_VCID_MASK   0x3

Definition at line 75 of file dsi_common_f47.h.

◆ DSI_LVCIDR_VCID_SHIFT

#define DSI_LVCIDR_VCID_SHIFT   0

Definition at line 74 of file dsi_common_f47.h.

◆ DSI_MCR

#define DSI_MCR   MMIO32(DSI_BASE + 0x34U)

DSI Host mode Configuration Register.

Definition at line 122 of file dsi_common_f47.h.

◆ DSI_MCR_CMDM

#define DSI_MCR_CMDM   (1 << 0)

Definition at line 123 of file dsi_common_f47.h.

◆ DSI_PCONFR

#define DSI_PCONFR   MMIO32(DSI_BASE + 0xA4U)

DSI Host PHY Configuration Register.

Definition at line 369 of file dsi_common_f47.h.

◆ DSI_PCONFR_NL_1LANE

#define DSI_PCONFR_NL_1LANE   0

Definition at line 374 of file dsi_common_f47.h.

◆ DSI_PCONFR_NL_2LANE

#define DSI_PCONFR_NL_2LANE   1

Definition at line 375 of file dsi_common_f47.h.

◆ DSI_PCONFR_NL_MASK

#define DSI_PCONFR_NL_MASK   0x3

Definition at line 373 of file dsi_common_f47.h.

◆ DSI_PCONFR_NL_SHIFT

#define DSI_PCONFR_NL_SHIFT   0

Definition at line 372 of file dsi_common_f47.h.

◆ DSI_PCONFR_SW_TIME_MASK

#define DSI_PCONFR_SW_TIME_MASK   0xff

Definition at line 371 of file dsi_common_f47.h.

◆ DSI_PCONFR_SW_TIME_SHIFT

#define DSI_PCONFR_SW_TIME_SHIFT   8

Definition at line 370 of file dsi_common_f47.h.

◆ DSI_PCR

#define DSI_PCR   MMIO32(DSI_BASE + 0x2cU)

DSI Host Protocol Configuration Register.

Definition at line 105 of file dsi_common_f47.h.

◆ DSI_PCR_BTAE

#define DSI_PCR_BTAE   (1 << 2)

Definition at line 108 of file dsi_common_f47.h.

◆ DSI_PCR_CRCRXE

#define DSI_PCR_CRCRXE   (1 << 4)

Definition at line 106 of file dsi_common_f47.h.

◆ DSI_PCR_ECCRXE

#define DSI_PCR_ECCRXE   (1 << 3)

Definition at line 107 of file dsi_common_f47.h.

◆ DSI_PCR_ETRXE

#define DSI_PCR_ETRXE   (1 << 1)

Definition at line 109 of file dsi_common_f47.h.

◆ DSI_PCR_ETTXE

#define DSI_PCR_ETTXE   (1 << 0)

Definition at line 110 of file dsi_common_f47.h.

◆ DSI_PCTLR

#define DSI_PCTLR   MMIO32(DSI_BASE + 0xA0U)

DSI Host PHY Control Register.

Definition at line 362 of file dsi_common_f47.h.

◆ DSI_PCTLR_CKE

#define DSI_PCTLR_CKE   (1 << 2)

Definition at line 363 of file dsi_common_f47.h.

◆ DSI_PCTLR_DEN

#define DSI_PCTLR_DEN   (1 << 1)

Definition at line 364 of file dsi_common_f47.h.

◆ DSI_PSR

#define DSI_PSR   MMIO32(DSI_BASE + 0xB0U)

DSI Host PHY Status Register.

Definition at line 400 of file dsi_common_f47.h.

◆ DSI_PSR_PD

#define DSI_PSR_PD   (1 << 1)

Definition at line 408 of file dsi_common_f47.h.

◆ DSI_PSR_PSS0

#define DSI_PSR_PSS0   (1 << 4)

Definition at line 405 of file dsi_common_f47.h.

◆ DSI_PSR_PSS1

#define DSI_PSR_PSS1   (1 << 7)

Definition at line 402 of file dsi_common_f47.h.

◆ DSI_PSR_PSSC

#define DSI_PSR_PSSC   (1 << 2)

Definition at line 407 of file dsi_common_f47.h.

◆ DSI_PSR_RUE0

#define DSI_PSR_RUE0   (1 << 6)

Definition at line 403 of file dsi_common_f47.h.

◆ DSI_PSR_UAN0

#define DSI_PSR_UAN0   (1 << 5)

Definition at line 404 of file dsi_common_f47.h.

◆ DSI_PSR_UAN1

#define DSI_PSR_UAN1   (1 << 8)

Definition at line 401 of file dsi_common_f47.h.

◆ DSI_PSR_UANC

#define DSI_PSR_UANC   (1 << 3)

Definition at line 406 of file dsi_common_f47.h.

◆ DSI_PTTCR

#define DSI_PTTCR   MMIO32(DSI_BASE + 0xACU)

DSI Host PHY TX Triggers Configuration Register.

Definition at line 389 of file dsi_common_f47.h.

◆ DSI_PTTCR_TX_TRIG_1

#define DSI_PTTCR_TX_TRIG_1   0x1

Definition at line 392 of file dsi_common_f47.h.

◆ DSI_PTTCR_TX_TRIG_2

#define DSI_PTTCR_TX_TRIG_2   0x2

Definition at line 393 of file dsi_common_f47.h.

◆ DSI_PTTCR_TX_TRIG_3

#define DSI_PTTCR_TX_TRIG_3   0x4

Definition at line 394 of file dsi_common_f47.h.

◆ DSI_PTTCR_TX_TRIG_4

#define DSI_PTTCR_TX_TRIG_4   0x8

Definition at line 395 of file dsi_common_f47.h.

◆ DSI_PTTCR_TX_TRIG_MASK

#define DSI_PTTCR_TX_TRIG_MASK   0xf

Definition at line 391 of file dsi_common_f47.h.

◆ DSI_PTTCR_TX_TRIG_SHIFT

#define DSI_PTTCR_TX_TRIG_SHIFT   0

Definition at line 390 of file dsi_common_f47.h.

◆ DSI_PUCR

#define DSI_PUCR   MMIO32(DSI_BASE + 0xA8U)

DSI Host PHY ULPS Control Register.

Definition at line 380 of file dsi_common_f47.h.

◆ DSI_PUCR_UECL

#define DSI_PUCR_UECL   (1 << 1)

Definition at line 383 of file dsi_common_f47.h.

◆ DSI_PUCR_UEDL

#define DSI_PUCR_UEDL   (1 << 3)

Definition at line 381 of file dsi_common_f47.h.

◆ DSI_PUCR_URCL

#define DSI_PUCR_URCL   (1 << 0)

Definition at line 384 of file dsi_common_f47.h.

◆ DSI_PUCR_URDL

#define DSI_PUCR_URDL   (1 << 2)

Definition at line 382 of file dsi_common_f47.h.

◆ DSI_TCCR0

#define DSI_TCCR0   MMIO32(DSI_BASE + 0x78U)

DSI Host Timeout Counter Configuration Register.

Definition at line 290 of file dsi_common_f47.h.

◆ DSI_TCCR0_HSTX_TOCNT_MASK

#define DSI_TCCR0_HSTX_TOCNT_MASK   0xffff

Definition at line 292 of file dsi_common_f47.h.

◆ DSI_TCCR0_HSTX_TOCNT_SHIFT

#define DSI_TCCR0_HSTX_TOCNT_SHIFT   16

Definition at line 291 of file dsi_common_f47.h.

◆ DSI_TCCR0_LPRX_TOCNT_MASK

#define DSI_TCCR0_LPRX_TOCNT_MASK   0xffff

Definition at line 294 of file dsi_common_f47.h.

◆ DSI_TCCR0_LPRX_TOCNT_SHIFT

#define DSI_TCCR0_LPRX_TOCNT_SHIFT   0

Definition at line 293 of file dsi_common_f47.h.

◆ DSI_TCCR1

#define DSI_TCCR1   MMIO32(DSI_BASE + 0x7CU)

DSI Host Timeout Counter Configuration Register 1.

Definition at line 299 of file dsi_common_f47.h.

◆ DSI_TCCR1_HSRD_TOCNT_MASK

#define DSI_TCCR1_HSRD_TOCNT_MASK   0xffff

Definition at line 301 of file dsi_common_f47.h.

◆ DSI_TCCR1_HSRD_TOCNT_SHIFT

#define DSI_TCCR1_HSRD_TOCNT_SHIFT   0

Definition at line 300 of file dsi_common_f47.h.

◆ DSI_TCCR2

#define DSI_TCCR2   MMIO32(DSI_BASE + 0x80U)

DSI Host Timeout Counter Configuration Register 2.

Definition at line 306 of file dsi_common_f47.h.

◆ DSI_TCCR2_LPRD_TOCNT_MASK

#define DSI_TCCR2_LPRD_TOCNT_MASK   0xffff

Definition at line 308 of file dsi_common_f47.h.

◆ DSI_TCCR2_LPRD_TOCNT_SHIFT

#define DSI_TCCR2_LPRD_TOCNT_SHIFT   0

Definition at line 307 of file dsi_common_f47.h.

◆ DSI_TCCR3

#define DSI_TCCR3   MMIO32(DSI_BASE + 0x84U)

DSI Host Timeout Counter Configuration Register 3.

Definition at line 313 of file dsi_common_f47.h.

◆ DSI_TCCR3_HSWR_TOCNT_MASK

#define DSI_TCCR3_HSWR_TOCNT_MASK   0xffff

Definition at line 316 of file dsi_common_f47.h.

◆ DSI_TCCR3_HSWR_TOCNT_SHIFT

#define DSI_TCCR3_HSWR_TOCNT_SHIFT   0

Definition at line 315 of file dsi_common_f47.h.

◆ DSI_TCCR3_PM

#define DSI_TCCR3_PM   (1 << 24)

Definition at line 314 of file dsi_common_f47.h.

◆ DSI_TCCR4

#define DSI_TCCR4   MMIO32(DSI_BASE + 0x88U)

DSI Host Timeout Counter Configuration Register 4.

Definition at line 321 of file dsi_common_f47.h.

◆ DSI_TCCR4_LPWR_TOCNT_MASK

#define DSI_TCCR4_LPWR_TOCNT_MASK   0xffff

Definition at line 323 of file dsi_common_f47.h.

◆ DSI_TCCR4_LPWR_TOCNT_SHIFT

#define DSI_TCCR4_LPWR_TOCNT_SHIFT   0

Definition at line 322 of file dsi_common_f47.h.

◆ DSI_TCCR5

#define DSI_TCCR5   MMIO32(DSI_BASE + 0x8CU)

DSI Host Timeout Counter Configuration Register 5.

Definition at line 328 of file dsi_common_f47.h.

◆ DSI_TCCR5_BTA_TOCNT_MASK

#define DSI_TCCR5_BTA_TOCNT_MASK   0xffff

Definition at line 330 of file dsi_common_f47.h.

◆ DSI_TCCR5_BTA_TOCNT_SHIFT

#define DSI_TCCR5_BTA_TOCNT_SHIFT   0

Definition at line 329 of file dsi_common_f47.h.

◆ DSI_VCCCR

#define DSI_VCCCR   MMIO32(DSI_BASE + 0x140U)

DSI Host Video Chunks Current Configuration Register.

Definition at line 598 of file dsi_common_f47.h.

◆ DSI_VCCCR_NUMC_MASK

#define DSI_VCCCR_NUMC_MASK   0x1fff

Definition at line 600 of file dsi_common_f47.h.

◆ DSI_VCCCR_NUMC_SHIFT

#define DSI_VCCCR_NUMC_SHIFT   0

Definition at line 599 of file dsi_common_f47.h.

◆ DSI_VCCR

#define DSI_VCCR   MMIO32(DSI_BASE + 0x40U)

DSI Host Video Chunks Configuration Register.

Definition at line 156 of file dsi_common_f47.h.

◆ DSI_VCCR_NUMC_MASK

#define DSI_VCCR_NUMC_MASK   0x1fff

Definition at line 158 of file dsi_common_f47.h.

◆ DSI_VCCR_NUMC_SHIFT

#define DSI_VCCR_NUMC_SHIFT   0

Definition at line 157 of file dsi_common_f47.h.

◆ DSI_VHBPCCR

#define DSI_VHBPCCR   MMIO32(DSI_BASE + 0x14CU)

DSI Host Video HBP Current Configuration Register.

Definition at line 619 of file dsi_common_f47.h.

◆ DSI_VHBPCCR_HBP_MASK

#define DSI_VHBPCCR_HBP_MASK   0xfff

Definition at line 621 of file dsi_common_f47.h.

◆ DSI_VHBPCCR_HBP_SHIFT

#define DSI_VHBPCCR_HBP_SHIFT   0

Definition at line 620 of file dsi_common_f47.h.

◆ DSI_VHBPCR

#define DSI_VHBPCR   MMIO32(DSI_BASE + 0x4CU)

DSI Host Video HBP Configuration Register.

Definition at line 177 of file dsi_common_f47.h.

◆ DSI_VHBPCR_HBP_MASK

#define DSI_VHBPCR_HBP_MASK   0xfff

Definition at line 179 of file dsi_common_f47.h.

◆ DSI_VHBPCR_HBP_SHIFT

#define DSI_VHBPCR_HBP_SHIFT   0

Definition at line 178 of file dsi_common_f47.h.

◆ DSI_VHSACCR

#define DSI_VHSACCR   MMIO32(DSI_BASE + 0x148U)

DSI Host Video HSA Current Configuration Register.

Definition at line 612 of file dsi_common_f47.h.

◆ DSI_VHSACCR_HSA_MASK

#define DSI_VHSACCR_HSA_MASK   0xfff

Definition at line 614 of file dsi_common_f47.h.

◆ DSI_VHSACCR_HSA_SHIFT

#define DSI_VHSACCR_HSA_SHIFT   0

Definition at line 613 of file dsi_common_f47.h.

◆ DSI_VHSACR

#define DSI_VHSACR   MMIO32(DSI_BASE + 0x48U)

DSI Host Video HSA Configuration Register.

Definition at line 170 of file dsi_common_f47.h.

◆ DSI_VHSACR_HSA_MASK

#define DSI_VHSACR_HSA_MASK   0xfff

Definition at line 172 of file dsi_common_f47.h.

◆ DSI_VHSACR_HSA_SHIFT

#define DSI_VHSACR_HSA_SHIFT   0

Definition at line 171 of file dsi_common_f47.h.

◆ DSI_VLCCR

#define DSI_VLCCR   MMIO32(DSI_BASE + 0x150U)

DSI Host Video Line Current Configuration Register.

Definition at line 626 of file dsi_common_f47.h.

◆ DSI_VLCCR_HLINE_MASK

#define DSI_VLCCR_HLINE_MASK   0x7fff

Definition at line 628 of file dsi_common_f47.h.

◆ DSI_VLCCR_HLINE_SHIFT

#define DSI_VLCCR_HLINE_SHIFT   0

Definition at line 627 of file dsi_common_f47.h.

◆ DSI_VLCR

#define DSI_VLCR   MMIO32(DSI_BASE + 0x50U)

DSI Host Video Line Configuration Register.

Definition at line 184 of file dsi_common_f47.h.

◆ DSI_VLCR_HLINE_MASK

#define DSI_VLCR_HLINE_MASK   0x7fff

Definition at line 186 of file dsi_common_f47.h.

◆ DSI_VLCR_HLINE_SHIFT

#define DSI_VLCR_HLINE_SHIFT   0

Definition at line 185 of file dsi_common_f47.h.

◆ DSI_VMCCR

#define DSI_VMCCR   MMIO32(DSI_BASE + 0x138U)

DSI Host Video mode Current Configuration Register.

Definition at line 576 of file dsi_common_f47.h.

◆ DSI_VMCCR_FBTAAE

#define DSI_VMCCR_FBTAAE   (1 << 8)

Definition at line 578 of file dsi_common_f47.h.

◆ DSI_VMCCR_LPCE

#define DSI_VMCCR_LPCE   (1 << 9)

Definition at line 577 of file dsi_common_f47.h.

◆ DSI_VMCCR_LPHBPE

#define DSI_VMCCR_LPHBPE   (1 << 6)

Definition at line 580 of file dsi_common_f47.h.

◆ DSI_VMCCR_LPHFE

#define DSI_VMCCR_LPHFE   (1 << 7)

Definition at line 579 of file dsi_common_f47.h.

◆ DSI_VMCCR_LPVAE

#define DSI_VMCCR_LPVAE   (1 << 5)

Definition at line 581 of file dsi_common_f47.h.

◆ DSI_VMCCR_LPVBPE

#define DSI_VMCCR_LPVBPE   (1 << 3)

Definition at line 583 of file dsi_common_f47.h.

◆ DSI_VMCCR_LPVFPE

#define DSI_VMCCR_LPVFPE   (1 << 4)

Definition at line 582 of file dsi_common_f47.h.

◆ DSI_VMCCR_LPVSAE

#define DSI_VMCCR_LPVSAE   (1 << 2)

Definition at line 584 of file dsi_common_f47.h.

◆ DSI_VMCCR_VMT_MASK

#define DSI_VMCCR_VMT_MASK   0x3

Definition at line 586 of file dsi_common_f47.h.

◆ DSI_VMCCR_VMT_SHIFT

#define DSI_VMCCR_VMT_SHIFT   0

Definition at line 585 of file dsi_common_f47.h.

◆ DSI_VMCR

#define DSI_VMCR   MMIO32(DSI_BASE + 0x38U)

DSI Host Video mode Configuration Register.

Definition at line 128 of file dsi_common_f47.h.

◆ DSI_VMCR_FBTAAE

#define DSI_VMCR_FBTAAE   (1 << 14)

Definition at line 133 of file dsi_common_f47.h.

◆ DSI_VMCR_LPCE

#define DSI_VMCR_LPCE   (1 << 15)

Definition at line 132 of file dsi_common_f47.h.

◆ DSI_VMCR_LPHBPE

#define DSI_VMCR_LPHBPE   (1 << 12)

Definition at line 135 of file dsi_common_f47.h.

◆ DSI_VMCR_LPHFPE

#define DSI_VMCR_LPHFPE   (1 << 13)

Definition at line 134 of file dsi_common_f47.h.

◆ DSI_VMCR_LPVAE

#define DSI_VMCR_LPVAE   (1 << 11)

Definition at line 136 of file dsi_common_f47.h.

◆ DSI_VMCR_LPVBPE

#define DSI_VMCR_LPVBPE   (1 << 9)

Definition at line 138 of file dsi_common_f47.h.

◆ DSI_VMCR_LPVFPE

#define DSI_VMCR_LPVFPE   (1 << 10)

Definition at line 137 of file dsi_common_f47.h.

◆ DSI_VMCR_LPVSAE

#define DSI_VMCR_LPVSAE   (1 << 8)

Definition at line 139 of file dsi_common_f47.h.

◆ DSI_VMCR_PGE

#define DSI_VMCR_PGE   (1 << 16)

Definition at line 131 of file dsi_common_f47.h.

◆ DSI_VMCR_PGM

#define DSI_VMCR_PGM   (1 << 20)

Definition at line 130 of file dsi_common_f47.h.

◆ DSI_VMCR_PGO

#define DSI_VMCR_PGO   (1 << 24)

Definition at line 129 of file dsi_common_f47.h.

◆ DSI_VMCR_VMT_BURST

#define DSI_VMCR_VMT_BURST   0x2

Definition at line 144 of file dsi_common_f47.h.

◆ DSI_VMCR_VMT_MASK

#define DSI_VMCR_VMT_MASK   0x3

Definition at line 141 of file dsi_common_f47.h.

◆ DSI_VMCR_VMT_NON_BURSE_EVENT

#define DSI_VMCR_VMT_NON_BURSE_EVENT   0x1

Definition at line 143 of file dsi_common_f47.h.

◆ DSI_VMCR_VMT_NON_BURST_PULSE

#define DSI_VMCR_VMT_NON_BURST_PULSE   0x0

Definition at line 142 of file dsi_common_f47.h.

◆ DSI_VMCR_VMT_SHIFT

#define DSI_VMCR_VMT_SHIFT   0

Definition at line 140 of file dsi_common_f47.h.

◆ DSI_VNPCCR

#define DSI_VNPCCR   MMIO32(DSI_BASE + 0x144U)

DSI Host Video Null Packet Current Configuration Register.

Definition at line 605 of file dsi_common_f47.h.

◆ DSI_VNPCCR_NPSIZE_MASK

#define DSI_VNPCCR_NPSIZE_MASK   0x1fff

Definition at line 607 of file dsi_common_f47.h.

◆ DSI_VNPCCR_NPSIZE_SHIFT

#define DSI_VNPCCR_NPSIZE_SHIFT   0

Definition at line 606 of file dsi_common_f47.h.

◆ DSI_VNPCR

#define DSI_VNPCR   MMIO32(DSI_BASE + 0x44U)

DSI Host Video Null Packet Configuration Register.

Definition at line 163 of file dsi_common_f47.h.

◆ DSI_VNPCR_NPSIZE_MASK

#define DSI_VNPCR_NPSIZE_MASK   0x1fff

Definition at line 165 of file dsi_common_f47.h.

◆ DSI_VNPCR_NPSIZE_SHIFT

#define DSI_VNPCR_NPSIZE_SHIFT   0

Definition at line 164 of file dsi_common_f47.h.

◆ DSI_VPCCR

#define DSI_VPCCR   MMIO32(DSI_BASE + 0x13CU)

DSI Host Video Packet Current Configuration Register.

Definition at line 591 of file dsi_common_f47.h.

◆ DSI_VPCCR_VPSIZE_MASK

#define DSI_VPCCR_VPSIZE_MASK   0x3fff

Definition at line 593 of file dsi_common_f47.h.

◆ DSI_VPCCR_VPSIZE_SHIFT

#define DSI_VPCCR_VPSIZE_SHIFT   0

Definition at line 592 of file dsi_common_f47.h.

◆ DSI_VPCR

#define DSI_VPCR   MMIO32(DSI_BASE + 0x3CU)

DSI Host Video Packet Configuration Register.

Definition at line 149 of file dsi_common_f47.h.

◆ DSI_VPCR_VPSIZE_MASK

#define DSI_VPCR_VPSIZE_MASK   0x3fff

Definition at line 151 of file dsi_common_f47.h.

◆ DSI_VPCR_VPSIZE_SHIFT

#define DSI_VPCR_VPSIZE_SHIFT   0

Definition at line 150 of file dsi_common_f47.h.

◆ DSI_VR

#define DSI_VR   MMIO32(DSI_BASE + 0x0U)

DSI Host Version Register.

Definition at line 53 of file dsi_common_f47.h.

◆ DSI_VSCR

#define DSI_VSCR   MMIO32(DSI_BASE + 0x100U)

DSI Host Video Shadow Control Register.

Definition at line 545 of file dsi_common_f47.h.

◆ DSI_VSCR_EN

#define DSI_VSCR_EN   (1 << 0)

Definition at line 547 of file dsi_common_f47.h.

◆ DSI_VSCR_UR

#define DSI_VSCR_UR   (1 << 8)

Definition at line 546 of file dsi_common_f47.h.

◆ DSI_VVACCR

#define DSI_VVACCR   MMIO32(DSI_BASE + 0x160U)

DSI Host Video VA Current Configuration Register.

Definition at line 654 of file dsi_common_f47.h.

◆ DSI_VVACCR_VA_MASK

#define DSI_VVACCR_VA_MASK   0x3fff

Definition at line 656 of file dsi_common_f47.h.

◆ DSI_VVACCR_VA_SHIFT

#define DSI_VVACCR_VA_SHIFT   0

Definition at line 655 of file dsi_common_f47.h.

◆ DSI_VVACR

#define DSI_VVACR   MMIO32(DSI_BASE + 0x60U)

DSI Host Video VA Configuration Register.

Definition at line 212 of file dsi_common_f47.h.

◆ DSI_VVACR_VA_MASK

#define DSI_VVACR_VA_MASK   0x3fff

Definition at line 214 of file dsi_common_f47.h.

◆ DSI_VVACR_VA_SHIFT

#define DSI_VVACR_VA_SHIFT   0

Definition at line 213 of file dsi_common_f47.h.

◆ DSI_VVBPCCR

#define DSI_VVBPCCR   MMIO32(DSI_BASE + 0x0158U)

DSI Host Video VBP Current Configuration Register.

Definition at line 640 of file dsi_common_f47.h.

◆ DSI_VVBPCCR_VBP_MAST

#define DSI_VVBPCCR_VBP_MAST   0x3ff

Definition at line 642 of file dsi_common_f47.h.

◆ DSI_VVBPCCR_VBP_SHIFT

#define DSI_VVBPCCR_VBP_SHIFT   0

Definition at line 641 of file dsi_common_f47.h.

◆ DSI_VVBPCR

#define DSI_VVBPCR   MMIO32(DSI_BASE + 0x58U)

DSI Host Video VBP Configuration Register.

Definition at line 198 of file dsi_common_f47.h.

◆ DSI_VVBPCR_VBP_MASK

#define DSI_VVBPCR_VBP_MASK   0x3ff

Definition at line 200 of file dsi_common_f47.h.

◆ DSI_VVBPCR_VBP_SHIFT

#define DSI_VVBPCR_VBP_SHIFT   0

Definition at line 199 of file dsi_common_f47.h.

◆ DSI_VVFPCCR

#define DSI_VVFPCCR   MMIO32(DSI_BASE + 0x15CU)

DSI Host Video VFP Current Configuration Register.

Definition at line 647 of file dsi_common_f47.h.

◆ DSI_VVFPCCR_VFP_MASK

#define DSI_VVFPCCR_VFP_MASK   0x3ff

Definition at line 649 of file dsi_common_f47.h.

◆ DSI_VVFPCCR_VFP_SHIFT

#define DSI_VVFPCCR_VFP_SHIFT   0

Definition at line 648 of file dsi_common_f47.h.

◆ DSI_VVFPCR

#define DSI_VVFPCR   MMIO32(DSI_BASE + 0x5CU)

DSI Host Video VFP Configuration Register.

Definition at line 205 of file dsi_common_f47.h.

◆ DSI_VVFPCR_VFP_MASK

#define DSI_VVFPCR_VFP_MASK   0x3ff

Definition at line 207 of file dsi_common_f47.h.

◆ DSI_VVFPCR_VFP_SHIFT

#define DSI_VVFPCR_VFP_SHIFT   0

Definition at line 206 of file dsi_common_f47.h.

◆ DSI_VVSACCR

#define DSI_VVSACCR   MMIO32(DSI_BASE + 0x154U)

DSI Host Video VSA Current Configuration Register.

Definition at line 633 of file dsi_common_f47.h.

◆ DSI_VVSACCR_VSA_MASK

#define DSI_VVSACCR_VSA_MASK   0x3ff

Definition at line 635 of file dsi_common_f47.h.

◆ DSI_VVSACCR_VSA_SHIFT

#define DSI_VVSACCR_VSA_SHIFT   0

Definition at line 634 of file dsi_common_f47.h.

◆ DSI_VVSACR

#define DSI_VVSACR   MMIO32(DSI_BASE + 0x54U)

DSI Host Video VSA Configuration Register.

Definition at line 191 of file dsi_common_f47.h.

◆ DSI_VVSACR_VSA_MASK

#define DSI_VVSACR_VSA_MASK   0x3ff

Definition at line 193 of file dsi_common_f47.h.

◆ DSI_VVSACR_VSA_SHIFT

#define DSI_VVSACR_VSA_SHIFT   0

Definition at line 192 of file dsi_common_f47.h.

◆ DSI_WCFGR

#define DSI_WCFGR   MMIO32(DSI_BASE + 0x400U)

DSI Wrapper Configuration Register.

Definition at line 661 of file dsi_common_f47.h.

◆ DSI_WCFGR_AR

#define DSI_WCFGR_AR   (1 << 6)

Definition at line 663 of file dsi_common_f47.h.

◆ DSI_WCFGR_COLMUX_MASK

#define DSI_WCFGR_COLMUX_MASK   7

Definition at line 667 of file dsi_common_f47.h.

◆ DSI_WCFGR_COLMUX_SHIFT

#define DSI_WCFGR_COLMUX_SHIFT   1

Definition at line 666 of file dsi_common_f47.h.

◆ DSI_WCFGR_DSIM

#define DSI_WCFGR_DSIM   (1 << 0)

Definition at line 668 of file dsi_common_f47.h.

◆ DSI_WCFGR_TEPOL

#define DSI_WCFGR_TEPOL   (1 << 5)

Definition at line 664 of file dsi_common_f47.h.

◆ DSI_WCFGR_TESRC

#define DSI_WCFGR_TESRC   (1 << 4)

Definition at line 665 of file dsi_common_f47.h.

◆ DSI_WCFGR_VSPOL

#define DSI_WCFGR_VSPOL   (1 << 7)

Definition at line 662 of file dsi_common_f47.h.

◆ DSI_WCR

#define DSI_WCR   MMIO32(DSI_BASE + 0x404U)

DSI Wrapper Control Register.

Definition at line 673 of file dsi_common_f47.h.

◆ DSI_WCR_COLM

#define DSI_WCR_COLM   (1 << 0)

Definition at line 677 of file dsi_common_f47.h.

◆ DSI_WCR_DSIEN

#define DSI_WCR_DSIEN   (1 << 3)

Definition at line 674 of file dsi_common_f47.h.

◆ DSI_WCR_LTDCEN

#define DSI_WCR_LTDCEN   (1 << 2)

Definition at line 675 of file dsi_common_f47.h.

◆ DSI_WCR_SHTDN

#define DSI_WCR_SHTDN   (1 << 1)

Definition at line 676 of file dsi_common_f47.h.

◆ DSI_WIER

#define DSI_WIER   MMIO32(DSI_BASE + 0x408U)

DSI Wrapper Interrupt Enable Register.

Definition at line 682 of file dsi_common_f47.h.

◆ DSI_WIER_ERIE

#define DSI_WIER_ERIE   (1 << 1)

Definition at line 686 of file dsi_common_f47.h.

◆ DSI_WIER_PLLLIE

#define DSI_WIER_PLLLIE   (1 << 9)

Definition at line 685 of file dsi_common_f47.h.

◆ DSI_WIER_PLLUIE

#define DSI_WIER_PLLUIE   (1 << 10)

Definition at line 684 of file dsi_common_f47.h.

◆ DSI_WIER_RRIE

#define DSI_WIER_RRIE   (1 << 13)

Definition at line 683 of file dsi_common_f47.h.

◆ DSI_WIER_TEIE

#define DSI_WIER_TEIE   (1 << 0)

Definition at line 687 of file dsi_common_f47.h.

◆ DSI_WIFCR

#define DSI_WIFCR   MMIO32(DSI_BASE + 0x410U)

DSI Wrapper Interrupt Flag Clear Register.

Definition at line 707 of file dsi_common_f47.h.

◆ DSI_WIFCR_CERIF

#define DSI_WIFCR_CERIF   (1 << 1)

Definition at line 714 of file dsi_common_f47.h.

◆ DSI_WIFCR_CPLLLIF

#define DSI_WIFCR_CPLLLIF   (1 << 9)

Definition at line 712 of file dsi_common_f47.h.

◆ DSI_WIFCR_CPLLUIF

#define DSI_WIFCR_CPLLUIF   (1 << 10)

Definition at line 711 of file dsi_common_f47.h.

◆ DSI_WIFCR_CRRIF

#define DSI_WIFCR_CRRIF   (1 << 13)

Definition at line 709 of file dsi_common_f47.h.

◆ DSI_WIFCR_CTEIF

#define DSI_WIFCR_CTEIF   (1 << 0)

Definition at line 715 of file dsi_common_f47.h.

◆ DSI_WISR

#define DSI_WISR   MMIO32(DSI_BASE + 0x40CU)

DSI Wrapper Interrupt & Status Register.

Definition at line 692 of file dsi_common_f47.h.

◆ DSI_WISR_BUSY

#define DSI_WISR_BUSY   (1 << 2)

Definition at line 700 of file dsi_common_f47.h.

◆ DSI_WISR_ERIF

#define DSI_WISR_ERIF   (1 << 1)

Definition at line 701 of file dsi_common_f47.h.

◆ DSI_WISR_PLLLIF

#define DSI_WISR_PLLLIF   (1 << 9)

Definition at line 697 of file dsi_common_f47.h.

◆ DSI_WISR_PLLLS

#define DSI_WISR_PLLLS   (1 << 8)

Definition at line 698 of file dsi_common_f47.h.

◆ DSI_WISR_PLLUIF

#define DSI_WISR_PLLUIF   (1 << 10)

Definition at line 696 of file dsi_common_f47.h.

◆ DSI_WISR_RRIF

#define DSI_WISR_RRIF   (1 << 13)

Definition at line 694 of file dsi_common_f47.h.

◆ DSI_WISR_RRS

#define DSI_WISR_RRS   (1 << 12)

Definition at line 695 of file dsi_common_f47.h.

◆ DSI_WISR_TEIF

#define DSI_WISR_TEIF   (1 << 0)

Definition at line 702 of file dsi_common_f47.h.

◆ DSI_WPCR0

#define DSI_WPCR0   MMIO32(DSI_BASE + 0x418U)

DSI Wrapper PHY Configuration Register 0.

Definition at line 720 of file dsi_common_f47.h.

◆ DSI_WPCR0_CDOFFDL

#define DSI_WPCR0_CDOFFDL   (1 << 14)

Definition at line 732 of file dsi_common_f47.h.

◆ DSI_WPCR0_FTXSMCL

#define DSI_WPCR0_FTXSMCL   (1 << 12)

Definition at line 734 of file dsi_common_f47.h.

◆ DSI_WPCR0_FTXSMDL

#define DSI_WPCR0_FTXSMDL   (1 << 13)

Definition at line 733 of file dsi_common_f47.h.

◆ DSI_WPCR0_HSICL

#define DSI_WPCR0_HSICL   (1 << 9)

Definition at line 737 of file dsi_common_f47.h.

◆ DSI_WPCR0_HSIDL0

#define DSI_WPCR0_HSIDL0   (1 << 10)

Definition at line 736 of file dsi_common_f47.h.

◆ DSI_WPCR0_HSIDL1

#define DSI_WPCR0_HSIDL1   (1 << 11)

Definition at line 735 of file dsi_common_f47.h.

◆ DSI_WPCR0_PDEN

#define DSI_WPCR0_PDEN   (1 << 18)

Definition at line 730 of file dsi_common_f47.h.

◆ DSI_WPCR0_SWCL

#define DSI_WPCR0_SWCL   (1 << 6)

Definition at line 740 of file dsi_common_f47.h.

◆ DSI_WPCR0_SWDL0

#define DSI_WPCR0_SWDL0   (1 << 7)

Definition at line 739 of file dsi_common_f47.h.

◆ DSI_WPCR0_SWDL1

#define DSI_WPCR0_SWDL1   (1 << 8)

Definition at line 738 of file dsi_common_f47.h.

◆ DSI_WPCR0_TCLKPOSTEN

#define DSI_WPCR0_TCLKPOSTEN   (1 << 27)

Definition at line 721 of file dsi_common_f47.h.

◆ DSI_WPCR0_TCLKPREPEN

#define DSI_WPCR0_TCLKPREPEN   (1 << 19)

Definition at line 729 of file dsi_common_f47.h.

◆ DSI_WPCR0_TCLKZEROEN

#define DSI_WPCR0_TCLKZEROEN   (1 << 20)

Definition at line 728 of file dsi_common_f47.h.

◆ DSI_WPCR0_TDDL

#define DSI_WPCR0_TDDL   (1 << 16)

Definition at line 731 of file dsi_common_f47.h.

◆ DSI_WPCR0_THSEXITEN

#define DSI_WPCR0_THSEXITEN   (1 << 25)

Definition at line 723 of file dsi_common_f47.h.

◆ DSI_WPCR0_THSPREPEN

#define DSI_WPCR0_THSPREPEN   (1 << 21)

Definition at line 727 of file dsi_common_f47.h.

◆ DSI_WPCR0_THSTRAILEN

#define DSI_WPCR0_THSTRAILEN   (1 << 22)

Definition at line 726 of file dsi_common_f47.h.

◆ DSI_WPCR0_THSZEROEN

#define DSI_WPCR0_THSZEROEN   (1 << 23)

Definition at line 725 of file dsi_common_f47.h.

◆ DSI_WPCR0_TLPXCEN

#define DSI_WPCR0_TLPXCEN   (1 << 26)

Definition at line 722 of file dsi_common_f47.h.

◆ DSI_WPCR0_TLPXDEN

#define DSI_WPCR0_TLPXDEN   (1 << 24)

Definition at line 724 of file dsi_common_f47.h.

◆ DSI_WPCR0_UIX4_MASK

#define DSI_WPCR0_UIX4_MASK   0x3f

Definition at line 742 of file dsi_common_f47.h.

◆ DSI_WPCR0_UIX4_SHIFT

#define DSI_WPCR0_UIX4_SHIFT   0

Definition at line 741 of file dsi_common_f47.h.

◆ DSI_WPCR1

#define DSI_WPCR1   MMIO32(DSI_BASE + 0x41CU)

DSI Wrapper PHY Configration Register 1.

Definition at line 747 of file dsi_common_f47.h.

◆ DSI_WPCR1_FLPRXLPM

#define DSI_WPCR1_FLPRXLPM   (1 << 22)

Definition at line 750 of file dsi_common_f47.h.

◆ DSI_WPCR1_HSTXDCL_MASK

#define DSI_WPCR1_HSTXDCL_MASK   0x3

Definition at line 761 of file dsi_common_f47.h.

◆ DSI_WPCR1_HSTXDCL_SHIFT

#define DSI_WPCR1_HSTXDCL_SHIFT   0

Definition at line 760 of file dsi_common_f47.h.

◆ DSI_WPCR1_HSTXDDL_MASK

#define DSI_WPCR1_HSTXDDL_MASK   0x3

Definition at line 759 of file dsi_common_f47.h.

◆ DSI_WPCR1_HSTXDDL_SHIFT

#define DSI_WPCR1_HSTXDDL_SHIFT   2

Definition at line 758 of file dsi_common_f47.h.

◆ DSI_WPCR1_HSTXSRCCL_MASK

#define DSI_WPCR1_HSTXSRCCL_MASK   0x3

Definition at line 754 of file dsi_common_f47.h.

◆ DSI_WPCR1_HSTXSRCCL_SHIFT

#define DSI_WPCR1_HSTXSRCCL_SHIFT   16

Definition at line 753 of file dsi_common_f47.h.

◆ DSI_WPCR1_HSTXSRCDL_MASK

#define DSI_WPCR1_HSTXSRCDL_MASK   0x3

Definition at line 752 of file dsi_common_f47.h.

◆ DSI_WPCR1_HSTXSRCDL_SHIFT

#define DSI_WPCR1_HSTXSRCDL_SHIFT   18

Definition at line 751 of file dsi_common_f47.h.

◆ DSI_WPCR1_LPRXFT_MASK

#define DSI_WPCR1_LPRXFT_MASK   0x3

Definition at line 749 of file dsi_common_f47.h.

◆ DSI_WPCR1_LPRXFT_SHIFT

#define DSI_WPCR1_LPRXFT_SHIFT   25

Definition at line 748 of file dsi_common_f47.h.

◆ DSI_WPCR1_LPSRCDL_MASK

#define DSI_WPCR1_LPSRCDL_MASK   0x3

Definition at line 757 of file dsi_common_f47.h.

◆ DSI_WPCR1_LPSRCDL_SHIFT

#define DSI_WPCR1_LPSRCDL_SHIFT   8

Definition at line 756 of file dsi_common_f47.h.

◆ DSI_WPCR1_SDDC

#define DSI_WPCR1_SDDC   (1 << 12)

Definition at line 755 of file dsi_common_f47.h.

◆ DSI_WPCR2

#define DSI_WPCR2   MMIO32(DSI_BASE + 0x420U)

DSI Wrapper PHY Configuration Register 2.

Definition at line 766 of file dsi_common_f47.h.

◆ DSI_WPCR2_TCLKPREP_MASK

#define DSI_WPCR2_TCLKPREP_MASK   0xff

Definition at line 774 of file dsi_common_f47.h.

◆ DSI_WPCR2_TCLKPREP_SHIFT

#define DSI_WPCR2_TCLKPREP_SHIFT   0

Definition at line 773 of file dsi_common_f47.h.

◆ DSI_WPCR2_TCLKZERO_MASK

#define DSI_WPCR2_TCLKZERO_MASK   0xff

Definition at line 772 of file dsi_common_f47.h.

◆ DSI_WPCR2_TCLKZERO_SHIFT

#define DSI_WPCR2_TCLKZERO_SHIFT   8

Definition at line 771 of file dsi_common_f47.h.

◆ DSI_WPCR2_THSPREP_MASK

#define DSI_WPCR2_THSPREP_MASK   0xff

Definition at line 770 of file dsi_common_f47.h.

◆ DSI_WPCR2_THSPREP_SHIFT

#define DSI_WPCR2_THSPREP_SHIFT   16

Definition at line 769 of file dsi_common_f47.h.

◆ DSI_WPCR2_THSTRAIL_MASK

#define DSI_WPCR2_THSTRAIL_MASK   0xff

Definition at line 768 of file dsi_common_f47.h.

◆ DSI_WPCR2_THSTRAIL_SHIFT

#define DSI_WPCR2_THSTRAIL_SHIFT   24

Definition at line 767 of file dsi_common_f47.h.

◆ DSI_WPCR3

#define DSI_WPCR3   MMIO32(DSI_BASE + 0x424U)

DSI Wrapper PHY Configuration Register 3.

Definition at line 779 of file dsi_common_f47.h.

◆ DSI_WPCR3_THSEXIT_MASK

#define DSI_WPCR3_THSEXIT_MASK   0xff

Definition at line 783 of file dsi_common_f47.h.

◆ DSI_WPCR3_THSEXIT_SHIFT

#define DSI_WPCR3_THSEXIT_SHIFT   16

Definition at line 782 of file dsi_common_f47.h.

◆ DSI_WPCR3_THSZERO_MASK

#define DSI_WPCR3_THSZERO_MASK   0xff

Definition at line 787 of file dsi_common_f47.h.

◆ DSI_WPCR3_THSZERO_SHIFT

#define DSI_WPCR3_THSZERO_SHIFT   0

Definition at line 786 of file dsi_common_f47.h.

◆ DSI_WPCR3_TLPXC_MASK

#define DSI_WPCR3_TLPXC_MASK   0xff

Definition at line 781 of file dsi_common_f47.h.

◆ DSI_WPCR3_TLPXC_SHIFT

#define DSI_WPCR3_TLPXC_SHIFT   24

Definition at line 780 of file dsi_common_f47.h.

◆ DSI_WPCR3_TLPXD_MASK

#define DSI_WPCR3_TLPXD_MASK   0xff

Definition at line 785 of file dsi_common_f47.h.

◆ DSI_WPCR3_TLPXD_SHIFT

#define DSI_WPCR3_TLPXD_SHIFT   8

Definition at line 784 of file dsi_common_f47.h.

◆ DSI_WPCR4

#define DSI_WPCR4   MMIO32(DSI_BASE + 0x428U)

DSI Wrapper PHY Configuration Register 4.

Definition at line 792 of file dsi_common_f47.h.

◆ DSI_WPCR4_TCLKPOST_MASK

#define DSI_WPCR4_TCLKPOST_MASK   0xff

Definition at line 794 of file dsi_common_f47.h.

◆ DSI_WPCR4_TCLKPOST_SHIFT

#define DSI_WPCR4_TCLKPOST_SHIFT   0

Definition at line 793 of file dsi_common_f47.h.

◆ DSI_WRPCR

#define DSI_WRPCR   MMIO32(DSI_BASE + 0x430U)

DSI Wrapper Regulator and PLL Control Register.

Definition at line 799 of file dsi_common_f47.h.

◆ DSI_WRPCR_IDF_DIV_1

#define DSI_WRPCR_IDF_DIV_1   1

Definition at line 809 of file dsi_common_f47.h.

◆ DSI_WRPCR_IDF_DIV_2

#define DSI_WRPCR_IDF_DIV_2   2

Definition at line 810 of file dsi_common_f47.h.

◆ DSI_WRPCR_IDF_DIV_3

#define DSI_WRPCR_IDF_DIV_3   3

Definition at line 811 of file dsi_common_f47.h.

◆ DSI_WRPCR_IDF_DIV_4

#define DSI_WRPCR_IDF_DIV_4   4

Definition at line 812 of file dsi_common_f47.h.

◆ DSI_WRPCR_IDF_DIV_5

#define DSI_WRPCR_IDF_DIV_5   5

Definition at line 813 of file dsi_common_f47.h.

◆ DSI_WRPCR_IDF_DIV_6

#define DSI_WRPCR_IDF_DIV_6   6

Definition at line 814 of file dsi_common_f47.h.

◆ DSI_WRPCR_IDF_DIV_7

#define DSI_WRPCR_IDF_DIV_7   7

Definition at line 815 of file dsi_common_f47.h.

◆ DSI_WRPCR_IDF_MASK

#define DSI_WRPCR_IDF_MASK   0xf

Definition at line 808 of file dsi_common_f47.h.

◆ DSI_WRPCR_IDF_SHIFT

#define DSI_WRPCR_IDF_SHIFT   11

Definition at line 807 of file dsi_common_f47.h.

◆ DSI_WRPCR_NDIV_MASK

#define DSI_WRPCR_NDIV_MASK   0x7f

Definition at line 818 of file dsi_common_f47.h.

◆ DSI_WRPCR_NDIV_SHIFT

#define DSI_WRPCR_NDIV_SHIFT   2

Definition at line 817 of file dsi_common_f47.h.

◆ DSI_WRPCR_ODF_DIV_1

#define DSI_WRPCR_ODF_DIV_1   0

Definition at line 803 of file dsi_common_f47.h.

◆ DSI_WRPCR_ODF_DIV_2

#define DSI_WRPCR_ODF_DIV_2   1

Definition at line 804 of file dsi_common_f47.h.

◆ DSI_WRPCR_ODF_DIV_4

#define DSI_WRPCR_ODF_DIV_4   2

Definition at line 805 of file dsi_common_f47.h.

◆ DSI_WRPCR_ODF_DIV_8

#define DSI_WRPCR_ODF_DIV_8   3

Definition at line 806 of file dsi_common_f47.h.

◆ DSI_WRPCR_ODF_MASK

#define DSI_WRPCR_ODF_MASK   0x3

Definition at line 802 of file dsi_common_f47.h.

◆ DSI_WRPCR_ODF_SHIFT

#define DSI_WRPCR_ODF_SHIFT   16

Definition at line 801 of file dsi_common_f47.h.

◆ DSI_WRPCR_PLLEN

#define DSI_WRPCR_PLLEN   (1 << 0)

Definition at line 819 of file dsi_common_f47.h.

◆ DSI_WRPCR_REGEN

#define DSI_WRPCR_REGEN   (1 << 24)

Definition at line 800 of file dsi_common_f47.h.