enum | rcc_periph_clken {
RCC_GPIOF = _REG_BIT(RCC_IOPENR_OFFSET, 5)
, RCC_GPIOE = _REG_BIT(RCC_IOPENR_OFFSET, 4)
, RCC_GPIOD = _REG_BIT(RCC_IOPENR_OFFSET, 3)
, RCC_GPIOC = _REG_BIT(RCC_IOPENR_OFFSET, 2)
,
RCC_GPIOB = _REG_BIT(RCC_IOPENR_OFFSET, 1)
, RCC_GPIOA = _REG_BIT(RCC_IOPENR_OFFSET, 0)
, RCC_RNG = _REG_BIT(RCC_AHBENR_OFFSET, 18)
, RCC_AES = _REG_BIT(RCC_AHBENR_OFFSET, 16)
,
RCC_CRC = _REG_BIT(RCC_AHBENR_OFFSET, 12)
, RCC_FLASH = _REG_BIT(RCC_AHBENR_OFFSET, 8)
, RCC_DMA2 = _REG_BIT(RCC_AHBENR_OFFSET, 1)
, RCC_DMA1 = _REG_BIT(RCC_AHBENR_OFFSET, 0)
,
RCC_DMA = _REG_BIT(RCC_AHBENR_OFFSET, 0)
, RCC_LPTIM1 = _REG_BIT(RCC_APBENR1_OFFSET, 31)
, RCC_LPTIM2 = _REG_BIT(RCC_APBENR1_OFFSET, 30)
, RCC_DAC1 = _REG_BIT(RCC_APBENR1_OFFSET, 29)
,
RCC_PWR = _REG_BIT(RCC_APBENR1_OFFSET, 28)
, RCC_DBG = _REG_BIT(RCC_APBENR1_OFFSET, 27)
, RCC_UCPD2 = _REG_BIT(RCC_APBENR1_OFFSET, 26)
, RCC_UCPD1 = _REG_BIT(RCC_APBENR1_OFFSET, 25)
,
RCC_CEC = _REG_BIT(RCC_APBENR1_OFFSET, 24)
, RCC_I2C3 = _REG_BIT(RCC_APBENR1_OFFSET, 23)
, RCC_I2C2 = _REG_BIT(RCC_APBENR1_OFFSET, 22)
, RCC_I2C1 = _REG_BIT(RCC_APBENR1_OFFSET, 21)
,
RCC_LPUART1 = _REG_BIT(RCC_APBENR1_OFFSET, 20)
, RCC_USART4 = _REG_BIT(RCC_APBENR1_OFFSET, 19)
, RCC_USART3 = _REG_BIT(RCC_APBENR1_OFFSET, 18)
, RCC_USART2 = _REG_BIT(RCC_APBENR1_OFFSET, 17)
,
RCC_CRS = _REG_BIT(RCC_APBENR1_OFFSET, 16)
, RCC_SPI3 = _REG_BIT(RCC_APBENR1_OFFSET, 15)
, RCC_SPI2 = _REG_BIT(RCC_APBENR1_OFFSET, 14)
, RCC_USB = _REG_BIT(RCC_APBENR1_OFFSET, 13)
,
RCC_FDCAN = _REG_BIT(RCC_APBENR1_OFFSET, 12)
, RCC_WWDG = _REG_BIT(RCC_APBENR1_OFFSET, 11)
, RCC_RTCAPB = _REG_BIT(RCC_APBENR1_OFFSET, 10)
, RCC_USART6 = _REG_BIT(RCC_APBENR1_OFFSET, 9)
,
RCC_USART5 = _REG_BIT(RCC_APBENR1_OFFSET, 8)
, RCC_LPUART2 = _REG_BIT(RCC_APBENR1_OFFSET, 7)
, RCC_TIM7 = _REG_BIT(RCC_APBENR1_OFFSET, 5)
, RCC_TIM6 = _REG_BIT(RCC_APBENR1_OFFSET, 4)
,
RCC_TIM4 = _REG_BIT(RCC_APBENR1_OFFSET, 2)
, RCC_TIM3 = _REG_BIT(RCC_APBENR1_OFFSET, 1)
, RCC_TIM2 = _REG_BIT(RCC_APBENR1_OFFSET, 0)
, RCC_ADC = _REG_BIT(RCC_APBENR2_OFFSET, 20)
,
RCC_TIM17 = _REG_BIT(RCC_APBENR2_OFFSET, 18)
, RCC_TIM16 = _REG_BIT(RCC_APBENR2_OFFSET, 17)
, RCC_TIM15 = _REG_BIT(RCC_APBENR2_OFFSET, 16)
, RCC_TIM14 = _REG_BIT(RCC_APBENR2_OFFSET, 15)
,
RCC_USART1 = _REG_BIT(RCC_APBENR2_OFFSET, 14)
, RCC_SPI1 = _REG_BIT(RCC_APBENR2_OFFSET, 12)
, RCC_TIM1 = _REG_BIT(RCC_APBENR2_OFFSET, 11)
, RCC_SYSCFG = _REG_BIT(RCC_APBENR2_OFFSET, 0)
,
SCC_GPIOF = _REG_BIT(RCC_IOPSMENR_OFFSET, 5)
, SCC_GPIOE = _REG_BIT(RCC_IOPSMENR_OFFSET, 4)
, SCC_GPIOD = _REG_BIT(RCC_IOPSMENR_OFFSET, 3)
, SCC_GPIOC = _REG_BIT(RCC_IOPSMENR_OFFSET, 2)
,
SCC_GPIOB = _REG_BIT(RCC_IOPSMENR_OFFSET, 1)
, SCC_GPIOA = _REG_BIT(RCC_IOPSMENR_OFFSET, 0)
, SCC_RNG = _REG_BIT(RCC_AHBSMENR_OFFSET, 18)
, SCC_AES = _REG_BIT(RCC_AHBSMENR_OFFSET, 16)
,
SCC_CRC = _REG_BIT(RCC_AHBSMENR_OFFSET, 12)
, SCC_SRAM = _REG_BIT(RCC_AHBSMENR_OFFSET, 9)
, SCC_FLASH = _REG_BIT(RCC_AHBSMENR_OFFSET, 8)
, SCC_DMA2 = _REG_BIT(RCC_AHBSMENR_OFFSET, 1)
,
SCC_DMA1 = _REG_BIT(RCC_AHBSMENR_OFFSET, 0)
, SCC_DMA = _REG_BIT(RCC_AHBSMENR_OFFSET, 0)
, SCC_LPTIM1 = _REG_BIT(RCC_APBSMENR1_OFFSET, 31)
, SCC_LPTIM2 = _REG_BIT(RCC_APBSMENR1_OFFSET, 30)
,
SCC_DAC1 = _REG_BIT(RCC_APBSMENR1_OFFSET, 29)
, SCC_PWR = _REG_BIT(RCC_APBSMENR1_OFFSET, 28)
, SCC_DBG = _REG_BIT(RCC_APBSMENR1_OFFSET, 27)
, SCC_UCPD2 = _REG_BIT(RCC_APBSMENR1_OFFSET, 26)
,
SCC_UCPD1 = _REG_BIT(RCC_APBSMENR1_OFFSET, 25)
, SCC_CEC = _REG_BIT(RCC_APBSMENR1_OFFSET, 24)
, SCC_I2C3 = _REG_BIT(RCC_APBSMENR1_OFFSET, 23)
, SCC_I2C2 = _REG_BIT(RCC_APBSMENR1_OFFSET, 22)
,
SCC_I2C1 = _REG_BIT(RCC_APBSMENR1_OFFSET, 21)
, SCC_LPUART1 = _REG_BIT(RCC_APBSMENR1_OFFSET, 20)
, SCC_USART4 = _REG_BIT(RCC_APBSMENR1_OFFSET, 19)
, SCC_USART3 = _REG_BIT(RCC_APBSMENR1_OFFSET, 18)
,
SCC_USART2 = _REG_BIT(RCC_APBSMENR1_OFFSET, 17)
, SCC_CRS = _REG_BIT(RCC_APBSMENR1_OFFSET, 16)
, SCC_SPI3 = _REG_BIT(RCC_APBSMENR1_OFFSET, 15)
, SCC_SPI2 = _REG_BIT(RCC_APBSMENR1_OFFSET, 14)
,
SCC_USB = _REG_BIT(RCC_APBSMENR1_OFFSET, 13)
, SCC_FDCAN = _REG_BIT(RCC_APBSMENR1_OFFSET, 12)
, SCC_WWDG = _REG_BIT(RCC_APBSMENR1_OFFSET, 11)
, SCC_RTCAPB = _REG_BIT(RCC_APBSMENR1_OFFSET, 10)
,
SCC_USART6 = _REG_BIT(RCC_APBSMENR1_OFFSET, 9)
, SCC_USART5 = _REG_BIT(RCC_APBSMENR1_OFFSET, 8)
, SCC_LPUART2 = _REG_BIT(RCC_APBSMENR1_OFFSET, 7)
, SCC_TIM7 = _REG_BIT(RCC_APBSMENR1_OFFSET, 5)
,
SCC_TIM6 = _REG_BIT(RCC_APBSMENR1_OFFSET, 4)
, SCC_TIM3 = _REG_BIT(RCC_APBSMENR1_OFFSET, 1)
, SCC_TIM2 = _REG_BIT(RCC_APBSMENR1_OFFSET, 0)
, SCC_ADC = _REG_BIT(RCC_APBSMENR2_OFFSET, 20)
,
SCC_TIM17 = _REG_BIT(RCC_APBSMENR2_OFFSET, 18)
, SCC_TIM16 = _REG_BIT(RCC_APBSMENR2_OFFSET, 17)
, SCC_TIM15 = _REG_BIT(RCC_APBSMENR2_OFFSET, 16)
, SCC_TIM14 = _REG_BIT(RCC_APBSMENR2_OFFSET, 15)
,
SCC_USART1 = _REG_BIT(RCC_APBSMENR2_OFFSET, 14)
, SCC_SPI1 = _REG_BIT(RCC_APBSMENR2_OFFSET, 12)
, SCC_TIM1 = _REG_BIT(RCC_APBSMENR2_OFFSET, 11)
, SCC_SYSCFG = _REG_BIT(RCC_APBSMENR2_OFFSET, 0)
} |
enum | rcc_periph_rst {
RST_GPIOF = _REG_BIT(RCC_IOPRSTR_OFFSET, 5)
, RST_GPIOE = _REG_BIT(RCC_IOPRSTR_OFFSET, 4)
, RST_GPIOD = _REG_BIT(RCC_IOPRSTR_OFFSET, 3)
, RST_GPIOC = _REG_BIT(RCC_IOPRSTR_OFFSET, 2)
,
RST_GPIOB = _REG_BIT(RCC_IOPRSTR_OFFSET, 1)
, RST_GPIOA = _REG_BIT(RCC_IOPRSTR_OFFSET, 0)
, RST_RNG = _REG_BIT(RCC_AHBRSTR_OFFSET, 18)
, RST_AES = _REG_BIT(RCC_AHBRSTR_OFFSET, 16)
,
RST_CRC = _REG_BIT(RCC_AHBRSTR_OFFSET, 12)
, RST_FLASH = _REG_BIT(RCC_AHBRSTR_OFFSET, 8)
, RST_DMA2 = _REG_BIT(RCC_AHBRSTR_OFFSET, 1)
, RST_DMA1 = _REG_BIT(RCC_AHBRSTR_OFFSET, 0)
,
RST_DMA = _REG_BIT(RCC_AHBRSTR_OFFSET, 0)
, RST_LPTIM1 = _REG_BIT(RCC_APBRSTR1_OFFSET, 31)
, RST_LPTIM2 = _REG_BIT(RCC_APBRSTR1_OFFSET, 30)
, RST_DAC1 = _REG_BIT(RCC_APBRSTR1_OFFSET, 29)
,
RST_PWR = _REG_BIT(RCC_APBRSTR1_OFFSET, 28)
, RST_DBG = _REG_BIT(RCC_APBRSTR1_OFFSET, 27)
, RST_UCPD2 = _REG_BIT(RCC_APBRSTR1_OFFSET, 26)
, RST_UCPD1 = _REG_BIT(RCC_APBRSTR1_OFFSET, 25)
,
RST_CEC = _REG_BIT(RCC_APBRSTR1_OFFSET, 24)
, RST_I2C3 = _REG_BIT(RCC_APBRSTR1_OFFSET, 23)
, RST_I2C2 = _REG_BIT(RCC_APBRSTR1_OFFSET, 22)
, RST_I2C1 = _REG_BIT(RCC_APBRSTR1_OFFSET, 21)
,
RST_LPUART1 = _REG_BIT(RCC_APBRSTR1_OFFSET, 20)
, RST_USART4 = _REG_BIT(RCC_APBRSTR1_OFFSET, 19)
, RST_USART3 = _REG_BIT(RCC_APBRSTR1_OFFSET, 18)
, RST_USART2 = _REG_BIT(RCC_APBRSTR1_OFFSET, 17)
,
RST_CRS = _REG_BIT(RCC_APBRSTR1_OFFSET, 16)
, RST_SPI3 = _REG_BIT(RCC_APBRSTR1_OFFSET, 15)
, RST_SPI2 = _REG_BIT(RCC_APBRSTR1_OFFSET, 14)
, RST_USB = _REG_BIT(RCC_APBRSTR1_OFFSET, 13)
,
RST_FDCAN = _REG_BIT(RCC_APBRSTR1_OFFSET, 12)
, RST_USART6 = _REG_BIT(RCC_APBRSTR1_OFFSET, 9)
, RST_USART5 = _REG_BIT(RCC_APBRSTR1_OFFSET, 8)
, RST_LPUART2 = _REG_BIT(RCC_APBRSTR1_OFFSET, 7)
,
RST_TIM7 = _REG_BIT(RCC_APBRSTR1_OFFSET, 5)
, RST_TIM6 = _REG_BIT(RCC_APBRSTR1_OFFSET, 4)
, RST_TIM4 = _REG_BIT(RCC_APBRSTR1_OFFSET, 2)
, RST_TIM3 = _REG_BIT(RCC_APBRSTR1_OFFSET, 1)
,
RST_TIM2 = _REG_BIT(RCC_APBRSTR1_OFFSET, 0)
, RST_ADC = _REG_BIT(RCC_APBRSTR2_OFFSET, 20)
, RST_TIM17 = _REG_BIT(RCC_APBRSTR2_OFFSET, 18)
, RST_TIM16 = _REG_BIT(RCC_APBRSTR2_OFFSET, 17)
,
RST_TIM15 = _REG_BIT(RCC_APBRSTR2_OFFSET, 16)
, RST_TIM14 = _REG_BIT(RCC_APBRSTR2_OFFSET, 15)
, RST_USART1 = _REG_BIT(RCC_APBRSTR2_OFFSET, 14)
, RST_SPI1 = _REG_BIT(RCC_APBRSTR2_OFFSET, 12)
,
RST_TIM1 = _REG_BIT(RCC_APBRSTR2_OFFSET, 11)
, RST_SYSCFG = _REG_BIT(RCC_APBRSTR2_OFFSET, 0)
} |