RCC_APB1SMENR1 - APB1 periph clock in sleep mode
Collaboration diagram for RCC_APB1SMENR1 - APB1 periph clock in sleep mode:
Macros | |
| #define | RCC_APB1SMENR1_LPTIM1SMEN (1 << 31) |
| #define | RCC_APB1SMENR1_I2C3SMEN (1 << 30) |
| #define | RCC_APB1SMENR1_PWRSMEN (1 << 28) |
| #define | RCC_APB1SMENR1_FDCANSMEN (1 << 25) |
| #define | RCC_APB1SMENR1_USBSMEN (1 << 23) |
| #define | RCC_APB1SMENR1_I2C2SMEN (1 << 22) |
| #define | RCC_APB1SMENR1_I2C1SMEN (1 << 21) |
| #define | RCC_APB1SMENR1_UART5SMEN (1 << 20) |
| #define | RCC_APB1SMENR1_UART4SMEN (1 << 19) |
| #define | RCC_APB1SMENR1_USART3SMEN (1 << 18) |
| #define | RCC_APB1SMENR1_USART2SMEN (1 << 17) |
| #define | RCC_APB1SMENR1_SPI3SMEN (1 << 15) |
| #define | RCC_APB1SMENR1_SPI2SMEN (1 << 14) |
| #define | RCC_APB1SMENR1_WWDGSMEN (1 << 11) |
| #define | RCC_APB1SMENR1_RTCAPBSMEN (1 << 10) |
| #define | RCC_APB1SMENR1_TIM7SMEN (1 << 5) |
| #define | RCC_APB1SMENR1_TIM6SMEN (1 << 4) |
| #define | RCC_APB1SMENR1_TIM5SMEN (1 << 3) |
| #define | RCC_APB1SMENR1_TIM4SMEN (1 << 2) |
| #define | RCC_APB1SMENR1_TIM3SMEN (1 << 1) |
| #define | RCC_APB1SMENR1_TIM2SMEN (1 << 0) |
