libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
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ADC Result API. More...
Enumerations | |
enum | adc_opmode { ADC_MODE_SEQUENTIAL , ADC_MODE_SCAN , ADC_MODE_SCAN_INFINITE } |
Functions | |
void | adc_enable_discontinuous_mode (uint32_t adc) |
ADC Enable Discontinuous Mode for Regular Conversions. More... | |
void | adc_disable_discontinuous_mode (uint32_t adc) |
ADC Disable Discontinuous Mode for Regular Conversions. More... | |
void | adc_set_operation_mode (uint32_t adc, enum adc_opmode opmode) |
ADC Set operation mode. More... | |
ADC Result API.
enum adc_opmode |
void adc_disable_discontinuous_mode | ( | uint32_t | adc | ) |
ADC Disable Discontinuous Mode for Regular Conversions.
[in] | adc | Unsigned int32. ADC base address (ADC register base addresses) |
Definition at line 61 of file adc.c.
References ADC_CFGR1.
void adc_enable_discontinuous_mode | ( | uint32_t | adc | ) |
ADC Enable Discontinuous Mode for Regular Conversions.
[in] | adc | Unsigned int32. ADC base address (ADC register base addresses) |
Definition at line 50 of file adc.c.
References ADC_CFGR1, and ADC_CFGR1_DISCEN.
void adc_set_operation_mode | ( | uint32_t | adc, |
enum adc_opmode | opmode | ||
) |
ADC Set operation mode.
There are some operation modes, common for entire stm32 branch. In the text the braces are describing result to single trigger event. The trigger event is described by character T in the description. The ADC is configured to convert list of inputs [0, 1, 2, 3]. In Grouped modes, there is used group size of 2 conversions in the examples
ADC_MODE_SEQUENTIAL:
T(0) T(1) T(2) T(3)[EOSEQ] T(0) T(1) T(2) ...In this mode, after the trigger event a single channel is converted and the next channel in the list is prepared to convert on next trigger edge.
ADC_MODE_SCAN:
T(0123)[EOSEQ] T(0123)[EOSEQ] T(0123)[EOSEQ]In this mode, after the trigger event, all channels will be converted once, storing results sequentially.
ADC_MODE_SCAN_INFINITE:
T(0123[EOSEQ]0123[EOSEQ]0123[EOSEQ]...)In this mode, after the trigger event, all channels from the list are converted. At the end of list, the conversion continues from the beginning.
ADC_MODE_GROUPED:
T(12) T(34)[EOSEQ] T(12) T(34)[EOSEQ] T(12)In this mode, after the trigger event, a specified group size of channels are converted. If the end of channel list occurs, the EOSEQ is generated and on the next trigger it wraps to the beginning.
ADC Set conversion operation mode
[in] | adc | Unsigned int32. ADC base address (ADC register base addresses) |
[in] | opmode | ADC operation mode |
Definition at line 120 of file adc.c.
References ADC_CFGR1, ADC_CFGR1_CONT, ADC_CFGR1_DISCEN, ADC_MODE_SCAN, ADC_MODE_SCAN_INFINITE, and ADC_MODE_SEQUENTIAL.