Note: Bits [31:17] and [15] are reserved, and must be kept at reset value.
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Note: Bits [31:17] and [15] are reserved, and must be kept at reset value.
Note: This register is write protected (except for RTC_ISR[13:8] bits).
◆ RTC_ISR_ALRAF
#define RTC_ISR_ALRAF (1<<8) |
◆ RTC_ISR_ALRAWF
#define RTC_ISR_ALRAWF (1<<0) |
◆ RTC_ISR_ALRBF
#define RTC_ISR_ALRBF (1<<9) |
◆ RTC_ISR_ALRBWF
#define RTC_ISR_ALRBWF (1<<1) |
◆ RTC_ISR_INIT
#define RTC_ISR_INIT (1<<7) |
◆ RTC_ISR_INITF
#define RTC_ISR_INITF (1<<6) |
◆ RTC_ISR_INITS
#define RTC_ISR_INITS (1<<4) |
◆ RTC_ISR_RECALPF
#define RTC_ISR_RECALPF (1<<16) |
◆ RTC_ISR_RSF
#define RTC_ISR_RSF (1<<5) |
◆ RTC_ISR_SHPF
#define RTC_ISR_SHPF (1<<3) |
◆ RTC_ISR_TAMP1F
#define RTC_ISR_TAMP1F (1<<13) |
◆ RTC_ISR_TAMP2F
#define RTC_ISR_TAMP2F (1<<14) |
◆ RTC_ISR_TAMP3F
#define RTC_ISR_TAMP3F (1<<15) |
◆ RTC_ISR_TSF
#define RTC_ISR_TSF (1<<11) |
◆ RTC_ISR_TSOVF
#define RTC_ISR_TSOVF (1<<12) |
◆ RTC_ISR_WUTF
#define RTC_ISR_WUTF (1<<10) |
◆ RTC_ISR_WUTWF
#define RTC_ISR_WUTWF (1<<2) |