Collaboration diagram for SPI peripheral API:

Macros
#define	SPI_CR2_FRF (1 << 4)

#define	SPI_CR2_FRF_MOTOROLA_MODE (0 << 4)

#define	SPI_CR2_FRF_TI_MODE (1 << 4)

#define	SPI_SR_TIFRFE (1 << 8)

#define	SPI_SR_FRE (1 << 8)

Functions
void	spi_enable (uint32_t spi)
	SPI Enable. More...

void	spi_disable (uint32_t spi)
	SPI Disable. More...

uint16_t	spi_clean_disable (uint32_t spi)
	SPI Clean Disable. More...

void	spi_write (uint32_t spi, uint16_t data)
	SPI Data Write. More...

void	spi_send (uint32_t spi, uint16_t data)
	SPI Data Write with Blocking. More...

uint16_t	spi_read (uint32_t spi)
	SPI Data Read. More...

uint16_t	spi_xfer (uint32_t spi, uint16_t data)
	SPI Data Write and Read Exchange. More...

void	spi_set_bidirectional_mode (uint32_t spi)
	SPI Set Bidirectional Simplex Mode. More...

void	spi_set_unidirectional_mode (uint32_t spi)
	SPI Set Unidirectional Mode. More...

void	spi_set_bidirectional_receive_only_mode (uint32_t spi)
	SPI Set Bidirectional Simplex Receive Only Mode. More...

void	spi_set_bidirectional_transmit_only_mode (uint32_t spi)
	SPI Set Bidirectional Simplex Receive Only Mode. More...

void	spi_enable_crc (uint32_t spi)
	SPI Enable the CRC. More...

void	spi_disable_crc (uint32_t spi)
	SPI Disable the CRC. More...

void	spi_set_next_tx_from_buffer (uint32_t spi)
	SPI Next Transmit is a Data Word. More...

void	spi_set_next_tx_from_crc (uint32_t spi)
	SPI Next Transmit is a CRC Word. More...

void	spi_set_full_duplex_mode (uint32_t spi)
	SPI Set Full Duplex (3-wire) Mode. More...

void	spi_set_receive_only_mode (uint32_t spi)
	SPI Set Receive Only Mode for Simplex (2-wire) Unidirectional Transfers. More...

void	spi_disable_software_slave_management (uint32_t spi)
	SPI Disable Slave Management by Hardware. More...

void	spi_enable_software_slave_management (uint32_t spi)
	SPI Enable Slave Management by Software. More...

void	spi_set_nss_high (uint32_t spi)
	SPI Set the Software NSS Signal High. More...

void	spi_set_nss_low (uint32_t spi)
	SPI Set the Software NSS Signal Low. More...

void	spi_send_lsb_first (uint32_t spi)
	SPI Set to Send LSB First. More...

void	spi_send_msb_first (uint32_t spi)
	SPI Set to Send MSB First. More...

void	spi_set_baudrate_prescaler (uint32_t spi, uint8_t baudrate)
	SPI Set the Baudrate Prescaler. More...

void	spi_set_master_mode (uint32_t spi)
	SPI Set to Master Mode. More...

void	spi_set_slave_mode (uint32_t spi)
	SPI Set to Slave Mode. More...

void	spi_set_clock_polarity_1 (uint32_t spi)
	SPI Set the Clock Polarity to High when Idle. More...

void	spi_set_clock_polarity_0 (uint32_t spi)
	SPI Set the Clock Polarity to Low when Idle. More...

void	spi_set_clock_phase_1 (uint32_t spi)
	SPI Set the Clock Phase to Capture on Trailing Edge. More...

void	spi_set_clock_phase_0 (uint32_t spi)
	SPI Set the Clock Phase to Capture on Leading Edge. More...

void	spi_enable_tx_buffer_empty_interrupt (uint32_t spi)
	SPI Enable the Transmit Buffer Empty Interrupt. More...

void	spi_disable_tx_buffer_empty_interrupt (uint32_t spi)
	SPI Disable the Transmit Buffer Empty Interrupt. More...

void	spi_enable_rx_buffer_not_empty_interrupt (uint32_t spi)
	SPI Enable the Receive Buffer Ready Interrupt. More...

void	spi_disable_rx_buffer_not_empty_interrupt (uint32_t spi)
	SPI Disable the Receive Buffer Ready Interrupt. More...

void	spi_enable_error_interrupt (uint32_t spi)
	SPI Enable the Error Interrupt. More...

void	spi_disable_error_interrupt (uint32_t spi)
	SPI Disable the Error Interrupt. More...

void	spi_enable_ss_output (uint32_t spi)
	SPI Set the NSS Pin as an Output. More...

void	spi_disable_ss_output (uint32_t spi)
	SPI Set the NSS Pin as an Input. More...

void	spi_enable_tx_dma (uint32_t spi)
	SPI Enable Transmit Transfers via DMA. More...

void	spi_disable_tx_dma (uint32_t spi)
	SPI Disable Transmit Transfers via DMA. More...

void	spi_enable_rx_dma (uint32_t spi)
	SPI Enable Receive Transfers via DMA. More...

void	spi_disable_rx_dma (uint32_t spi)
	SPI Disable Receive Transfers via DMA. More...

void	spi_set_standard_mode (uint32_t spi, uint8_t mode)
	SPI Standard Mode selection. More...

int	spi_init_master (uint32_t spi, uint32_t br, uint32_t cpol, uint32_t cpha, uint32_t dff, uint32_t lsbfirst)
	Configure the SPI as Master. More...

void	spi_set_dff_8bit (uint32_t spi)
	SPI Set Data Frame Format to 8 bits. More...

void	spi_set_dff_16bit (uint32_t spi)
	SPI Set Data Frame Format to 16 bits. More...

void	spi_set_frf_ti (uint32_t spi)
	SPI Set Frame Format to TI. More...

void	spi_set_frf_motorola (uint32_t spi)
	SPI Set Frame Format to Motorola. More...

Detailed Description

Author: © 2009 Uwe Hermann uwe@h.nosp@m.erma.nosp@m.nn-uw.nosp@m.e.de; © 2012 Ken Sarkies ksark.nosp@m.ies@.nosp@m.inter.nosp@m.node.nosp@m..on.n.nosp@m.et

Devices can have up to three SPI peripherals. The common 4-wire full-duplex mode of operation is supported, along with 3-wire variants using unidirectional communication modes or half-duplex bidirectional communication. A variety of options allows many of the SPI variants to be supported. Multimaster operation is also supported. A CRC can be generated and checked in hardware.

Note: Some JTAG pins need to be remapped if SPI is to be used.; The I2S protocol shares the SPI hardware so the two protocols cannot be used at the same time on the same peripheral.

Example: Clk/4, positive clock polarity, leading edge trigger, 8-bit words, LSB first.

spi_init_master(SPI1, SPI_CR1_BAUDRATE_FPCLK_DIV_4, SPI_CR1_CPOL_CLK_TO_0_WHEN_IDLE,
                SPI_CR1_CPHA_CLK_TRANSITION_1, SPI_CR1_DFF_8BIT, SPI_CR1_LSBFIRST);
spi_write(SPI1, 0x55);          // 8-bit write
spi_write(SPI1, 0xaa88);        // 16-bit write
reg8 = spi_read(SPI1);          // 8-bit read
reg16 = spi_read(SPI1);         // 16-bit read

Author: © 2009 Uwe Hermann uwe@h.nosp@m.erma.nosp@m.nn-uw.nosp@m.e.de; © 2012 Ken Sarkies ksark.nosp@m.ies@.nosp@m.inter.nosp@m.node.nosp@m..on.n.nosp@m.et

Devices can have up to three SPI peripherals. The common 4-wire full-duplex mode of operation is supported, along with 3-wire variants using unidirectional communication modes or half-duplex bidirectional communication. A variety of options allows many of the SPI variants to be supported. Multimaster operation is also supported. A CRC can be generated and checked in hardware.

Note: Some JTAG pins need to be remapped if SPI is to be used.; The I2S protocol shares the SPI hardware so the two protocols cannot be used at the same time on the same peripheral.

Example: Clk/4, positive clock polarity, leading edge trigger, 8-bit words, LSB first.

spi_init_master(SPI1, SPI_CR1_BAUDRATE_FPCLK_DIV_4, SPI_CR1_CPOL_CLK_TO_0_WHEN_IDLE,
                SPI_CR1_CPHA_CLK_TRANSITION_1, SPI_CR1_DFF_8BIT, SPI_CR1_LSBFIRST);
spi_write(SPI1, 0x55);          // 8-bit write
spi_write(SPI1, 0xaa88);        // 16-bit write
reg8 = spi_read(SPI1);          // 8-bit read
reg16 = spi_read(SPI1);         // 16-bit read

Author: © 2009 Uwe Hermann uwe@h.nosp@m.erma.nosp@m.nn-uw.nosp@m.e.de; © 2012 Ken Sarkies ksark.nosp@m.ies@.nosp@m.inter.nosp@m.node.nosp@m..on.n.nosp@m.et; © 2018 Guillaume Revaillot revai.nosp@m.llot.nosp@m.@arch.nosp@m.os.c.nosp@m.om

Macro Definition Documentation

◆ SPI_CR2_FRF

#define SPI_CR2_FRF (1 << 4)

Definition at line 58 of file spi_common_v1_frf.c.

◆ SPI_CR2_FRF_MOTOROLA_MODE

#define SPI_CR2_FRF_MOTOROLA_MODE (0 << 4)

Definition at line 59 of file spi_common_v1_frf.c.

◆ SPI_CR2_FRF_TI_MODE

#define SPI_CR2_FRF_TI_MODE (1 << 4)

Definition at line 60 of file spi_common_v1_frf.c.

◆ SPI_SR_FRE

#define SPI_SR_FRE (1 << 8)

Definition at line 66 of file spi_common_v1_frf.c.

◆ SPI_SR_TIFRFE

#define SPI_SR_TIFRFE (1 << 8)

Definition at line 65 of file spi_common_v1_frf.c.

Function Documentation

◆ spi_clean_disable()

uint16_t spi_clean_disable ( uint32_t spi )

SPI Clean Disable.

Disable the SPI peripheral according to the procedure in section 23.3.8 of the reference manual. This prevents corruption of any ongoing transfers and prevents the BSY flag from becoming unreliable.

Parameters

[in] spi Unsigned int32. SPI peripheral identifier SPI Register base address.

Returns: data Unsigned int16. 8 or 16 bit data from final read.

Definition at line 104 of file spi_common_all.c.

References SPI_CR1, SPI_DR, SPI_SR, SPI_SR_BSY, SPI_SR_RXNE, and SPI_SR_TXE.

◆ spi_disable()

void spi_disable ( uint32_t spi )

SPI Disable.

The SPI peripheral is disabled.

Parameters

[in] spi Unsigned int32. SPI peripheral identifier SPI Register base address.

Definition at line 84 of file spi_common_all.c.

References SPI_CR1, and SPI_CR1_SPE.

◆ spi_disable_crc()

void spi_disable_crc ( uint32_t spi )

SPI Disable the CRC.

Parameters

[in] spi Unsigned int32. SPI peripheral identifier SPI Register base address.

Definition at line 276 of file spi_common_all.c.

References SPI_CR1.

◆ spi_disable_error_interrupt()

void spi_disable_error_interrupt ( uint32_t spi )

SPI Disable the Error Interrupt.

Parameters

[in] spi Unsigned int32. SPI peripheral identifier SPI Register base address.

Definition at line 570 of file spi_common_all.c.

References SPI_CR2.

◆ spi_disable_rx_buffer_not_empty_interrupt()

void spi_disable_rx_buffer_not_empty_interrupt ( uint32_t spi )

SPI Disable the Receive Buffer Ready Interrupt.

Parameters

[in] spi Unsigned int32. SPI peripheral identifier SPI Register base address.

Definition at line 548 of file spi_common_all.c.

References SPI_CR2.

◆ spi_disable_rx_dma()

void spi_disable_rx_dma ( uint32_t spi )

SPI Disable Receive Transfers via DMA.

Parameters

[in] spi Unsigned int32. SPI peripheral identifier SPI Register base address.

Definition at line 651 of file spi_common_all.c.

References SPI_CR2.

◆ spi_disable_software_slave_management()

void spi_disable_software_slave_management ( uint32_t spi )

SPI Disable Slave Management by Hardware.

In slave mode the NSS hardware input is used as a select enable for the slave.

Parameters

[in] spi Unsigned int32. SPI peripheral identifier SPI Register base address.

Definition at line 342 of file spi_common_all.c.

References SPI_CR1.

◆ spi_disable_ss_output()

void spi_disable_ss_output ( uint32_t spi )

SPI Set the NSS Pin as an Input.

In master mode this allows the master to sense the presence of other masters. If NSS is then pulled low the master is placed into slave mode. In slave mode NSS becomes a slave enable.

Parameters

[in] spi Unsigned int32. SPI peripheral identifier SPI Register base address.

Definition at line 599 of file spi_common_all.c.

References SPI_CR2.

◆ spi_disable_tx_buffer_empty_interrupt()

void spi_disable_tx_buffer_empty_interrupt ( uint32_t spi )

SPI Disable the Transmit Buffer Empty Interrupt.

Parameters

[in] spi Unsigned int32. SPI peripheral identifier SPI Register base address.

Definition at line 526 of file spi_common_all.c.

References SPI_CR2.

◆ spi_disable_tx_dma()

void spi_disable_tx_dma ( uint32_t spi )

SPI Disable Transmit Transfers via DMA.

Parameters

[in] spi Unsigned int32. SPI peripheral identifier SPI Register base address.

Definition at line 625 of file spi_common_all.c.

References SPI_CR2.

◆ spi_enable()

void spi_enable ( uint32_t spi )

SPI Enable.

The SPI peripheral is enabled.

Parameters

[in] spi Unsigned int32. SPI peripheral identifier SPI Register base address.

Definition at line 70 of file spi_common_all.c.

References SPI_CR1, and SPI_CR1_SPE.

◆ spi_enable_crc()

void spi_enable_crc ( uint32_t spi )

SPI Enable the CRC.

The SPI peripheral is set to use a CRC field for transmit and receive.

Parameters

[in] spi Unsigned int32. SPI peripheral identifier SPI Register base address.

Definition at line 265 of file spi_common_all.c.

References SPI_CR1, and SPI_CR1_CRCEN.

◆ spi_enable_error_interrupt()

void spi_enable_error_interrupt ( uint32_t spi )

SPI Enable the Error Interrupt.

Parameters

[in] spi Unsigned int32. SPI peripheral identifier SPI Register base address.

Definition at line 559 of file spi_common_all.c.

References SPI_CR2, and SPI_CR2_ERRIE.

◆ spi_enable_rx_buffer_not_empty_interrupt()

void spi_enable_rx_buffer_not_empty_interrupt ( uint32_t spi )

SPI Enable the Receive Buffer Ready Interrupt.

Parameters

[in] spi Unsigned int32. SPI peripheral identifier SPI Register base address.

Definition at line 537 of file spi_common_all.c.

References SPI_CR2, and SPI_CR2_RXNEIE.

◆ spi_enable_rx_dma()

void spi_enable_rx_dma ( uint32_t spi )

SPI Enable Receive Transfers via DMA.

This allows received data streams to proceed unattended using DMA to move data from the receive buffer as data becomes available. The DMA channels provided for each SPI peripheral are given in the Technical Manual DMA section.

Parameters

[in] spi Unsigned int32. SPI peripheral identifier SPI Register base address.

Definition at line 640 of file spi_common_all.c.

References SPI_CR2, and SPI_CR2_RXDMAEN.

◆ spi_enable_software_slave_management()

void spi_enable_software_slave_management ( uint32_t spi )

SPI Enable Slave Management by Software.

In slave mode the NSS hardware input is replaced by an internal software enable/disable of the slave (spi_set_nss_high).

Parameters

[in] spi Unsigned int32. SPI peripheral identifier SPI Register base address.

Definition at line 356 of file spi_common_all.c.

References SPI_CR1, SPI_CR1_SSM, and SPI_CR2.

◆ spi_enable_ss_output()

void spi_enable_ss_output ( uint32_t spi )

SPI Set the NSS Pin as an Output.

Normally used in master mode to allows the master to place all devices on the SPI bus into slave mode. Multimaster mode is not possible.

Parameters

[in] spi Unsigned int32. SPI peripheral identifier SPI Register base address.

Definition at line 584 of file spi_common_all.c.

References SPI_CR2, and SPI_CR2_SSOE.

◆ spi_enable_tx_buffer_empty_interrupt()

void spi_enable_tx_buffer_empty_interrupt ( uint32_t spi )

SPI Enable the Transmit Buffer Empty Interrupt.

Parameters

[in] spi Unsigned int32. SPI peripheral identifier SPI Register base address.

Definition at line 515 of file spi_common_all.c.

References SPI_CR2, and SPI_CR2_TXEIE.

◆ spi_enable_tx_dma()

void spi_enable_tx_dma ( uint32_t spi )

SPI Enable Transmit Transfers via DMA.

This allows transmissions to proceed unattended using DMA to move data to the transmit buffer as it becomes available. The DMA channels provided for each SPI peripheral are given in the Technical Manual DMA section.

Parameters

[in] spi Unsigned int32. SPI peripheral identifier SPI Register base address.

Definition at line 614 of file spi_common_all.c.

References SPI_CR2, and SPI_CR2_TXDMAEN.

◆ spi_init_master()

int spi_init_master	(	uint32_t	spi,
		uint32_t	br,
		uint32_t	cpol,
		uint32_t	cpha,
		uint32_t	dff,
		uint32_t	lsbfirst
	)

Configure the SPI as Master.

The SPI peripheral is configured as a master with communication parameters baudrate, data format 8/16 bits, frame format lsb/msb first, clock polarity and phase. The SPI enable, CRC enable and CRC next controls are not affected. These must be controlled separately.

To support multiple masters (dynamic switching between master and slave) you must set SSOE to 0 and select either software or hardware control of the NSS pin.

Parameters

[in]	spi	Unsigned int32. SPI peripheral identifier SPI Register base address.
[in]	br	Unsigned int32. Baudrate SPI peripheral baud rates.
[in]	cpol	Unsigned int32. Clock polarity SPI clock polarity.
[in]	cpha	Unsigned int32. Clock Phase SPI clock phase.
[in]	dff	Unsigned int32. Data frame format 8/16 bits SPI data frame format.
[in]	lsbfirst	Unsigned int32. Frame format lsb/msb first SPI lsb/msb first.

Returns: int. Error code.

Definition at line 83 of file spi_common_v1.c.

References SPI_CR1, SPI_CR1_CRCEN, SPI_CR1_CRCNEXT, SPI_CR1_MSTR, SPI_CR1_SPE, SPI_CR2, and SPI_CR2_SSOE.

◆ spi_read()

uint16_t spi_read ( uint32_t spi )

SPI Data Read.

Data is read from the SPI interface after the incoming transfer has finished.

Parameters

[in] spi Unsigned int32. SPI peripheral identifier SPI Register base address.

Returns: data Unsigned int16. 8 or 16 bit data.

Definition at line 165 of file spi_common_all.c.

References SPI_DR, SPI_SR, and SPI_SR_RXNE.

◆ spi_send()

void spi_send	(	uint32_t	spi,
		uint16_t	data
	)

SPI Data Write with Blocking.

Data is written to the SPI interface after the previous write transfer has finished.

Parameters

[in]	spi	Unsigned int32. SPI peripheral identifier SPI Register base address.
[in]	data	Unsigned int16. 8 or 16 bit data to be written.

Definition at line 147 of file spi_common_all.c.

References SPI_DR, SPI_SR, and SPI_SR_TXE.

◆ spi_send_lsb_first()

void spi_send_lsb_first ( uint32_t spi )

SPI Set to Send LSB First.

Parameters

[in] spi Unsigned int32. SPI peripheral identifier SPI Register base address.

Definition at line 400 of file spi_common_all.c.

References SPI_CR1, and SPI_CR1_LSBFIRST.

◆ spi_send_msb_first()

void spi_send_msb_first ( uint32_t spi )

SPI Set to Send MSB First.

Parameters

[in] spi Unsigned int32. SPI peripheral identifier SPI Register base address.

Definition at line 411 of file spi_common_all.c.

References SPI_CR1.

◆ spi_set_baudrate_prescaler()

void spi_set_baudrate_prescaler	(	uint32_t	spi,
		uint8_t	baudrate
	)

SPI Set the Baudrate Prescaler.

Parameters

[in]	spi	Unsigned int32. SPI peripheral identifier SPI Register base address.
[in]	baudrate	Unsigned int8. Baudrate prescale value SPI peripheral baud rate prescale values.

Definition at line 426 of file spi_common_all.c.

References SPI_CR1.

◆ spi_set_bidirectional_mode()

void spi_set_bidirectional_mode ( uint32_t spi )

SPI Set Bidirectional Simplex Mode.

The SPI peripheral is set for bidirectional transfers in two-wire simplex mode (using a clock wire and a bidirectional data wire).

Parameters

[in] spi Unsigned int32. SPI peripheral identifier SPI Register base address.

Definition at line 205 of file spi_common_all.c.

References SPI_CR1, and SPI_CR1_BIDIMODE.

◆ spi_set_bidirectional_receive_only_mode()

void spi_set_bidirectional_receive_only_mode ( uint32_t spi )

SPI Set Bidirectional Simplex Receive Only Mode.

The SPI peripheral is set for bidirectional transfers in two-wire simplex mode (using a clock wire and a bidirectional data wire), and is placed in a receive state.

Parameters

[in] spi Unsigned int32. SPI peripheral identifier SPI Register base address.

Definition at line 235 of file spi_common_all.c.

References SPI_CR1, and SPI_CR1_BIDIMODE.

◆ spi_set_bidirectional_transmit_only_mode()

void spi_set_bidirectional_transmit_only_mode ( uint32_t spi )

SPI Set Bidirectional Simplex Receive Only Mode.

The SPI peripheral is set for bidirectional transfers in two-wire simplex mode (using a clock wire and a bidirectional data wire), and is placed in a transmit state.

Parameters

[in] spi Unsigned int32. SPI peripheral identifier SPI Register base address.

Definition at line 251 of file spi_common_all.c.

References SPI_CR1, SPI_CR1_BIDIMODE, and SPI_CR1_BIDIOE.

◆ spi_set_clock_phase_0()

void spi_set_clock_phase_0 ( uint32_t spi )

SPI Set the Clock Phase to Capture on Leading Edge.

Parameters

[in] spi Unsigned int32. SPI peripheral identifier SPI Register base address.

See also: spi_set_clock_phase_1

Definition at line 504 of file spi_common_all.c.

References SPI_CR1.

◆ spi_set_clock_phase_1()

void spi_set_clock_phase_1 ( uint32_t spi )

SPI Set the Clock Phase to Capture on Trailing Edge.

Parameters

[in] spi Unsigned int32. SPI peripheral identifier SPI Register base address.

See also: spi_set_clock_phase_0

Definition at line 492 of file spi_common_all.c.

References SPI_CR1, and SPI_CR1_CPHA.

◆ spi_set_clock_polarity_0()

void spi_set_clock_polarity_0 ( uint32_t spi )

SPI Set the Clock Polarity to Low when Idle.

Parameters

[in] spi Unsigned int32. SPI peripheral identifier SPI Register base address.

See also: spi_set_clock_polarity_1

Definition at line 480 of file spi_common_all.c.

References SPI_CR1.

◆ spi_set_clock_polarity_1()

void spi_set_clock_polarity_1 ( uint32_t spi )

SPI Set the Clock Polarity to High when Idle.

Parameters

[in] spi Unsigned int32. SPI peripheral identifier SPI Register base address.

See also: spi_set_clock_polarity_0

Definition at line 468 of file spi_common_all.c.

References SPI_CR1, and SPI_CR1_CPOL.

◆ spi_set_dff_16bit()

void spi_set_dff_16bit ( uint32_t spi )

SPI Set Data Frame Format to 16 bits.

Parameters

[in] spi Unsigned int32. SPI peripheral identifier SPI Register base address.

Definition at line 122 of file spi_common_v1.c.

References SPI_CR1, and SPI_CR1_DFF.

◆ spi_set_dff_8bit()

void spi_set_dff_8bit ( uint32_t spi )

SPI Set Data Frame Format to 8 bits.

Parameters

[in] spi Unsigned int32. SPI peripheral identifier SPI Register base address.

Definition at line 111 of file spi_common_v1.c.

References SPI_CR1.

◆ spi_set_frf_motorola()

void spi_set_frf_motorola ( uint32_t spi )

SPI Set Frame Format to Motorola.

Parameters

[in] spi Unsigned int32. SPI peripheral identifier SPI Register base address.

Definition at line 53 of file spi_common_v1_frf.c.

References SPI_CR2.

◆ spi_set_frf_ti()

void spi_set_frf_ti ( uint32_t spi )

SPI Set Frame Format to TI.

Parameters

[in] spi Unsigned int32. SPI peripheral identifier SPI Register base address.

Definition at line 42 of file spi_common_v1_frf.c.

References SPI_CR2, and SPI_CR2_FRF.

◆ spi_set_full_duplex_mode()

void spi_set_full_duplex_mode ( uint32_t spi )

SPI Set Full Duplex (3-wire) Mode.

Parameters

[in] spi Unsigned int32. SPI peripheral identifier SPI Register base address.

Definition at line 317 of file spi_common_all.c.

References SPI_CR1.

◆ spi_set_master_mode()

void spi_set_master_mode ( uint32_t spi )

SPI Set to Master Mode.

Parameters

[in] spi Unsigned int32. SPI peripheral identifier SPI Register base address.

Definition at line 445 of file spi_common_all.c.

References SPI_CR1, and SPI_CR1_MSTR.

◆ spi_set_next_tx_from_buffer()

void spi_set_next_tx_from_buffer ( uint32_t spi )

SPI Next Transmit is a Data Word.

The next transmission to take place is a data word from the transmit buffer. This must be called before transmission to distinguish between sending of a data or CRC word.

Parameters

[in] spi Unsigned int32. SPI peripheral identifier SPI Register base address.

Definition at line 291 of file spi_common_all.c.

References SPI_CR1.

◆ spi_set_next_tx_from_crc()

void spi_set_next_tx_from_crc ( uint32_t spi )

SPI Next Transmit is a CRC Word.

The next transmission to take place is a crc word from the hardware crc unit. This must be called before transmission to distinguish between sending of a data or CRC word.

Parameters

[in] spi Unsigned int32. SPI peripheral identifier SPI Register base address.

Definition at line 306 of file spi_common_all.c.

References SPI_CR1, and SPI_CR1_CRCNEXT.

◆ spi_set_nss_high()

void spi_set_nss_high ( uint32_t spi )

SPI Set the Software NSS Signal High.

In slave mode, and only when software slave management is used, this replaces the NSS signal with a slave select enable signal.

Parameters

[in] spi Unsigned int32. SPI peripheral identifier SPI Register base address.

Definition at line 375 of file spi_common_all.c.

References SPI_CR1, and SPI_CR1_SSI.

◆ spi_set_nss_low()

void spi_set_nss_low ( uint32_t spi )

SPI Set the Software NSS Signal Low.

In slave mode, and only when software slave management is used, this replaces the NSS signal with a slave select disable signal.

Parameters

[in] spi Unsigned int32. SPI peripheral identifier SPI Register base address.

Definition at line 389 of file spi_common_all.c.

References SPI_CR1.

◆ spi_set_receive_only_mode()

void spi_set_receive_only_mode ( uint32_t spi )

SPI Set Receive Only Mode for Simplex (2-wire) Unidirectional Transfers.

Parameters

[in] spi Unsigned int32. SPI peripheral identifier SPI Register base address.

Definition at line 329 of file spi_common_all.c.

References SPI_CR1, and SPI_CR1_RXONLY.

◆ spi_set_slave_mode()

void spi_set_slave_mode ( uint32_t spi )

SPI Set to Slave Mode.

Parameters

[in] spi Unsigned int32. SPI peripheral identifier SPI Register base address.

Definition at line 456 of file spi_common_all.c.

References SPI_CR1.

◆ spi_set_standard_mode()

void spi_set_standard_mode	(	uint32_t	spi,
		uint8_t	mode
	)

SPI Standard Mode selection.

Set SPI standard Modes

Mode	CPOL	CPHA
0	0	0
1	0	1
2	1	0
3	1	1

Parameters

[in]	spi	Unsigned int32. SPI peripheral identifier SPI Register base address.
[in]	mode	Unsigned int8. Standard SPI mode (0, 1, 2, 3)

See also: spi_set_clock_phase_0 spi_set_clock_phase_1; spi_set_clock_polarity_0 spi_set_clock_polarity_1

Definition at line 671 of file spi_common_all.c.

References SPI_CR1, SPI_CR1_CPHA, and SPI_CR1_CPOL.

◆ spi_set_unidirectional_mode()

void spi_set_unidirectional_mode ( uint32_t spi )

SPI Set Unidirectional Mode.

The SPI peripheral is set for unidirectional transfers. This is used in full duplex mode or when the SPI is placed in two-wire simplex mode that uses a clock wire and a unidirectional data wire.

Parameters

[in] spi Unsigned int32. SPI peripheral identifier SPI Register base address.

Definition at line 220 of file spi_common_all.c.

References SPI_CR1.

◆ spi_write()

void spi_write	(	uint32_t	spi,
		uint16_t	data
	)

SPI Data Write.

Data is written to the SPI interface.

Parameters

[in]	spi	Unsigned int32. SPI peripheral identifier SPI Register base address.
[in]	data	Unsigned int16. 8 or 16 bit data to be written.

Definition at line 131 of file spi_common_all.c.

References SPI_DR.

Referenced by spi_xfer().

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◆ spi_xfer()

uint16_t spi_xfer	(	uint32_t	spi,
		uint16_t	data
	)

SPI Data Write and Read Exchange.

Data is written to the SPI interface, then a read is done after the incoming transfer has finished.

Parameters

[in]	spi	Unsigned int32. SPI peripheral identifier SPI Register base address.
[in]	data	Unsigned int16. 8 or 16 bit data to be written.

Returns: data Unsigned int16. 8 or 16 bit data.

Definition at line 185 of file spi_common_all.c.

References SPI_DR, SPI_SR, SPI_SR_RXNE, and spi_write().

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Macros

Functions

Detailed Description

Macro Definition Documentation

◆ SPI_CR2_FRF

◆ SPI_CR2_FRF_MOTOROLA_MODE

◆ SPI_CR2_FRF_TI_MODE

◆ SPI_SR_FRE

◆ SPI_SR_TIFRFE

Function Documentation

◆ spi_clean_disable()

◆ spi_disable()

◆ spi_disable_crc()

◆ spi_disable_error_interrupt()

◆ spi_disable_rx_buffer_not_empty_interrupt()

◆ spi_disable_rx_dma()

◆ spi_disable_software_slave_management()

◆ spi_disable_ss_output()

◆ spi_disable_tx_buffer_empty_interrupt()

◆ spi_disable_tx_dma()

◆ spi_enable()

◆ spi_enable_crc()

◆ spi_enable_error_interrupt()

◆ spi_enable_rx_buffer_not_empty_interrupt()

◆ spi_enable_rx_dma()

◆ spi_enable_software_slave_management()

◆ spi_enable_ss_output()

◆ spi_enable_tx_buffer_empty_interrupt()

◆ spi_enable_tx_dma()

◆ spi_init_master()

◆ spi_read()

◆ spi_send()

◆ spi_send_lsb_first()

◆ spi_send_msb_first()

◆ spi_set_baudrate_prescaler()

◆ spi_set_bidirectional_mode()

◆ spi_set_bidirectional_receive_only_mode()

◆ spi_set_bidirectional_transmit_only_mode()

◆ spi_set_clock_phase_0()

◆ spi_set_clock_phase_1()

◆ spi_set_clock_polarity_0()

◆ spi_set_clock_polarity_1()

◆ spi_set_dff_16bit()

◆ spi_set_dff_8bit()

◆ spi_set_frf_motorola()

◆ spi_set_frf_ti()

◆ spi_set_full_duplex_mode()

◆ spi_set_master_mode()

◆ spi_set_next_tx_from_buffer()

◆ spi_set_next_tx_from_crc()

◆ spi_set_nss_high()

◆ spi_set_nss_low()

◆ spi_set_receive_only_mode()

◆ spi_set_slave_mode()

◆ spi_set_standard_mode()

◆ spi_set_unidirectional_mode()

◆ spi_write()

◆ spi_xfer()