libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
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libopencm3 Cortex Nested Vectored Interrupt Controller More...
Modules | |
NVIC Registers | |
Cortex M0/M3/M4 System Interrupts | |
IRQ numbers -3 and -6 to -9 are reserved. | |
User interrupts for STM32 G0 series | |
Functions | |
void | nvic_enable_irq (uint8_t irqn) |
NVIC Enable Interrupt. More... | |
void | nvic_disable_irq (uint8_t irqn) |
NVIC Disable Interrupt. More... | |
uint8_t | nvic_get_pending_irq (uint8_t irqn) |
NVIC Return Pending Interrupt. More... | |
void | nvic_set_pending_irq (uint8_t irqn) |
NVIC Set Pending Interrupt. More... | |
void | nvic_clear_pending_irq (uint8_t irqn) |
NVIC Clear Pending Interrupt. More... | |
uint8_t | nvic_get_irq_enabled (uint8_t irqn) |
NVIC Return Enabled Interrupt. More... | |
void | nvic_set_priority (uint8_t irqn, uint8_t priority) |
NVIC Set Interrupt Priority. More... | |
void | reset_handler (void) |
void | nmi_handler (void) |
void | hard_fault_handler (void) |
void | sv_call_handler (void) |
void | pend_sv_handler (void) |
void | sys_tick_handler (void) |
libopencm3 Cortex Nested Vectored Interrupt Controller
LGPL License Terms libopencm3 License
void hard_fault_handler | ( | void | ) |
void nmi_handler | ( | void | ) |
void nvic_clear_pending_irq | ( | uint8_t | irqn | ) |
NVIC Clear Pending Interrupt.
Force remove a user interrupt from a pending state. This has no effect if the interrupt is actively being serviced.
[in] | irqn | Unsigned int8. Interrupt number User interrupts for STM32 G0 series |
Definition at line 112 of file nvic.c.
References NVIC_ICPR.
void nvic_disable_irq | ( | uint8_t | irqn | ) |
NVIC Disable Interrupt.
Disables a user interrupt.
[in] | irqn | Unsigned int8. Interrupt number User interrupts for STM32 G0 series |
Definition at line 70 of file nvic.c.
References NVIC_ICER.
void nvic_enable_irq | ( | uint8_t | irqn | ) |
NVIC Enable Interrupt.
Enables a user interrupt.
[in] | irqn | Unsigned int8. Interrupt number User interrupts for STM32 G0 series |
Definition at line 57 of file nvic.c.
References NVIC_ISER.
uint8_t nvic_get_irq_enabled | ( | uint8_t | irqn | ) |
NVIC Return Enabled Interrupt.
[in] | irqn | Unsigned int8. Interrupt number User interrupts for STM32 G0 series |
Definition at line 126 of file nvic.c.
References NVIC_ISER.
uint8_t nvic_get_pending_irq | ( | uint8_t | irqn | ) |
NVIC Return Pending Interrupt.
True if the interrupt has occurred and is waiting for service.
[in] | irqn | Unsigned int8. Interrupt number User interrupts for STM32 G0 series |
Definition at line 84 of file nvic.c.
References NVIC_ISPR.
void nvic_set_pending_irq | ( | uint8_t | irqn | ) |
NVIC Set Pending Interrupt.
Force a user interrupt to a pending state. This has no effect if the interrupt is already pending.
[in] | irqn | Unsigned int8. Interrupt number User interrupts for STM32 G0 series |
Definition at line 98 of file nvic.c.
References NVIC_ISPR.
void nvic_set_priority | ( | uint8_t | irqn, |
uint8_t | priority | ||
) |
NVIC Set Interrupt Priority.
There are 4 priority levels only, given by the upper two bits of the priority byte, as required by ARM standards. No grouping available.
[in] | irqn | Interrupt number User interrupts for STM32 G0 series |
[in] | priority | Interrupt priority (0 ... 255 in steps of 16) |
Definition at line 152 of file nvic.c.
References NVIC_IPR32, NVIC_IRQ_COUNT, and SCB_SHPR32.
void pend_sv_handler | ( | void | ) |
void reset_handler | ( | void | ) |
Definition at line 62 of file vector.c.
References __fini_array_end, __fini_array_start, __init_array_end, __init_array_start, __preinit_array_end, __preinit_array_start, _data, _data_loadaddr, _ebss, _edata, main(), pre_main(), SCB_CCR, and SCB_CCR_STKALIGN.
void sv_call_handler | ( | void | ) |
void sys_tick_handler | ( | void | ) |