IER ADC interrupt enable register
Collaboration diagram for IER ADC interrupt enable register:
Macros | |
| #define | ADC_IER_CCRDYIE (1 << 13) |
| CCRDYIE: Channel Configuration Ready Interrupt enable bit. More... | |
| #define | ADC_IER_AWD1IE (1 << 7) |
| AWD1IE: Analog watchdog 1 interrupt enable. More... | |
| #define | ADC_IER_OVRIE (1 << 4) |
| OVRIE: Overrun interrupt enable. More... | |
| #define | ADC_IER_EOSIE (1 << 3) |
| EOSIE: End of regular sequence of conversions interrupt enable. More... | |
| #define | ADC_IER_EOSEQIE ADC_IER_EOSIE /* TODO - keep only one? */ |
| #define | ADC_IER_EOCIE (1 << 2) |
| EOCIE: End of regular conversion interrupt enable. More... | |
| #define | ADC_IER_EOSMPIE (1 << 1) |
| EOSMPIE: End of sampling flag interrupt enable for regular conversions. More... | |
| #define | ADC_IER_ADRDYIE (1 << 0) |
| ADRDYIE: ADC ready interrupt enable. More... | |
Detailed Description
Macro Definition Documentation
◆ ADC_IER_ADRDYIE
| #define ADC_IER_ADRDYIE (1 << 0) |
ADRDYIE: ADC ready interrupt enable.
Definition at line 101 of file adc_common_v2.h.
◆ ADC_IER_AWD1IE
| #define ADC_IER_AWD1IE (1 << 7) |
AWD1IE: Analog watchdog 1 interrupt enable.
Definition at line 90 of file adc_common_v2.h.
◆ ADC_IER_CCRDYIE
| #define ADC_IER_CCRDYIE (1 << 13) |
◆ ADC_IER_EOCIE
| #define ADC_IER_EOCIE (1 << 2) |
EOCIE: End of regular conversion interrupt enable.
Definition at line 97 of file adc_common_v2.h.
◆ ADC_IER_EOSEQIE
| #define ADC_IER_EOSEQIE ADC_IER_EOSIE /* TODO - keep only one? */ |
Definition at line 95 of file adc_common_v2.h.
◆ ADC_IER_EOSIE
| #define ADC_IER_EOSIE (1 << 3) |
EOSIE: End of regular sequence of conversions interrupt enable.
Definition at line 94 of file adc_common_v2.h.
◆ ADC_IER_EOSMPIE
| #define ADC_IER_EOSMPIE (1 << 1) |
EOSMPIE: End of sampling flag interrupt enable for regular conversions.
Definition at line 99 of file adc_common_v2.h.
◆ ADC_IER_OVRIE
| #define ADC_IER_OVRIE (1 << 4) |
OVRIE: Overrun interrupt enable.
Definition at line 92 of file adc_common_v2.h.
