libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
CFGR2 SYSCFG configuration register 2
Collaboration diagram for CFGR2 SYSCFG configuration register 2:

Macros

#define SYSCFG_CFGR2_PB2_CDEN   (1 << 23)
 SYSCFG_CFGR2_PB2_CDEN PB2 clamping diode enable. More...
 
#define SYSCFG_CFGR2_PB1_CDEN   (1 << 22)
 SYSCFG_CFGR2_PB1_CDEN PB1 clamping diode enable. More...
 
#define SYSCFG_CFGR2_PB0_CDEN   (1 << 21)
 SYSCFG_CFGR2_PB0_CDEN PB0 clamping diode enable. More...
 
#define SYSCFG_CFGR2_PA13_CDEN   (1 << 20)
 SYSCFG_CFGR2_PA13_CDEN PA13 clamping diode enable. More...
 
#define SYSCFG_CFGR2_PA6_CDEN   (1 << 19)
 SYSCFG_CFGR2_PA6_CDEN PA6 clamping diode enable. More...
 
#define SYSCFG_CFGR2_PA5_CDEN   (1 << 18)
 SYSCFG_CFGR2_PA5_CDEN PA5 clamping diode enable. More...
 
#define SYSCFG_CFGR2_PA3_CDEN   (1 << 17)
 SYSCFG_CFGR2_PA3_CDEN PA3 clamping diode enable. More...
 
#define SYSCFG_CFGR2_PA1_CDEN   (1 << 16)
 SYSCFG_CFGR2_PA1_CDEN PA1 clamping diode enable. More...
 
#define SYSCFG_CFGR2_SRAM_PEF   (1 << 8)
 SYSCFG_CFGR2_SRAM_PEF SRAM parity error flag. More...
 
#define SYSCFG_CFGR2_ECC_LOCK   (1 << 3)
 SYSCFG_CFGR2_ECC_LOCK ECC error lock bit. More...
 
#define SYSCFG_CFGR2_PVD_LOCK   (1 << 2)
 SYSCFG_CFGR2_PVD_LOCK PVD lock enable bit. More...
 
#define SYSCFG_CFGR2_SRAM_PARITY_LOCK   (1 << 1)
 SYSCFG_CFGR2_SRAM_PARITY_LOCK SRAM parity lock bit. More...
 
#define SYSCFG_CFGR2_LOCKUP_LOCK   (1 << 0)
 SYSCFG_CFGR2_LOCKUP_LOCK Cortex-M0+ LOCKUP bit enable bit. More...
 

Detailed Description

Macro Definition Documentation

◆ SYSCFG_CFGR2_ECC_LOCK

#define SYSCFG_CFGR2_ECC_LOCK   (1 << 3)

SYSCFG_CFGR2_ECC_LOCK ECC error lock bit.

Definition at line 144 of file syscfg.h.

◆ SYSCFG_CFGR2_LOCKUP_LOCK

#define SYSCFG_CFGR2_LOCKUP_LOCK   (1 << 0)

SYSCFG_CFGR2_LOCKUP_LOCK Cortex-M0+ LOCKUP bit enable bit.

Definition at line 153 of file syscfg.h.

◆ SYSCFG_CFGR2_PA13_CDEN

#define SYSCFG_CFGR2_PA13_CDEN   (1 << 20)

SYSCFG_CFGR2_PA13_CDEN PA13 clamping diode enable.

Definition at line 126 of file syscfg.h.

◆ SYSCFG_CFGR2_PA1_CDEN

#define SYSCFG_CFGR2_PA1_CDEN   (1 << 16)

SYSCFG_CFGR2_PA1_CDEN PA1 clamping diode enable.

Definition at line 138 of file syscfg.h.

◆ SYSCFG_CFGR2_PA3_CDEN

#define SYSCFG_CFGR2_PA3_CDEN   (1 << 17)

SYSCFG_CFGR2_PA3_CDEN PA3 clamping diode enable.

Definition at line 135 of file syscfg.h.

◆ SYSCFG_CFGR2_PA5_CDEN

#define SYSCFG_CFGR2_PA5_CDEN   (1 << 18)

SYSCFG_CFGR2_PA5_CDEN PA5 clamping diode enable.

Definition at line 132 of file syscfg.h.

◆ SYSCFG_CFGR2_PA6_CDEN

#define SYSCFG_CFGR2_PA6_CDEN   (1 << 19)

SYSCFG_CFGR2_PA6_CDEN PA6 clamping diode enable.

Definition at line 129 of file syscfg.h.

◆ SYSCFG_CFGR2_PB0_CDEN

#define SYSCFG_CFGR2_PB0_CDEN   (1 << 21)

SYSCFG_CFGR2_PB0_CDEN PB0 clamping diode enable.

Definition at line 123 of file syscfg.h.

◆ SYSCFG_CFGR2_PB1_CDEN

#define SYSCFG_CFGR2_PB1_CDEN   (1 << 22)

SYSCFG_CFGR2_PB1_CDEN PB1 clamping diode enable.

Definition at line 120 of file syscfg.h.

◆ SYSCFG_CFGR2_PB2_CDEN

#define SYSCFG_CFGR2_PB2_CDEN   (1 << 23)

SYSCFG_CFGR2_PB2_CDEN PB2 clamping diode enable.

Definition at line 117 of file syscfg.h.

◆ SYSCFG_CFGR2_PVD_LOCK

#define SYSCFG_CFGR2_PVD_LOCK   (1 << 2)

SYSCFG_CFGR2_PVD_LOCK PVD lock enable bit.

Definition at line 147 of file syscfg.h.

◆ SYSCFG_CFGR2_SRAM_PARITY_LOCK

#define SYSCFG_CFGR2_SRAM_PARITY_LOCK   (1 << 1)

SYSCFG_CFGR2_SRAM_PARITY_LOCK SRAM parity lock bit.

Definition at line 150 of file syscfg.h.

◆ SYSCFG_CFGR2_SRAM_PEF

#define SYSCFG_CFGR2_SRAM_PEF   (1 << 8)

SYSCFG_CFGR2_SRAM_PEF SRAM parity error flag.

Definition at line 141 of file syscfg.h.