libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
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System Control Reset Cause Register Values. More...
Macros | |
#define | SYSCTL_RESC_MOSCFAIL (1 << 16) |
MOSC Failure Reset. More... | |
#define | SYSCTL_RESC_HSSR (1 << 12) |
HSSR Reset. More... | |
#define | SYSCTL_RESC_WDT1 (1 << 5) |
Watchdog Timer 1 Reset. More... | |
#define | SYSCTL_RESC_SW (1 << 4) |
Software Reset. More... | |
#define | SYSCTL_RESC_WDT0 (1 << 3) |
Watchdog Timer 0 Reset. More... | |
#define | SYSCTL_RESC_BOR (1 << 2) |
Brown-Out Reset. More... | |
#define | SYSCTL_RESC_POR (1 << 1) |
Power-On Reset. More... | |
#define | SYSCTL_RESC_EXT (1 << 0) |
External Reset. More... | |
System Control Reset Cause Register Values.
#define SYSCTL_RESC_BOR (1 << 2) |
Brown-Out Reset.
Definition at line 600 of file systemcontrol.h.
#define SYSCTL_RESC_EXT (1 << 0) |
External Reset.
Definition at line 604 of file systemcontrol.h.
#define SYSCTL_RESC_HSSR (1 << 12) |
HSSR Reset.
Definition at line 592 of file systemcontrol.h.
#define SYSCTL_RESC_MOSCFAIL (1 << 16) |
MOSC Failure Reset.
Definition at line 590 of file systemcontrol.h.
#define SYSCTL_RESC_POR (1 << 1) |
Power-On Reset.
Definition at line 602 of file systemcontrol.h.
#define SYSCTL_RESC_SW (1 << 4) |
Software Reset.
Definition at line 596 of file systemcontrol.h.
#define SYSCTL_RESC_WDT0 (1 << 3) |
Watchdog Timer 0 Reset.
Definition at line 598 of file systemcontrol.h.
#define SYSCTL_RESC_WDT1 (1 << 5) |
Watchdog Timer 1 Reset.
Definition at line 594 of file systemcontrol.h.