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libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
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#include <libopencm3/cm3/common.h>

Go to the source code of this file.
Macros | |
| #define | SYSCTL_BASE (0x400FE000U) |
| System Control Base Address. More... | |
| #define | HIB_BASE (0x400FC000U) |
| Hibernation Module Base Address. More... | |
| #define | FLASH_CTRL_BASE (0x400FD000U) |
| Flash Controller Base Address. More... | |
| #define | EEPROM_BASE (0x400AF000U) |
| EEPROM Controller Base Address. More... | |
| #define | DMA_BASE (0x400FF000U) |
| Micro Direct Memory Access Base Address. More... | |
| #define | AES_BASE (0x44036000U) |
| Advance Encryption Standard Accelerator Base Address. More... | |
| #define | ADC0_BASE (0x40038000U) |
| Analog-to-Digital Converter Base Address. More... | |
| #define | ADC1_BASE (0x40039000U) |
| #define | CAN0_BASE (0x40040000U) |
| Controller Area Network Base Address. More... | |
| #define | CAN1_BASE (0x40041000U) |
| #define | ACMP_BASE (0x4003C000U) |
| Analog Comparator Base Address. More... | |
| #define | CRC_BASE (0x44030000U) |
| Cyclical Redundancy Check Base Address. More... | |
| #define | DES_BASE (0x44038000U) |
| Data Encryption Standard Accelerator Base Address. More... | |
| #define | EMAC_BASE (0x400EC000U) |
| Ethernet Controller Base Address. More... | |
| #define | EPI0_BASE (0x400D0000U) |
| External Peripheral Interface Base Address. More... | |
| #define | GPIOA_APB_BASE (0x40004000U) |
| General-Purpose Input/Outputs Base Address. More... | |
| #define | GPIOB_APB_BASE (0x40005000U) |
| #define | GPIOC_APB_BASE (0x40006000U) |
| #define | GPIOD_APB_BASE (0x40007000U) |
| #define | GPIOE_APB_BASE (0x40024000U) |
| #define | GPIOF_APB_BASE (0x40025000U) |
| #define | GPIOG_APB_BASE (0x40026000U) |
| #define | GPIOH_APB_BASE (0x40027000U) |
| #define | GPIOJ_APB_BASE (0x4003D000U) |
| #define | GPIOA_BASE (0x40058000U) |
| General-Purpose Input/Outputs (AHB) Base Address. More... | |
| #define | GPIOB_BASE (0x40059000U) |
| #define | GPIOC_BASE (0x4005A000U) |
| #define | GPIOD_BASE (0x4005B000U) |
| #define | GPIOE_BASE (0x4005C000U) |
| #define | GPIOF_BASE (0x4005D000U) |
| #define | GPIOG_BASE (0x4005E000U) |
| #define | GPIOH_BASE (0x4005F000U) |
| #define | GPIOJ_BASE (0x40060000U) |
| #define | GPIOK_BASE (0x40061000U) |
| #define | GPIOL_BASE (0x40062000U) |
| #define | GPIOM_BASE (0x40063000U) |
| #define | GPION_BASE (0x40064000U) |
| #define | GPIOP_BASE (0x40065000U) |
| #define | GPIOQ_BASE (0x40066000U) |
| #define | TIM0_BASE (0x40030000U) |
| General-Purpose Timers Base Address. More... | |
| #define | TIM1_BASE (0x40031000U) |
| #define | TIM2_BASE (0x40032000U) |
| #define | TIM3_BASE (0x40033000U) |
| #define | TIM4_BASE (0x40034000U) |
| #define | TIM5_BASE (0x40035000U) |
| #define | TIM6_BASE (0x400E0000U) |
| #define | TIM7_BASE (0x400E1000U) |
| #define | I2C0_BASE (0x40020000U) |
| Inter-Integrated Circuit Base Address. More... | |
| #define | I2C1_BASE (0x40021000U) |
| #define | I2C2_BASE (0x40022000U) |
| #define | I2C3_BASE (0x40023000U) |
| #define | I2C4_BASE (0x400C0000U) |
| #define | I2C5_BASE (0x400C1000U) |
| #define | I2C6_BASE (0x400C2000U) |
| #define | I2C7_BASE (0x400C3000U) |
| #define | I2C8_BASE (0x400B8000U) |
| #define | I2C9_BASE (0x400B9000U) |
| #define | LCD_BASE (0x44050000U) |
| LCD Controller Base Address. More... | |
| #define | PWM0_BASE (0x40028000U) |
| Pulse Width Modulator Base Address. More... | |
| #define | ONEWIRE_BASE (0x400B6000U) |
| 1-Wire Master Module Base Address More... | |
| #define | SSI0_BASE (0x40008000U) |
| Quad Synchronous Serial Interface Base Address. More... | |
| #define | SSI1_BASE (0x40009000U) |
| #define | SSI2_BASE (0x4000A000U) |
| #define | SSI3_BASE (0x4000B000U) |
| #define | QEI0_BASE (0x4002C000U) |
| Quadrature Encoder Interface Base Address. More... | |
| #define | SHA_BASE (0x44034000U) |
| SHA/MD5 Accelerator Base Address. More... | |
| #define | UART0_BASE (0x4000C000U) |
| Universal Asynchronous Receiver/Transmitter Base Address. More... | |
| #define | UART1_BASE (0x4000D000U) |
| #define | UART2_BASE (0x4000E000U) |
| #define | UART3_BASE (0x4000F000U) |
| #define | UART4_BASE (0x40010000U) |
| #define | UART5_BASE (0x40011000U) |
| #define | UART6_BASE (0x40012000U) |
| #define | UART7_BASE (0x40013000U) |
| #define | USB_BASE (0x40050000U) |
| Universal Serial Bus Controller Base Address. More... | |
| #define | WDT0_BASE (0x40000000U) |
| Watchdog Timers Base Address. More... | |
| #define | WDT1_BASE (0x40001000U) |