#include <libopencm3/cm3/common.h>
#include <libopencm3/cm3/memorymap.h>
#include <libopencm3/pac55xx/memorymap.h>
#include <libopencm3/pac55xx/memctl.h>

Include dependency graph for ccs.h:

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Go to the source code of this file.

Data Structures
struct	ccs_clk_config
	CCS Clock Configuration structure. More...

Macros
#define	CCS_ROSC_FREQ (16000000U)
	Ring Oscillator Frequency. More...

#define	CCS_CLKREF_FREQ (4000000U)
	Internally generated and trimmed 4MHz clock. More...

#define	CCS_EXTCLK_MAX_FREQ (20000000U)
	Maximum external clock frequency. More...

#define	CCSCTL MMIO32(SCC_BASE)

#define	CCS_CTL_FRCLKMUXSEL_MASK (0x03)

#define	CCS_CTL_FRCLKMUXSEL(sel) ((sel) & CCS_CTL_FRCLKMUXSEL_MASK)

#define	CCS_CTL_FRCLKMUXSEL_ROSC (0)

#define	CCS_CTL_FRCLKMUXSEL_CLKREF (1)

#define	CCS_CTL_FRCLKMUXSEL_EXTCLK (3)

#define	CCS_CTL_ROSCEN BIT2

#define	CCS_CTL_SCLKMUXSEL BIT4

#define	CCS_CTL_SCLKMUXSEL_FRCLK (0)

#define	CCS_CTL_SCLKMUXSEL_PLLCLK (1)

#define	CCS_CTL_CLKFAILEN BIT5

#define	CCS_CTL_CLKFAILMUXSEL BIT6

#define	CCS_CTL_CLKFAILIF BIT7

#define	CCS_CTL_LDOEN BIT8

#define	CCS_CTL_SWRESET BIT11

#define	CCS_CTL_PCLKEN BIT12

#define	CCS_CTL_ACLKEN BIT13

#define	CCS_CTL_ADCCLKEN BIT14

#define	CCS_CTL_STCLKSLPEN BIT15

#define	CCS_CTL_PCLKDIV_MASK (0x07)

#define	CCS_CTL_PCLKDIV_SHIFT (16)

#define	CCS_CTL_PCLKDIV(div) (((div-1) & CCS_CTL_PCLKDIV_MASK) << CCS_CTL_PCLKDIV_SHIFT)

#define	CCS_CTL_ACLKDIV_MASK (0x07)

#define	CCS_CTL_ACLKDIV_SHIFT (20)

#define	CCS_CTL_ACLKDIV(div) (((div-1) & CCS_CTL_ACLKDIV_MASK) << CCS_CTL_ACLKDIV_SHIFT)

#define	CCS_CTL_HCLKDIV_MASK (0x07)

#define	CCS_CTL_HCLKDIV_SHIFT (24)

#define	CCS_CTL_HCLKDIV(div) (((div-1) & CCS_CTL_HCLKDIV_MASK) << CCS_CTL_HCLKDIV_SHIFT)

#define	CCS_CTL_USAMODE BIT28

#define	CCS_CTL_USBMODE BIT29

#define	CCS_CTL_USCMODE BIT30

#define	CCS_CTL_USDMODE BIT31

#define	CCSPLLCTL MMIO32(SCC_BASE + 0x04)

#define	CCS_PLLCTL_PLLEN BIT0
	PLL Enable. More...

#define	CCS_PLLCTL_PLLBP BIT1
	PLL Bypass. More...

#define	CCS_PLLCTL_PLLOUTDIV_MASK (0x03)

#define	CCS_PLLCTL_PLLOUTDIV_SHIFT (2)

#define	CCS_PLLCTL_PLLOUTDIV(div) (((div) & CCS_PLLCTL_PLLOUTDIV_MASK) << CCS_PLLCTL_PLLOUTDIV_SHIFT)
	PLL Output Divisor. More...

#define	CCS_PLLCTL_PLLOUTDIV1 (0)

#define	CCS_PLLCTL_PLLOUTDIV2 (1)

#define	CCS_PLLCTL_PLLOUTDIV4 (2)

#define	CCS_PLLCTL_PLLOUTDIV8 (3)

#define	CCS_PLLCTL_PLLINDIV_MASK (0x0F)

#define	CCS_PLLCTL_PLLINDIV_SHIFT (4)

#define	CCS_PLLCTL_PLLINDIV(div) (((div) & CCS_PLLCTL_PLLINDIV_MASK) << CCS_PLLCTL_PLLINDIV_SHIFT)
	PLL Input Divisor. More...

#define	CCS_PLLCTL_PLLFBDIV_MASK (0x3FFF)

#define	CCS_PLLCTL_PLLFBDIV_SHIFT (8)

#define	CCS_PLLCTL_PLLFBDIV(div) (((div) & CCS_PLLCTL_PLLFBDIV_MASK) << CCS_PLLCTL_PLLFBDIV_SHIFT)
	PLL Feedback Divisor. More...

#define	CCS_PLLCTL_PLLLOCK BIT24
	PLL Lock. More...

#define	CCSROSCTRIM_MASK (0x7F)

#define	CCSROSCTRIM MMIO32(SCC_BASE + 0x08)

#define	CCS_PORTA (SCC_BASE + 0x0C)

#define	CCS_PORTB (SCC_BASE + 0x10)

#define	CCS_PORTC (SCC_BASE + 0x14)

#define	CCS_PORTD (SCC_BASE + 0x18)

#define	CCS_PORTE (SCC_BASE + 0x1C)

#define	CCS_PORTF (SCC_BASE + 0x20)

#define	CCS_PORTG (SCC_BASE + 0x24)

#define	CCS_MUXSELR(base) MMIO32(base)

#define	CCS_PAMUXSELR CCS_MUXSELR(CCS_PORTA)

#define	CCS_PBMUXSELR CCS_MUXSELR(CCS_PORTB)

#define	CCS_PCMUXSELR CCS_MUXSELR(CCS_PORTC)

#define	CCS_PDMUXSELR CCS_MUXSELR(CCS_PORTD)

#define	CCS_PEMUXSELR CCS_MUXSELR(CCS_PORTE)

#define	CCS_PFMUXSELR CCS_MUXSELR(CCS_PORTF)

#define	CCS_PGMUXSELR CCS_MUXSELR(CCS_PORTG)

#define	CCS_MUXSELR_MASK 0x7

#define	CCS_MUXSELR_MASK_PIN(pin) (CCS_MUXSELR_MASK << ((pin) * 4))

#define	CCS_MUXSELR_VAL(pin, muxsel) (((muxsel) & CCS_MUXSELR_MASK) << ((pin) * 4))

#define	CCS_PUENR(base) MMIO32(base + 0x1C)

#define	CCS_PAPUENR CCS_PUENR(CCS_PORTA)

#define	CCS_PBPUENR CCS_PUENR(CCS_PORTB)

#define	CCS_PCPUENR CCS_PUENR(CCS_PORTC)

#define	CCS_PDPUENR CCS_PUENR(CCS_PORTD)

#define	CCS_PEPUENR CCS_PUENR(CCS_PORTE)

#define	CCS_PFPUENR CCS_PUENR(CCS_PORTF)

#define	CCS_PGPUENR CCS_PUENR(CCS_PORTG)

#define	CCS_PDENR(base) MMIO32(base + 0x38)

#define	CCS_PAPDENR CCS_PDENR(CCS_PORTA)

#define	CCS_PBPDENR CCS_PDENR(CCS_PORTB)

#define	CCS_PCPDENR CCS_PDENR(CCS_PORTC)

#define	CCS_PDPDENR CCS_PDENR(CCS_PORTD)

#define	CCS_PEPDENR CCS_PDENR(CCS_PORTE)

#define	CCS_PFPDENR CCS_PDENR(CCS_PORTF)

#define	CCS_PGPDENR CCS_PDENR(CCS_PORTG)

#define	CCS_DSR(base) MMIO32(base + 0x54)

#define	CCS_PADSR CCS_DSR(CCS_PORTA)

#define	CCS_PBDSR CCS_DSR(CCS_PORTB)

#define	CCS_PCDSR CCS_DSR(CCS_PORTC)

#define	CCS_PDDSR CCS_DSR(CCS_PORTD)

#define	CCS_PEDSR CCS_DSR(CCS_PORTE)

#define	CCS_PFDSR CCS_DSR(CCS_PORTF)

#define	CCS_PGDSR CCS_DSR(CCS_PORTG)

#define	CCS_DSR_MASK 0x7

#define	CCS_DSR_MASK_PIN(pin) (CCS_DSR_MASK << ((pin) * 4))

#define	CCS_DSR_DS_VAL(pin, ds) (((ds)&CCS_DSR_MASK) << ((pin)*4))

#define	CCS_DSR_SCHMIDT_PIN(pin) (BIT0 << (((pin)*4) + 3))

Enumerations
enum	ccs_muxsel_func_t { CCS_MUXSEL_GPIO = 0 , CCS_MUXSEL_AF1 = 1 , CCS_MUXSEL_AF2 = 2 , CCS_MUXSEL_AF3 = 3 , CCS_MUXSEL_AF4 = 4 , CCS_MUXSEL_AF5 = 5 , CCS_MUXSEL_AF6 = 6 , CCS_MUXSEL_AF7 = 7 }

enum	ccs_pull_updown_t { CCS_IO_PULL_NONE = 0 , CCS_IO_PULL_UP = 1 , CCS_IO_PULL_DOWN = 2 }
	Pull Up/Down enum for type specificity. More...

enum	ccs_drive_strength_t { CCS_DSR_DS_6MA = 0x00 , CCS_DSR_DS_8MA = 0x01 , CCS_DSR_DS_11MA = 0x02 , CCS_DSR_DS_14MA = 0x03 , CCS_DSR_DS_17MA = 0x04 , CCS_DSR_DS_20MA = 0x05 , CCS_DSR_DS_22MA = 0x06 , CCS_DSR_DS_25MA = 0x07 }
	Drive strength enumeration for type specificity. More...

Functions
void	ccs_frclkmux_select (uint32_t sel)
	Select the source for FRCLK. More...

void	ccs_rosc_enable (void)
	Enable the 16MHz Ring oscillator. More...

void	ccs_rosc_disable (void)
	Disable the 16MHz Ring oscillator. More...

void	ccs_sclkmux_select_frclk (void)
	Select FRCLK for SCLK. More...

void	ccs_sclkmux_select_pllclk (void)
	Select PLLCLK for SCLK. More...

void	ccs_clkfail_enable (void)
	Enable Clock Fail Detection. More...

void	ccs_clkfail_disable (void)
	Disable Clock Fail Detection. More...

void	ccs_clkfailmux_select_frclk (void)
	Select FRCLK for Clock Fail Detection. More...

void	ccs_clkfailmux_select_pllclk (void)
	Select PLLCLK for Clock Fail Detection. More...

void	ccs_ldo_enable (void)
	Enable the LDO. More...

void	ccs_ldo_disable (void)
	Disable the LDO. More...

void	ccs_pclk_enable (void)
	Enable the Peripheral Clock. More...

void	ccs_pclk_disable (void)
	Disable the Peripheral Clock. More...

void	ccs_aclk_enable (void)
	Enable the Auxiliary Clock. More...

void	ccs_aclk_disable (void)
	Disable the Auxiliary Clock. More...

void	ccs_adcclk_enable (void)
	Enable the ADC Clock. More...

void	ccs_adcclk_disable (void)
	Disable the ADC Clock. More...

void	ccs_stclk_sleep_enable (void)
	Enable SysTick clock gating in deep sleep mode. More...

void	ccs_stclk_sleep_disable (void)
	Disable SysTick clock gating in deep sleep mode. More...

void	ccs_set_pclkdiv (uint32_t div)
	Set the divisor for the Peripheral Clock. More...

void	ccs_set_aclkdiv (uint32_t div)
	Set the divisor for the Auxiliary Clock. More...

void	ccs_set_hclkdiv (uint32_t div)
	Set the divisor for the AHB Clock. More...

void	ccs_pll_enable (void)
	Enable the PLL. More...

void	ccs_pll_disable (void)
	Disable the PLL. More...

bool	ccs_pll_locked (void)
	Check if the PLL is locked. More...

void	ccs_pll_bypass_enable (void)
	Enable the PLL bypass. More...

void	ccs_pll_bypass_disable (void)
	Disable the PLL bypass. More...

void	ccs_pll_set_outdiv (uint32_t div)
	Set the output divisor. More...

void	ccs_pll_set_indiv (uint32_t div)
	Set the PLL input divisor. More...

void	ccs_pll_set_fbdiv (uint32_t div)
	Set the PLL feedback divisor. More...

void	css_pll_config_enable (uint32_t indiv, uint32_t fbdiv, uint32_t outdiv)
	Configure the CCS PLL, enable it, and wait for lock. More...

uint32_t	ccs_get_peripheral_clk_freq (uint32_t periph, uint32_t select)
	Get the clock rate (in Hz) of the specified peripheral. More...

void	ccs_reset_clocks (void)
	Restores CCSCTL and CCSPLLCTL registers to default/safe values. More...

void	ccs_configure_clocks (const struct ccs_clk_config *config)
	Setup the PAC55xx clocks with the given struct. More...

Data Structures

Macros

Enumerations

Functions