#include <libopencm3/cm3/common.h>
#include <libopencm3/pac55xx/memorymap.h>

Include dependency graph for memctl.h:

This graph shows which files directly or indirectly include this file:

Macros
#define	MEMCTL_MEMCTLR MMIO32(MEMCTL_BASE)
	Memory Controller Configuration Register. More...

#define	MEMCTL_MEMCTLR_WSTATE_MASK (0xF)

#define	MEMCTL_MEMCTLR_WSTATE(ws) ((ws) & MEMCTL_MEMCTLR_WSTATE_MASK)

#define	MEMCTL_MEMCTLR_MCLKDIV_MASK (0xF)

#define	MEMCTL_MEMCTLR_MCLKDIV_SHIFT 4

#define	MEMCTL_MEMCTLR_MCLKDIV(div) (((div-1) & MEMCTL_MEMCTLR_MCLKDIV_MASK) << MEMCTL_MEMCTLR_MCLKDIV_SHIFT)

#define	MEMCTL_MEMCTLR_WRITEWORDCNT_MASK (0x3)

#define	MEMCTL_MEMCTLR_WRITEWORDCNT_SHIFT 8

#define	MEMCTL_MEMCTLR_WRITEWORDCNT(cnt) (((cnt) & MEMCTL_MEMCTLR_WRITEWORDCNT_MASK) << MEMCTL_MEMCTLR_WRITEWORDCNT_SHIFT)

#define	MEMCTL_MEMCTLR_SEIE BIT16

#define	MEMCTL_MEMCTLR_DEIE BIT17

#define	MEMCTL_MEMCTLR_INVADDRIE BIT18

#define	MEMCTL_MEMCTLR_STBY BIT19

#define	MEMCTL_MEMCTLR_ECCDIS BIT20

#define	MEMCTL_MEMCTLR_CACHEDIS BIT21

#define	MEMCTL_MEMCTLR_MCLKSEL BIT22

#define	MEMCTL_MEMSTATUS MMIO32(MEMCTL_BASE + 0x0004)
	Memory Controller Status Register. More...

#define	MEMCTL_MEMSTATUS_WBUSY BIT0

#define	MEMCTL_MEMSTATUS_EBUSY BIT1

#define	MEMCTL_MEMSTATUS_WRITEWORDCNT_MASK (0x3)

#define	MEMCTL_MEMSTATUS_WRITEWORDCNT_SHIFT 8

#define	MEMCTL_MEMSTATUS_WRITEWORDCNT ((MEMCTL_MEMSTATUS >> MEMCTL_MEMSTATUS_WRITEWORDCNT_SHIFT) & MEMCTL_MEMSTATUS_WRITEWORDCNT_MASK)

#define	MEMCTL_MEMSTATUS_WRITEWORDCNT_4BYTES (0)

#define	MEMCTL_MEMSTATUS_WRITEWORDCNT_8BYTES (1)

#define	MEMCTL_MEMSTATUS_WRITEWORDCNT_12BYTES (2)

#define	MEMCTL_MEMSTATUS_WRITEWORDCNT_16BYTES (3)

#define	MEMCTL_MEMSTATUS_SE BIT16

#define	MEMCTL_MEMSTATUS_DE BIT17

#define	MEMCTL_MEMSTATUS_INVADDR BIT18

#define	MEMCTL_FLASHLOCK MMIO32(MEMCTL_BASE + 0x0008)
	Flash Lock Access Register. More...

#define	MEMCTL_FLASHLOCK_CLEAR (0)

#define	MEMCTL_FLASHLOCK_ALLOW_FLASH_WRITE (0x43DF140A)

#define	MEMCTL_FLASHLOCK_ALLOW_MEMCTL_WRITE (0xD513B490)

#define	MEMCTL_FLASHLOCK_ALLOW_INFO2_SWDFUSE (0x79B4F762)

#define	MEMCTL_FLASHPAGE MMIO32(MEMCTL_BASE + 0x000C)
	Flash Page Address Register. More...

#define	MEMCTL_SWDUNLOCK MMIO32(MEMCTL_BASE + 0x0010)
	SWD Unlock Register. More...

#define	MEMCTL_FLASHERASE MMIO32(MEMCTL_BASE + 0x0020)
	Flash Erase Enable Register. More...

#define	MEMCTL_FLASHERASE_PAGE_ERASE (0x8C799CA7)

#define	MEMCTL_FLASHERASE_MASS_PAGE_ERASE (0x09EE76C9)

#define	MEMCTL_FLASHERASE_INFO3_ERASE (0x1266FF45)

Functions
void	memctl_flash_set_wstate (uint32_t wstate)
	Set the number of wait states for Flash reads. More...

void	memctl_flash_set_mclkdiv (uint32_t div)
	Set the MCLK divisor. More...

void	memctl_flash_reset_write_buffer (void)
	Set WRITEWORDCOUNT to 0 to reset the Flash write data buffer. More...

void	memctl_flash_standby_mode_enable (void)
	Enable Flash Standby Mode. More...

void	memctl_flash_standby_mode_disable (void)
	Disable Flash Standby Mode. More...

void	memctl_flash_cache_enable (void)
	Enable Flash cache. More...

void	memctl_flash_cache_disable (void)
	Disable Flash cache. More...

void	memctl_flash_select_roscclk (void)
	Select ROSCCLK as input to Flash Memory Controller. More...

void	memctl_flash_select_mclk (void)
	Select MCLK as input to Flash Memory Controller. More...

void	memctl_sram_ecc_enable (void)
	Enable SRAM ECC. More...

void	memctl_sram_ecc_disable (void)
	Disable SRAM ECC. More...

void	memctl_sram_ecc_single_bit_interrupt_enable (void)
	Enable SRAM ECC Single Bit Detection Interrupt. More...

void	memctl_sram_ecc_single_bit_interrupt_disable (void)
	Disable SRAM ECC Single Bit Detection Interrupt. More...

void	memctl_sram_ecc_dual_bit_interrupt_enable (void)
	Enable SRAM ECC Dual Bit Detection Interrupt. More...

void	memctl_sram_ecc_dual_bit_interrupt_disable (void)
	Disable SRAM ECC Dual Bit Detection Interrupt. More...

void	memctl_invaddr_interrupt_enable (void)
	Enable Invalid Memory Access Interrupt. More...

void	memctl_invaddr_interrupt_disable (void)
	Disable Invalid Memory Access Interrupt. More...