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| #define | TSC TSC_BASE |
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| #define | TSC_CR MMIO32(TSC_BASE + 0x00) |
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| #define | TSC_IER MMIO32(TSC_BASE + 0x04) |
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| #define | TSC_ICR MMIO32(TSC_BASE + 0x08) |
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| #define | TSC_ISR MMIO32(TSC_BASE + 0x0c) |
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| #define | TSC_IOHCR MMIO32(TSC_BASE + 0x10) |
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| #define | TSC_IOASCR MMIO32(TSC_BASE + 0x18) |
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| #define | TSC_IOSCR MMIO32(TSC_BASE + 0x20) |
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| #define | TSC_IOCCR MMIO32(TSC_BASE + 0x28) |
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| #define | TSC_IOGCSR MMIO32(TSC_BASE + 0x30) |
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| #define | TSC_IOGxCR(x) MMIO32(TSC_BASE + 0x34 + ((x)-1)*4) |
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| #define | TSC_CR_CTPH_SHIFT 28 |
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| #define | TSC_CR_CTPH (0xF << TSC_CR_CTPH_SHIFT) |
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| #define | TSC_CR_CTPL_SHIFT 24 |
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| #define | TSC_CR_CTPL (0x0F << TSC_CR_CTPL_SHIFT) |
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| #define | TSC_CR_SSD_SHIFT 17 |
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| #define | TSC_CR_SSD (0x7F << TSC_CR_SSD_SHIFT) |
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| #define | TSC_CR_SSE (1 << 16) |
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| #define | TSC_CR_SSPSC (1 << 15) |
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| #define | TSC_CR_PGPSC_SHIFT 12 |
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| #define | TSC_CR_PGPSC (7 << TSC_CR_PGPSC_SHIFT) |
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| #define | TSC_CR_MCV_SHIFT 5 |
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| #define | TSC_CR_MCV (7 << TSC_CR_MCV_SHIFT) |
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| #define | TSC_CR_IODEF (1 << 4) |
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| #define | TSC_CR_SYNCPOL (1 << 3) |
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| #define | TSC_CR_AM (1 << 2) |
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| #define | TSC_CR_START (1 << 1) |
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| #define | TSC_CR_TSCE (1 << 0) |
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| #define | TSC_IER_MCEIE (1 << 1) |
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| #define | TSC_IER_EOAIE (1 << 0) |
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| #define | TSC_ICR_MCEIC (1 << 1) |
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| #define | TSC_ICR_EOAIC (1 << 0) |
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| #define | TSC_ISR_MCEF (1 << 1) |
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| #define | TSC_ISR_EOAF (1 << 0) |
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| #define | TSC_IOBIT_VAL(g, io) ((1 << ((io)-1)) << (((g)-1)*4)) |
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| #define | TSC_IOHCR_G1(io) TSC_IOBIT_VAL(1, io) |
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| #define | TSC_IOHCR_G2(io) TSC_IOBIT_VAL(2, io) |
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| #define | TSC_IOHCR_G3(io) TSC_IOBIT_VAL(3, io) |
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| #define | TSC_IOHCR_G4(io) TSC_IOBIT_VAL(4, io) |
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| #define | TSC_IOHCR_G5(io) TSC_IOBIT_VAL(5, io) |
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| #define | TSC_IOHCR_G6(io) TSC_IOBIT_VAL(6, io) |
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| #define | TSC_IOASCR_G1(io) TSC_IOBIT_VAL(1, io) |
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| #define | TSC_IOASCR_G2(io) TSC_IOBIT_VAL(2, io) |
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| #define | TSC_IOASCR_G3(io) TSC_IOBIT_VAL(3, io) |
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| #define | TSC_IOASCR_G4(io) TSC_IOBIT_VAL(4, io) |
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| #define | TSC_IOASCR_G5(io) TSC_IOBIT_VAL(5, io) |
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| #define | TSC_IOASCR_G6(io) TSC_IOBIT_VAL(6, io) |
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| #define | TSC_IOSCR_G1(io) TSC_IOBIT_VAL(1, io) |
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| #define | TSC_IOSCR_G2(io) TSC_IOBIT_VAL(2, io) |
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| #define | TSC_IOSCR_G3(io) TSC_IOBIT_VAL(3, io) |
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| #define | TSC_IOSCR_G4(io) TSC_IOBIT_VAL(4, io) |
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| #define | TSC_IOSCR_G5(io) TSC_IOBIT_VAL(5, io) |
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| #define | TSC_IOSCR_G6(io) TSC_IOBIT_VAL(6, io) |
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| #define | TSC_IOCCR_G1(io) TSC_IOBIT_VAL(1, io) |
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| #define | TSC_IOCCR_G2(io) TSC_IOBIT_VAL(2, io) |
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| #define | TSC_IOCCR_G3(io) TSC_IOBIT_VAL(3, io) |
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| #define | TSC_IOCCR_G4(io) TSC_IOBIT_VAL(4, io) |
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| #define | TSC_IOCCR_G5(io) TSC_IOBIT_VAL(5, io) |
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| #define | TSC_IOCCR_G6(io) TSC_IOBIT_VAL(6, io) |
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| #define | TSC_IOGCSR_GxE(x) (1 << ((x)-1)) |
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| #define | TSC_IOGCSR_GxS(x) (1 << ((x)+15)) |
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