libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
adc_common_v2.h
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1/** @addtogroup adc_defines
2
3@author @htmlonly &copy; @endhtmlonly 2015 Karl Palsson <karlp@tweak.net.au>
4
5 */
6
7/*
8 * This file is part of the libopencm3 project.
9 *
10 * Copyright (C) 2015 Karl Palsson <karlp@tweak.net.au>
11 *
12 * This library is free software: you can redistribute it and/or modify
13 * it under the terms of the GNU Lesser General Public License as published by
14 * the Free Software Foundation, either version 3 of the License, or
15 * (at your option) any later version.
16 *
17 * This library is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU Lesser General Public License for more details.
21 *
22 * You should have received a copy of the GNU Lesser General Public License
23 * along with this library. If not, see <http://www.gnu.org/licenses/>.
24 */
25
26/**@{*/
27
28/* THIS FILE SHOULD NOT BE INCLUDED DIRECTLY, BUT ONLY VIA ADC.H
29The order of header inclusion is important. adc.h includes the device
30specific memorymap.h header before including this header file.*/
31
32/** @cond */
33#ifdef LIBOPENCM3_ADC_H
34/** @endcond */
35#ifndef LIBOPENCM3_ADC_COMMON_V2_H
36#define LIBOPENCM3_ADC_COMMON_V2_H
37
38/** @defgroup adc_registers ADC registers
39@{*/
40/* ----- ADC registers -----------------------------------------------------*/
41/** ADC interrupt and status register */
42#define ADC_ISR(adc) MMIO32((adc) + 0x00)
43/** Interrupt Enable Register */
44#define ADC_IER(adc) MMIO32((adc) + 0x04)
45/** Control Register */
46#define ADC_CR(adc) MMIO32((adc) + 0x08)
47/** Configuration Register 1 */
48#define ADC_CFGR1(adc) MMIO32((adc) + 0x0C)
49/** Configuration Register 2 */
50#define ADC_CFGR2(adc) MMIO32((adc) + 0x10)
51/** Sample Time Register 1 */
52#define ADC_SMPR1(adc) MMIO32((adc) + 0x14)
53/** Watchdog Threshold Register 1*/
54#define ADC_TR1(adc) MMIO32((adc) + 0x20)
55/** Regular Data Register */
56#define ADC_DR(adc) MMIO32((adc) + 0x40)
57/* CALFACT for all but f0 :(*/
58
59/** Common Configuration register */
60#define ADC_CCR(adc) MMIO32((adc) + 0x300 + 0x8)
61/**@}*/
62
63/* --- Register values -------------------------------------------------------*/
64
65/* ADC_ISR Values -----------------------------------------------------------*/
66/** @defgroup adc_isr ISR ADC interrupt status register
67@{*/
68
69/** AWD1: Analog watchdog 1 flag */
70#define ADC_ISR_AWD1 (1 << 7)
71/** OVR: Overrun flag */
72#define ADC_ISR_OVR (1 << 4)
73/** EOS: End of sequence conversions flag */
74#define ADC_ISR_EOS (1 << 3) // FIXME - move to single/multi here.
75#define ADC_ISR_EOSEQ ADC_ISR_EOS /* TODO - keep only one? */
76/** EOS: End of regular conversion flag */
77#define ADC_ISR_EOC (1 << 2)
78/** EOSMP: End of sampling flag */
79#define ADC_ISR_EOSMP (1 << 1)
80/** ADRDY: Ready flag */
81#define ADC_ISR_ADRDY (1 << 0)
82
83/**@}*/
84
85/* ADC_IER Values -----------------------------------------------------------*/
86/** @defgroup adc_ier IER ADC interrupt enable register
87@{*/
88
89/** AWD1IE: Analog watchdog 1 interrupt enable */
90#define ADC_IER_AWD1IE (1 << 7)
91/** OVRIE: Overrun interrupt enable */
92#define ADC_IER_OVRIE (1 << 4)
93/** EOSIE: End of regular sequence of conversions interrupt enable */
94#define ADC_IER_EOSIE (1 << 3)
95#define ADC_IER_EOSEQIE ADC_IER_EOSIE /* TODO - keep only one? */
96/** EOCIE: End of regular conversion interrupt enable */
97#define ADC_IER_EOCIE (1 << 2)
98/** EOSMPIE: End of sampling flag interrupt enable for regular conversions */
99#define ADC_IER_EOSMPIE (1 << 1)
100/** ADRDYIE: ADC ready interrupt enable */
101#define ADC_IER_ADRDYIE (1 << 0)
102
103/**@}*/
104
105/* ADC_CR Values -----------------------------------------------------------*/
106/** @defgroup adc_cr CR ADC control register
107@{*/
108
109/** ADCAL: ADC calibration */
110#define ADC_CR_ADCAL (1 << 31)
111/** ADSTP: ADC stop of regular conversion command */
112#define ADC_CR_ADSTP (1 << 4)
113/** ADSTART: ADC start of regular conversion */
114#define ADC_CR_ADSTART (1 << 2)
115/** ADDIS: ADC disable command */
116#define ADC_CR_ADDIS (1 << 1)
117/** ADEN: ADC enable control */
118#define ADC_CR_ADEN (1 << 0)
119
120/**@}*/
121
122/* ADC_CFGR1 Values -----------------------------------------------------------*/
123/** @defgroup adc_cfgr1 CFGR1 ADC configuration register 1
124@{*/
125
126#define ADC_CFGR1_AWD1CH_SHIFT 26
127#define ADC_CFGR1_AWD1CH (0x1F << ADC_CFGR1_AWD1CH_SHIFT)
128/** AWD1CH: Analog watchdog 1 channel selection */
129#define ADC_CFGR1_AWD1CH_VAL(x) ((x) << ADC_CFGR1_AWD1CH_SHIFT)
130
131/** AWD1EN: Analog watchdog 1 enable on regular channels */
132#define ADC_CFGR1_AWD1EN (1 << 23)
133/** AWD1SGL: Enable the watchdog 1 on a single channel or on all channels */
134#define ADC_CFGR1_AWD1SGL (1 << 22)
135/** DISCEN: Discontinuous mode for regular channels */
136#define ADC_CFGR1_DISCEN (1 << 16)
137/** AUTDLY: Delayed conversion mode */
138#define ADC_CFGR1_AUTDLY (1 << 14)
139/** CONT: Single / continuous conversion mode for regular conversions */
140#define ADC_CFGR1_CONT (1 << 13)
141/** OVRMOD: Overrun Mode */
142#define ADC_CFGR1_OVRMOD (1 << 12)
143
144#define ADC_CFGR1_EXTEN_MASK (0x3 << 10)
145/** @defgroup adc_cfgr1_exten EXTEN: External trigger enable and polarity selection for regular channels
146@{*/
147#define ADC_CFGR1_EXTEN_DISABLED (0x0 << 10)
148#define ADC_CFGR1_EXTEN_RISING_EDGE (0x1 << 10)
149#define ADC_CFGR1_EXTEN_FALLING_EDGE (0x2 << 10)
150#define ADC_CFGR1_EXTEN_BOTH_EDGES (0x3 << 10)
151/**@}*/
152
153#define ADC_CFGR1_RES_MASK (0x3 << 3)
154/** @defgroup adc_cfgr1_res RES: Data resolution
155@{*/
156#define ADC_CFGR1_RES_12_BIT (0x0 << 3)
157#define ADC_CFGR1_RES_10_BIT (0x1 << 3)
158#define ADC_CFGR1_RES_8_BIT (0x2 << 3)
159#define ADC_CFGR1_RES_6_BIT (0x3 << 3)
160/**@}*/
161
162/** DMACFG: Direct memory access configuration */
163#define ADC_CFGR1_DMACFG (1 << 1)
164
165/** DMAEN: Direct memory access enable */
166#define ADC_CFGR1_DMAEN (1 << 0)
167
168/**@}*/
169
170/* ADC_SMPR Values -----------------------------------------------------------*/
171/** @defgroup adc_smpr SMPR ADC sample time register
172@{*/
173
174/**@}*/
175
176/* ADC_CFGR2 Values -----------------------------------------------------------*/
177/** @defgroup adc_cfgr2 CFGR2 ADC configuration register 2
178@{*/
179
180/**@}*/
181
182/* ADC_TR1 Values ------------------------------------------------------------*/
183/** @defgroup adc_tr1 TR1 ADC watchdog threshold register 1
184@{*/
185
186#define ADC_TR1_LT_SHIFT 0
187#define ADC_TR1_LT_MASK 0xFFF
188#define ADC_TR1_LT (0xFFF << ADC_TR1_LT_SHIFT)
189/** TR1_LT: analog watchdog 1 threshold low */
190#define ADC_TR1_LT_VAL(x) (((x) & ADC_TR1_LT_MASK) << ADC_TR1_LT_SHIFT)
191
192#define ADC_TR1_HT_SHIFT 16
193#define ADC_TR1_HT_MASK 0xFFF
194#define ADC_TR1_HT (0xFFF << ADC_TR1_HT_SHIFT)
195/** TR1_HT: analog watchdog 1 threshold high */
196#define ADC_TR1_HT_VAL(x) (((x) & ADC_TR1_HT_MASK) << ADC_TR1_HT_SHIFT)
197
198/**@}*/
199
200/* ADC_CCR Values -----------------------------------------------------------*/
201/** @defgroup adc_ccr CCR ADC common configuration register
202@{*/
203
204/** VBATEN: Enable VBAT Channel */
205#define ADC_CCR_VBATEN (1 << 24)
206
207/** TSEN: Enable Temperature Sensor */
208#define ADC_CCR_TSEN (1 << 23)
209
210/** VREFEN: Enable internal Voltage Reference */
211#define ADC_CCR_VREFEN (1 << 22)
212
213/**@}*/
214
215/* --- Function prototypes ------------------------------------------------- */
216
218
219void adc_power_on_async(uint32_t adc);
220void adc_power_on(uint32_t adc);
221bool adc_is_power_on(uint32_t adc);
222void adc_power_off_async(uint32_t adc);
223void adc_power_off(uint32_t adc);
224bool adc_is_power_off(uint32_t adc);
225void adc_calibrate_async(uint32_t adc);
226bool adc_is_calibrating(uint32_t adc);
227void adc_calibrate(uint32_t adc);
228void adc_set_continuous_conversion_mode(uint32_t adc);
229void adc_set_single_conversion_mode(uint32_t adc);
230void adc_set_regular_sequence(uint32_t adc, uint8_t length, uint8_t channel[]);
231void adc_set_sample_time_on_all_channels(uint32_t adc, uint8_t time);
234void adc_enable_vrefint(void);
235void adc_disable_vrefint(void);
236void adc_set_resolution(uint32_t adc, uint16_t resolution);
237void adc_set_left_aligned(uint32_t adc);
238void adc_set_right_aligned(uint32_t adc);
239void adc_enable_dma(uint32_t adc);
240void adc_disable_dma(uint32_t adc);
241bool adc_eoc(uint32_t adc);
242bool adc_eos(uint32_t adc);
243void adc_enable_eoc_interrupt(uint32_t adc);
244void adc_disable_eoc_interrupt(uint32_t adc);
245void adc_enable_overrun_interrupt(uint32_t adc);
246void adc_disable_overrun_interrupt(uint32_t adc);
247bool adc_get_overrun_flag(uint32_t adc);
248void adc_clear_overrun_flag(uint32_t adc);
249uint32_t adc_read_regular(uint32_t adc);
250void adc_start_conversion_regular(uint32_t adc);
251void adc_enable_dma_circular_mode(uint32_t adc);
252void adc_disable_dma_circular_mode(uint32_t adc);
253void adc_enable_delayed_conversion_mode(uint32_t adc);
254void adc_disable_delayed_conversion_mode(uint32_t adc);
256
257#endif
258/** @cond */
259#endif
260/** @endcond */
261/**@}*/
#define END_DECLS
Definition: common.h:34
#define BEGIN_DECLS
Definition: common.h:33
void adc_set_sample_time_on_all_channels(uint32_t adc, uint8_t time)
ADC Set the Sample Time for All Channels.
void adc_enable_delayed_conversion_mode(uint32_t adc)
Enable Delayed Conversion Mode.
void adc_start_conversion_regular(uint32_t adc)
ADC Software Triggered Conversion on Regular Channels.
void adc_disable_temperature_sensor(void)
Disable the temperature sensor (only)
void adc_disable_overrun_interrupt(uint32_t adc)
ADC Disable the Overrun Interrupt.
void adc_power_off(uint32_t adc)
Turn off the ADC This will actually block if it needs to turn off a currently running conversion,...
void adc_enable_vrefint(void)
Enable the internal voltage reference (only) The channel this is available on is unfortunately not co...
void adc_enable_dma_circular_mode(uint32_t adc)
Enable circular mode for DMA transfers.
void adc_calibrate_async(uint32_t adc)
Start the ADC calibration and immediately return.
void adc_disable_vrefint(void)
Disable the internal voltage reference (only)
void adc_set_continuous_conversion_mode(uint32_t adc)
Enable Continuous Conversion Mode In this mode the ADC starts a new conversion of a single channel or...
bool adc_is_calibrating(uint32_t adc)
Is the ADC Calibrating?
void adc_clear_overrun_flag(uint32_t adc)
ADC Clear Overrun Flags.
void adc_set_single_conversion_mode(uint32_t adc)
Enable Single Conversion Mode In this mode the ADC performs a conversion of one channel or a channel ...
bool adc_is_power_on(uint32_t adc)
Is the ADC powered up and ready?
Definition: adc_common_v2.c:84
void adc_power_on_async(uint32_t adc)
Turn on the ADC (async)
Definition: adc_common_v2.c:73
void adc_set_resolution(uint32_t adc, uint16_t resolution)
ADC Set Resolution.
void adc_power_on(uint32_t adc)
Turn on the ADC.
Definition: adc_common_v2.c:94
uint32_t adc_read_regular(uint32_t adc)
ADC Read from the Regular Conversion Result Register.
void adc_enable_eoc_interrupt(uint32_t adc)
ADC Enable Regular End-Of-Conversion Interrupt.
void adc_disable_eoc_interrupt(uint32_t adc)
ADC Disable Regular End-Of-Conversion Interrupt.
bool adc_eos(uint32_t adc)
ADC Read the End-of-Sequence Flag for Regular Conversions.
Definition: adc_common_v2.c:63
void adc_enable_temperature_sensor(void)
Enable the temperature sensor (only) The channel this is available on is unfortunately not consistent...
void adc_disable_dma(uint32_t adc)
ADC Disable DMA Transfers.
void adc_set_left_aligned(uint32_t adc)
ADC Set the Data as Left Aligned.
void adc_power_off_async(uint32_t adc)
Turn off the ADC (async) This will actually block if it needs to turn off a currently running convers...
void adc_set_right_aligned(uint32_t adc)
ADC Set the Data as Right Aligned.
void adc_disable_delayed_conversion_mode(uint32_t adc)
Enable Delayed Conversion Mode.
void adc_enable_overrun_interrupt(uint32_t adc)
ADC Enable the Overrun Interrupt.
void adc_enable_dma(uint32_t adc)
ADC Enable DMA Transfers.
void adc_disable_dma_circular_mode(uint32_t adc)
Disable circular mode for DMA transfers.
void adc_set_regular_sequence(uint32_t adc, uint8_t length, uint8_t channel[])
ADC Set a Regular Channel Conversion Sequence.
bool adc_get_overrun_flag(uint32_t adc)
ADC Read the Overrun Flag.
bool adc_is_power_off(uint32_t adc)
Is the ADC powered down?
void adc_calibrate(uint32_t adc)
Start ADC calibration and wait for it to finish.
bool adc_eoc(uint32_t adc)
ADC Read the End-of-Conversion Flag.
Definition: adc_common_v2.c:49