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Macros | |
| #define | ADC_ISR(adc) MMIO32((adc) + 0x00) |
| ADC interrupt and status register. More... | |
| #define | ADC_IER(adc) MMIO32((adc) + 0x04) |
| Interrupt Enable Register. More... | |
| #define | ADC_CR(adc) MMIO32((adc) + 0x08) |
| Control Register. More... | |
| #define | ADC_CFGR1(adc) MMIO32((adc) + 0x0C) |
| Configuration Register 1. More... | |
| #define | ADC_CFGR2(adc) MMIO32((adc) + 0x10) |
| Configuration Register 2. More... | |
| #define | ADC_SMPR1(adc) MMIO32((adc) + 0x14) |
| Sample Time Register 1. More... | |
| #define | ADC_TR1(adc) MMIO32((adc) + 0x20) |
| Watchdog Threshold Register 1. More... | |
| #define | ADC_DR(adc) MMIO32((adc) + 0x40) |
| Regular Data Register. More... | |
| #define | ADC_CCR(adc) MMIO32((adc) + 0x300 + 0x8) |
| Common Configuration register. More... | |
| #define | ADC_ISR_AWD1 (1 << 7) |
| AWD1: Analog watchdog 1 flag. More... | |
| #define | ADC_ISR_OVR (1 << 4) |
| OVR: Overrun flag. More... | |
| #define | ADC_ISR_EOS (1 << 3) |
| EOS: End of sequence conversions flag. More... | |
| #define | ADC_ISR_EOSEQ ADC_ISR_EOS /* TODO - keep only one? */ |
| #define | ADC_ISR_EOC (1 << 2) |
| EOS: End of regular conversion flag. More... | |
| #define | ADC_ISR_EOSMP (1 << 1) |
| EOSMP: End of sampling flag. More... | |
| #define | ADC_ISR_ADRDY (1 << 0) |
| ADRDY: Ready flag. More... | |
| #define | ADC_IER_AWD1IE (1 << 7) |
| AWD1IE: Analog watchdog 1 interrupt enable. More... | |
| #define | ADC_IER_OVRIE (1 << 4) |
| OVRIE: Overrun interrupt enable. More... | |
| #define | ADC_IER_EOSIE (1 << 3) |
| EOSIE: End of regular sequence of conversions interrupt enable. More... | |
| #define | ADC_IER_EOSEQIE ADC_IER_EOSIE /* TODO - keep only one? */ |
| #define | ADC_IER_EOCIE (1 << 2) |
| EOCIE: End of regular conversion interrupt enable. More... | |
| #define | ADC_IER_EOSMPIE (1 << 1) |
| EOSMPIE: End of sampling flag interrupt enable for regular conversions. More... | |
| #define | ADC_IER_ADRDYIE (1 << 0) |
| ADRDYIE: ADC ready interrupt enable. More... | |
| #define | ADC_CR_ADCAL (1 << 31) |
| ADCAL: ADC calibration. More... | |
| #define | ADC_CR_ADSTP (1 << 4) |
| ADSTP: ADC stop of regular conversion command. More... | |
| #define | ADC_CR_ADSTART (1 << 2) |
| ADSTART: ADC start of regular conversion. More... | |
| #define | ADC_CR_ADDIS (1 << 1) |
| ADDIS: ADC disable command. More... | |
| #define | ADC_CR_ADEN (1 << 0) |
| ADEN: ADC enable control. More... | |
| #define | ADC_CFGR1_AWD1CH_SHIFT 26 |
| #define | ADC_CFGR1_AWD1CH (0x1F << ADC_CFGR1_AWD1CH_SHIFT) |
| #define | ADC_CFGR1_AWD1CH_VAL(x) ((x) << ADC_CFGR1_AWD1CH_SHIFT) |
| AWD1CH: Analog watchdog 1 channel selection. More... | |
| #define | ADC_CFGR1_AWD1EN (1 << 23) |
| AWD1EN: Analog watchdog 1 enable on regular channels. More... | |
| #define | ADC_CFGR1_AWD1SGL (1 << 22) |
| AWD1SGL: Enable the watchdog 1 on a single channel or on all channels. More... | |
| #define | ADC_CFGR1_DISCEN (1 << 16) |
| DISCEN: Discontinuous mode for regular channels. More... | |
| #define | ADC_CFGR1_AUTDLY (1 << 14) |
| AUTDLY: Delayed conversion mode. More... | |
| #define | ADC_CFGR1_CONT (1 << 13) |
| CONT: Single / continuous conversion mode for regular conversions. More... | |
| #define | ADC_CFGR1_OVRMOD (1 << 12) |
| OVRMOD: Overrun Mode. More... | |
| #define | ADC_CFGR1_EXTEN_MASK (0x3 << 10) |
| #define | ADC_CFGR1_EXTEN_DISABLED (0x0 << 10) |
| #define | ADC_CFGR1_EXTEN_RISING_EDGE (0x1 << 10) |
| #define | ADC_CFGR1_EXTEN_FALLING_EDGE (0x2 << 10) |
| #define | ADC_CFGR1_EXTEN_BOTH_EDGES (0x3 << 10) |
| #define | ADC_CFGR1_RES_MASK (0x3 << 3) |
| #define | ADC_CFGR1_RES_12_BIT (0x0 << 3) |
| #define | ADC_CFGR1_RES_10_BIT (0x1 << 3) |
| #define | ADC_CFGR1_RES_8_BIT (0x2 << 3) |
| #define | ADC_CFGR1_RES_6_BIT (0x3 << 3) |
| #define | ADC_CFGR1_DMACFG (1 << 1) |
| DMACFG: Direct memory access configuration. More... | |
| #define | ADC_CFGR1_DMAEN (1 << 0) |
| DMAEN: Direct memory access enable. More... | |
| #define | ADC_TR1_LT_SHIFT 0 |
| #define | ADC_TR1_LT_MASK 0xFFF |
| #define | ADC_TR1_LT (0xFFF << ADC_TR1_LT_SHIFT) |
| #define | ADC_TR1_LT_VAL(x) (((x) & ADC_TR1_LT_MASK) << ADC_TR1_LT_SHIFT) |
| TR1_LT: analog watchdog 1 threshold low. More... | |
| #define | ADC_TR1_HT_SHIFT 16 |
| #define | ADC_TR1_HT_MASK 0xFFF |
| #define | ADC_TR1_HT (0xFFF << ADC_TR1_HT_SHIFT) |
| #define | ADC_TR1_HT_VAL(x) (((x) & ADC_TR1_HT_MASK) << ADC_TR1_HT_SHIFT) |
| TR1_HT: analog watchdog 1 threshold high. More... | |
| #define | ADC_CCR_VBATEN (1 << 24) |
| VBATEN: Enable VBAT Channel. More... | |
| #define | ADC_CCR_TSEN (1 << 23) |
| TSEN: Enable Temperature Sensor. More... | |
| #define | ADC_CCR_VREFEN (1 << 22) |
| VREFEN: Enable internal Voltage Reference. More... | |
Functions | |
| void | adc_power_on_async (uint32_t adc) |
| Turn on the ADC (async) More... | |
| void | adc_power_on (uint32_t adc) |
| Turn on the ADC. More... | |
| bool | adc_is_power_on (uint32_t adc) |
| Is the ADC powered up and ready? More... | |
| void | adc_power_off_async (uint32_t adc) |
| Turn off the ADC (async) This will actually block if it needs to turn off a currently running conversion, as per ref man. More... | |
| void | adc_power_off (uint32_t adc) |
| Turn off the ADC This will actually block if it needs to turn off a currently running conversion, as per ref man. More... | |
| bool | adc_is_power_off (uint32_t adc) |
| Is the ADC powered down? More... | |
| void | adc_calibrate_async (uint32_t adc) |
| Start the ADC calibration and immediately return. More... | |
| bool | adc_is_calibrating (uint32_t adc) |
| Is the ADC Calibrating? More... | |
| void | adc_calibrate (uint32_t adc) |
| Start ADC calibration and wait for it to finish. More... | |
| void | adc_set_continuous_conversion_mode (uint32_t adc) |
| Enable Continuous Conversion Mode In this mode the ADC starts a new conversion of a single channel or a channel group immediately following completion of the previous channel group conversion. More... | |
| void | adc_set_single_conversion_mode (uint32_t adc) |
| Enable Single Conversion Mode In this mode the ADC performs a conversion of one channel or a channel group and stops. More... | |
| void | adc_set_regular_sequence (uint32_t adc, uint8_t length, uint8_t channel[]) |
| ADC Set a Regular Channel Conversion Sequence. More... | |
| void | adc_set_sample_time_on_all_channels (uint32_t adc, uint8_t time) |
| ADC Set the Sample Time for All Channels. More... | |
| void | adc_enable_temperature_sensor (void) |
| Enable the temperature sensor (only) The channel this is available on is unfortunately not consistent, even though the bit used to enable it is. More... | |
| void | adc_disable_temperature_sensor (void) |
| Disable the temperature sensor (only) More... | |
| void | adc_enable_vrefint (void) |
| Enable the internal voltage reference (only) The channel this is available on is unfortunately not consistent, even though the bit used to enable it is. More... | |
| void | adc_disable_vrefint (void) |
| Disable the internal voltage reference (only) More... | |
| void | adc_set_resolution (uint32_t adc, uint16_t resolution) |
| ADC Set Resolution. More... | |
| void | adc_set_left_aligned (uint32_t adc) |
| ADC Set the Data as Left Aligned. More... | |
| void | adc_set_right_aligned (uint32_t adc) |
| ADC Set the Data as Right Aligned. More... | |
| void | adc_enable_dma (uint32_t adc) |
| ADC Enable DMA Transfers. More... | |
| void | adc_disable_dma (uint32_t adc) |
| ADC Disable DMA Transfers. More... | |
| bool | adc_eoc (uint32_t adc) |
| ADC Read the End-of-Conversion Flag. More... | |
| bool | adc_eos (uint32_t adc) |
| ADC Read the End-of-Sequence Flag for Regular Conversions. More... | |
| void | adc_enable_eoc_interrupt (uint32_t adc) |
| ADC Enable Regular End-Of-Conversion Interrupt. More... | |
| void | adc_disable_eoc_interrupt (uint32_t adc) |
| ADC Disable Regular End-Of-Conversion Interrupt. More... | |
| void | adc_enable_overrun_interrupt (uint32_t adc) |
| ADC Enable the Overrun Interrupt. More... | |
| void | adc_disable_overrun_interrupt (uint32_t adc) |
| ADC Disable the Overrun Interrupt. More... | |
| bool | adc_get_overrun_flag (uint32_t adc) |
| ADC Read the Overrun Flag. More... | |
| void | adc_clear_overrun_flag (uint32_t adc) |
| ADC Clear Overrun Flags. More... | |
| uint32_t | adc_read_regular (uint32_t adc) |
| ADC Read from the Regular Conversion Result Register. More... | |
| void | adc_start_conversion_regular (uint32_t adc) |
| ADC Software Triggered Conversion on Regular Channels. More... | |
| void | adc_enable_dma_circular_mode (uint32_t adc) |
| Enable circular mode for DMA transfers. More... | |
| void | adc_disable_dma_circular_mode (uint32_t adc) |
| Disable circular mode for DMA transfers. More... | |
| void | adc_enable_delayed_conversion_mode (uint32_t adc) |
| Enable Delayed Conversion Mode. More... | |
| void | adc_disable_delayed_conversion_mode (uint32_t adc) |
| Enable Delayed Conversion Mode. More... | |
