#include <libopencm3/stm32/common/adc_common_v2.h>
#include <libopencm3/stm32/common/adc_common_v2_multi.h>

Include dependency graph for f3/adc.h:

Macros
#define	ADC1 ADC1_BASE

#define	ADC2 ADC2_BASE

#define	ADC3 ADC3_BASE

#define	ADC4 ADC4_BASE

#define	ADC1_ISR ADC_ISR(ADC1_BASE)

#define	ADC2_ISR ADC_ISR(ADC2_BASE)

#define	ADC3_ISR ADC_ISR(ADC3_BASE)

#define	ADC4_ISR ADC_ISR(ADC4_BASE)

#define	ADC1_IER ADC_IER(ADC1_BASE)

#define	ADC2_IER ADC_IER(ADC2_BASE)

#define	ADC3_IER ADC_IER(ADC3_BASE)

#define	ADC4_IER ADC_IER(ADC4_BASE)

#define	ADC1_CR ADC_CR(ADC1_BASE)

#define	ADC2_CR ADC_CR(ADC2_BASE)

#define	ADC3_CR ADC_CR(ADC3_BASE)

#define	ADC4_CR ADC_CR(ADC4_BASE)

#define	ADC1_CFGR1 ADC_CFGR1(ADC1_BASE)

#define	ADC2_CFGR1 ADC_CFGR1(ADC2_BASE)

#define	ADC3_CFGR1 ADC_CFGR1(ADC3_BASE)

#define	ADC4_CFGR1 ADC_CFGR1(ADC4_BASE)

#define	ADC_CFGR(adc) ADC_CFGR1(adc)

#define	ADC1_CFGR ADC_CFGR1(ADC1_BASE)

#define	ADC2_CFGR ADC_CFGR1(ADC2_BASE)

#define	ADC3_CFGR ADC_CFGR1(ADC3_BASE)

#define	ADC4_CFGR ADC_CFGR1(ADC4_BASE)

#define	ADC1_SMPR1 ADC_SMPR1(ADC1_BASE)

#define	ADC2_SMPR1 ADC_SMPR1(ADC2_BASE)

#define	ADC3_SMPR1 ADC_SMPR1(ADC3_BASE)

#define	ADC4_SMPR1 ADC_SMPR1(ADC4_BASE)

#define	ADC1_SMPR2 ADC_SMPR2(ADC1_BASE)

#define	ADC2_SMPR2 ADC_SMPR2(ADC2_BASE)

#define	ADC3_SMPR2 ADC_SMPR2(ADC3_BASE)

#define	ADC4_SMPR2 ADC_SMPR2(ADC4_BASE)

#define	ADC1_TR1 ADC_TR1(ADC1_BASE)

#define	ADC2_TR1 ADC_TR1(ADC2_BASE)

#define	ADC3_TR1 ADC_TR1(ADC3_BASE)

#define	ADC4_TR1 ADC_TR1(ADC4_BASE)

#define	ADC1_TR2 ADC_TR2(ADC1_BASE)

#define	ADC2_TR2 ADC_TR2(ADC2_BASE)

#define	ADC3_TR2 ADC_TR2(ADC3_BASE)

#define	ADC4_TR2 ADC_TR2(ADC4_BASE)

#define	ADC1_TR3 ADC_TR3(ADC1_BASE)

#define	ADC2_TR3 ADC_TR3(ADC2_BASE)

#define	ADC3_TR3 ADC_TR3(ADC3_BASE)

#define	ADC4_TR3 ADC_TR3(ADC4_BASE)

#define	ADC1_SQR1 ADC_SQR1(ADC1_BASE)

#define	ADC2_SQR1 ADC_SQR1(ADC2_BASE)

#define	ADC3_SQR1 ADC_SQR1(ADC3_BASE)

#define	ADC4_SQR1 ADC_SQR1(ADC4_BASE)

#define	ADC1_SQR2 ADC_SQR2(ADC1_BASE)

#define	ADC2_SQR2 ADC_SQR2(ADC2_BASE)

#define	ADC3_SQR2 ADC_SQR2(ADC3_BASE)

#define	ADC4_SQR2 ADC_SQR2(ADC4_BASE)

#define	ADC1_SQR3 ADC_SQR3(ADC1_BASE)

#define	ADC2_SQR3 ADC_SQR3(ADC2_BASE)

#define	ADC3_SQR3 ADC_SQR3(ADC3_BASE)

#define	ADC4_SQR3 ADC_SQR3(ADC4_BASE)

#define	ADC1_SQR4 ADC_SQR4(ADC1_BASE)

#define	ADC2_SQR4 ADC_SQR4(ADC2_BASE)

#define	ADC3_SQR4 ADC_SQR4(ADC3_BASE)

#define	ADC4_SQR4 ADC_SQR4(ADC4_BASE)

#define	ADC1_DR ADC_DR(ADC1_BASE)

#define	ADC2_DR ADC_DR(ADC2_BASE)

#define	ADC3_DR ADC_DR(ADC3_BASE)

#define	ADC4_DR ADC_DR(ADC4_BASE)

#define	ADC1_JSQR ADC_JSQR(ADC1_BASE)

#define	ADC2_JSQR ADC_JSQR(ADC2_BASE)

#define	ADC3_JSQR ADC_JSQR(ADC3_BASE)

#define	ADC4_JSQR ADC_JSQR(ADC4_BASE)

#define	ADC1_OFR1 ADC_OFR1(ADC1_BASE)

#define	ADC2_OFR1 ADC_OFR1(ADC2_BASE)

#define	ADC3_OFR1 ADC_OFR1(ADC3_BASE)

#define	ADC4_OFR1 ADC_OFR1(ADC4_BASE)

#define	ADC1_OFR2 ADC_OFR2(ADC1_BASE)

#define	ADC2_OFR2 ADC_OFR2(ADC2_BASE)

#define	ADC3_OFR2 ADC_OFR2(ADC3_BASE)

#define	ADC4_OFR2 ADC_OFR2(ADC4_BASE)

#define	ADC1_OFR3 ADC_OFR3(ADC1_BASE)

#define	ADC2_OFR3 ADC_OFR3(ADC2_BASE)

#define	ADC3_OFR3 ADC_OFR3(ADC3_BASE)

#define	ADC4_OFR3 ADC_OFR3(ADC4_BASE)

#define	ADC1_OFR4 ADC_OFR4(ADC1_BASE)

#define	ADC2_OFR4 ADC_OFR4(ADC2_BASE)

#define	ADC3_OFR4 ADC_OFR4(ADC3_BASE)

#define	ADC4_OFR4 ADC_OFR4(ADC4_BASE)

#define	ADC1_JDR1 ADC_JDR1(ADC1_BASE)

#define	ADC2_JDR1 ADC_JDR1(ADC2_BASE)

#define	ADC3_JDR1 ADC_JDR1(ADC3_BASE)

#define	ADC4_JDR1 ADC_JDR1(ADC4_BASE)

#define	ADC1_JDR2 ADC_JDR2(ADC1_BASE)

#define	ADC2_JDR2 ADC_JDR2(ADC2_BASE)

#define	ADC3_JDR2 ADC_JDR2(ADC3_BASE)

#define	ADC4_JDR2 ADC_JDR2(ADC4_BASE)

#define	ADC1_JDR3 ADC_JDR3(ADC1_BASE)

#define	ADC2_JDR3 ADC_JDR3(ADC2_BASE)

#define	ADC3_JDR3 ADC_JDR3(ADC3_BASE)

#define	ADC4_JDR3 ADC_JDR3(ADC4_BASE)

#define	ADC1_JDR4 ADC_JDR4(ADC1_BASE)

#define	ADC2_JDR4 ADC_JDR4(ADC2_BASE)

#define	ADC3_JDR4 ADC_JDR4(ADC3_BASE)

#define	ADC4_JDR4 ADC_JDR4(ADC4_BASE)

#define	ADC1_AWD2CR ADC_AWD2CR(ADC1_BASE)

#define	ADC2_AWD2CR ADC_AWD2CR(ADC2_BASE)

#define	ADC3_AWD2CR ADC_AWD2CR(ADC3_BASE)

#define	ADC4_AWD2CR ADC_AWD2CR(ADC4_BASE)

#define	ADC1_AWD3CR ADC_AWD3CR(ADC1_BASE)

#define	ADC2_AWD3CR ADC_AWD3CR(ADC2_BASE)

#define	ADC3_AWD3CR ADC_AWD3CR(ADC3_BASE)

#define	ADC4_AWD3CR ADC_AWD3CR(ADC4_BASE)

#define	ADC1_DIFSEL ADC_DIFSEL(ADC1_BASE)

#define	ADC2_DIFSEL ADC_DIFSEL(ADC2_BASE)

#define	ADC3_DIFSEL ADC_DIFSEL(ADC3_BASE)

#define	ADC4_DIFSEL ADC_DIFSEL(ADC4_BASE)

#define	ADC1_CALFACT ADC_CALFACT(ADC1_BASE)

#define	ADC2_CALFACT ADC_CALFACT(ADC2_BASE)

#define	ADC3_CALFACT ADC_CALFACT(ADC3_BASE)

#define	ADC4_CALFACT ADC_CALFACT(ADC4_BASE)

#define	ADC12_CSR ADC_CSR(ADC1)

#define	ADC12_CCR ADC_CCR(ADC1)

#define	ADC12_CDR ADC_CDR(ADC1)

#define	ADC34_CSR ADC_CSR(ADC3)

#define	ADC34_CCR ADC_CCR(ADC3)

#define	ADC34_CDR ADC_CDR(ADC3)

#define	ADC_CR_ADVREGEN_ENABLE (0x1 << 28)
	ADVREGEN: ADC voltage regulator enable. More...

#define	ADC_CR_ADVREGEN_DISABLE (0x2 << 28)

#define	ADC_CR_ADVREGEN_MASK (0x3 << 28)

#define	ADC_CFGR1_ALIGN (1 << 5)
	ALIGN: Data alignment. More...

#define	ADC_CFGR1_EXTSEL_SHIFT 6

#define	ADC_CFGR1_EXTSEL_MASK (0xf << ADC_CFGR1_EXTSEL_SHIFT)

#define	ADC_CFGR1_EXTSEL_VAL(x) ((x) << ADC_CFGR1_EXTSEL_SHIFT)

#define	ADC_SMPR_SMP_1DOT5CYC 0x0

#define	ADC_SMPR_SMP_2DOT5CYC 0x1

#define	ADC_SMPR_SMP_4DOT5CYC 0x2

#define	ADC_SMPR_SMP_7DOT5CYC 0x3

#define	ADC_SMPR_SMP_19DOT5CYC 0x4

#define	ADC_SMPR_SMP_61DOT5CYC 0x5

#define	ADC_SMPR_SMP_181DOT5CYC 0x6

#define	ADC_SMPR_SMP_601DOT5CYC 0x7

#define	ADC_JSQR_JL_LSB 0

#define	ADC_JSQR_JL_SHIFT 0

#define	ADC_JSQR_JSQ4_LSB 26

#define	ADC_JSQR_JSQ3_LSB 20

#define	ADC_JSQR_JSQ2_LSB 14

#define	ADC_JSQR_JSQ1_LSB 8

#define	ADC_JSQR_JSQ_VAL(n, val) ((val) << (((n) - 1) * 6 + 8))

#define	ADC_JSQR_JL_VAL(val) (((val) - 1) << ADC_JSQR_JL_SHIFT)

#define	ADC_JSQR_JEXTEN_DISABLED (0x0 << 6)

#define	ADC_JSQR_JEXTEN_RISING_EDGE (0x1 << 6)

#define	ADC_JSQR_JEXTEN_FALLING_EDGE (0x2 << 6)

#define	ADC_JSQR_JEXTEN_BOTH_EDGES (0x3 << 6)

#define	ADC_JSQR_JEXTEN_MASK (0x3 << 6)

#define	ADC_JSQR_JEXTSEL_EVENT_0 (0x0 << 2)

#define	ADC_JSQR_JEXTSEL_EVENT_1 (0x1 << 2)

#define	ADC_JSQR_JEXTSEL_EVENT_2 (0x2 << 2)

#define	ADC_JSQR_JEXTSEL_EVENT_3 (0x3 << 2)

#define	ADC_JSQR_JEXTSEL_EVENT_4 (0x4 << 2)

#define	ADC_JSQR_JEXTSEL_EVENT_5 (0x5 << 2)

#define	ADC_JSQR_JEXTSEL_EVENT_6 (0x6 << 2)

#define	ADC_JSQR_JEXTSEL_EVENT_7 (0x7 << 2)

#define	ADC_JSQR_JEXTSEL_EVENT_8 (0x8 << 2)

#define	ADC_JSQR_JEXTSEL_EVENT_9 (0x9 << 2)

#define	ADC_JSQR_JEXTSEL_EVENT_10 (0xA << 2)

#define	ADC_JSQR_JEXTSEL_EVENT_11 (0xB << 2)

#define	ADC_JSQR_JEXTSEL_EVENT_12 (0xC << 2)

#define	ADC_JSQR_JEXTSEL_EVENT_13 (0xD << 2)

#define	ADC_JSQR_JEXTSEL_EVENT_14 (0xE << 2)

#define	ADC_JSQR_JEXTSEL_EVENT_15 (0xF << 2)

#define	ADC_JSQR_JEXTSEL_MASK (0xF << 2)

#define	ADC_JSQR_JL_1_CONVERSION (0x0 << 0)

#define	ADC_JSQR_JL_2_CONVERSIONS (0x1 << 0)

#define	ADC_JSQR_JL_3_CONVERSIONS (0x2 << 0)

#define	ADC_JSQR_JL_4_CONVERSIONS (0x3 << 0)

#define	ADC_OFR1_OFFSET1_EN (1 << 31)

#define	ADC_OFR2_OFFSET2_EN (1 << 31)

#define	ADC_OFR3_OFFSET3_EN (1 << 31)

#define	ADC_OFR4_OFFSET4_EN (1 << 31)

#define	ADC_CSR_JQOVF_SLV (1 << 26)

#define	ADC_CSR_AWD3_SLV (1 << 25)

#define	ADC_CSR_AWD2_SLV (1 << 24)

#define	ADC_CSR_AWD1_SLV (1 << 23)

#define	ADC_CSR_JEOS_SLV (1 << 22)

#define	ADC_CSR_JEOC_SLV (1 << 21)

#define	ADC_CSR_OVR_SLV (1 << 20)

#define	ADC_CSR_EOS_SLV (1 << 19)

#define	ADC_CSR_EOC_SLV (1 << 18)

#define	ADC_CSR_EOSMP_SLV (1 << 17)

#define	ADC_CSR_ADRDY_SLV (1 << 16)

#define	ADC_CSR_JQOVF_MST (1 << 10)

#define	ADC_CSR_AWD3_MST (1 << 9)

#define	ADC_CSR_AWD2_MST (1 << 8)

#define	ADC_CSR_AWD1_MST (1 << 7)

#define	ADC_CSR_JEOS_MST (1 << 6)

#define	ADC_CSR_JEOC_MST (1 << 5)

#define	ADC_CSR_OVR_MST (1 << 4)

#define	ADC_CSR_EOS_MST (1 << 3)

#define	ADC_CSR_EOC_MST (1 << 2)

#define	ADC_CSR_EOSMP_MST (1 << 1)

#define	ADC_CSR_ADRDY_MST (1 << 0)

#define	ADC_CCR_VBATEN (1 << 24)

#define	ADC_CCR_TSEN (1 << 23)

#define	ADC_CCR_VREFEN (1 << 22)

#define	ADC_CCR_CKMODE_CKX (0x0 << 16)

#define	ADC_CCR_CKMODE_DIV1 (0x1 << 16)

#define	ADC_CCR_CKMODE_DIV2 (0x2 << 16)

#define	ADC_CCR_CKMODE_DIV4 (0x3 << 16)

#define	ADC_CCR_CKMODE_MASK (0x3 << 16)

#define	ADC_CCR_MDMA_DISABLE (0x0 << 14)

#define	ADC_CCR_MDMA_12_10_BIT (0x2 << 14)

#define	ADC_CCR_MDMA_8_6_BIT (0x3 << 14)

#define	ADC_CCR_DMACFG (1 << 13)

#define	ADC_CCR_DELAY_SHIFT 8

#define	ADC_CCR_DUAL_INDEPENDENT 0x0
	All ADCs independent. More...

#define	ADC_CCR_DUAL_REG_SIMUL_AND_INJECTED_SIMUL 0x1
	Dual modes combined regular simultaneous + injected simultaneous mode. More...

#define	ADC_CCR_DUAL_REG_SIMUL_AND_ALTERNATE_TRIG 0x2
	Dual mode Combined regular simultaneous + alternate trigger mode. More...

#define	ADC_CCR_DUAL_REG_INTERLEAVED_AND_INJECTED_SIMUL 0x3
	Dual mode Combined interleaved mode + injected simultaneous mode. More...

#define	ADC_CCR_DUAL_INJECTED_SIMUL 0x5
	Dual mode Injected simultaneous mode only. More...

#define	ADC_CCR_DUAL_REGULAR_SIMUL 0x6
	Dual mode Regular simultaneous mode only. More...

#define	ADC_CCR_DUAL_INTERLEAVED 0x7
	Dual mode Interleaved mode only. More...

#define	ADC_CCR_DUAL_ALTERNATE_TRIG 0x9
	Dual mode Alternate trigger mode only. More...

#define	ADC_CCR_DUAL_MASK (0x1f)

#define	ADC_CCR_DUAL_SHIFT 0

#define	ADC_CHANNEL_TEMP 16

#define	ADC_CHANNEL_VBAT 17

#define	ADC_CHANNEL_VREF 18

Functions
void	adc_enable_analog_watchdog_regular (uint32_t adc)
	ADC Enable Analog Watchdog for Regular Conversions. More...

void	adc_disable_analog_watchdog_regular (uint32_t adc)
	ADC Enable Analog Watchdog for Regular Conversions. More...

void	adc_enable_analog_watchdog_injected (uint32_t adc)
	ADC Enable Analog Watchdog for Injected Conversions. More...

void	adc_disable_analog_watchdog_injected (uint32_t adc)
	ADC Disable Analog Watchdog for Injected Conversions. More...

void	adc_enable_discontinuous_mode_regular (uint32_t adc, uint8_t length)
	ADC Enable Discontinuous Mode for Regular Conversions. More...

void	adc_disable_discontinuous_mode_regular (uint32_t adc)
	ADC Disable Discontinuous Mode for Regular Conversions. More...

void	adc_enable_discontinuous_mode_injected (uint32_t adc)
	ADC Enable Discontinuous Mode for Injected Conversions. More...

void	adc_disable_discontinuous_mode_injected (uint32_t adc)
	ADC Disable Discontinuous Mode for Injected Conversions. More...

void	adc_enable_automatic_injected_group_conversion (uint32_t adc)
	ADC Enable Automatic Injected Conversions. More...

void	adc_disable_automatic_injected_group_conversion (uint32_t adc)
	ADC Disable Automatic Injected Conversions. More...

void	adc_enable_analog_watchdog_on_all_channels (uint32_t adc)
	ADC Enable Analog Watchdog for All Regular and/or Injected Channels. More...

void	adc_enable_analog_watchdog_on_selected_channel (uint32_t adc, uint8_t channel)
	ADC Enable Analog Watchdog for a Selected Channel. More...

void	adc_enable_eoc_interrupt_injected (uint32_t adc)
	ADC Enable Injected End-Of-Conversion Interrupt. More...

void	adc_disable_eoc_interrupt_injected (uint32_t adc)
	ADC Disable Injected End-Of-Conversion Interrupt. More...

void	adc_enable_eos_interrupt_injected (uint32_t adc)
	ADC Enable Injected End-Of-Sequence Interrupt. More...

void	adc_disable_eos_interrupt_injected (uint32_t adc)
	ADC Disable Injected End-Of-Sequence Interrupt. More...

void	adc_enable_all_awd_interrupt (uint32_t adc)
	ADC Enable Analog Watchdog Interrupt. More...

void	adc_disable_all_awd_interrupt (uint32_t adc)
	ADC Disable Analog Watchdog Interrupt. More...

void	adc_enable_eos_interrupt (uint32_t adc)
	ADC Enable Regular End-Of-Sequence Interrupt. More...

void	adc_disable_eos_interrupt (uint32_t adc)
	ADC Disable Regular End-Of-Sequence Interrupt. More...

void	adc_start_conversion_injected (uint32_t adc)
	ADC Software Triggered Conversion on Injected Channels. More...

void	adc_disable_external_trigger_regular (uint32_t adc)
	ADC Disable an External Trigger for Regular Channels. More...

void	adc_disable_external_trigger_injected (uint32_t adc)
	ADC Disable an External Trigger for Injected Channels. More...

void	adc_set_watchdog_high_threshold (uint32_t adc, uint16_t threshold)
	ADC Set Analog Watchdog Upper Threshold. More...

void	adc_set_watchdog_low_threshold (uint32_t adc, uint16_t threshold)
	ADC Set Analog Watchdog Lower Threshold. More...

void	adc_set_injected_sequence (uint32_t adc, uint8_t length, uint8_t channel[])
	ADC Set an Injected Channel Conversion Sequence. More...

bool	adc_eoc_injected (uint32_t adc)
	ADC Read the End-of-Conversion Flag for Injected Conversion. More...

bool	adc_eos_injected (uint32_t adc)
	ADC Read the End-of-Sequence Flag for Injected Conversions. More...

uint32_t	adc_read_injected (uint32_t adc, uint8_t reg)
	ADC Read from an Injected Conversion Result Register. More...

void	adc_set_injected_offset (uint32_t adc, uint8_t reg, uint32_t offset)
	ADC Set the Injected Channel Data Offset. More...

void	adc_set_clk_prescale (uint32_t adc, uint32_t prescaler)
	ADC Set Clock Prescale. More...

void	adc_set_multi_mode (uint32_t adc, uint32_t mode)
	ADC set multi mode. More...

void	adc_enable_external_trigger_regular (uint32_t adc, uint32_t trigger, uint32_t polarity)
	ADC Enable an External Trigger for Regular Channels. More...

void	adc_enable_external_trigger_injected (uint32_t adc, uint32_t trigger, uint32_t polarity)
	ADC Enable an External Trigger for Injected Channels. More...

bool	adc_awd (uint32_t adc)
	ADC Read the Analog Watchdog Flag. More...

Macros

Functions