Defined Constants and Types for the STM32F4xx DMA2D Peripheral More...
Macros | |
| #define | DMA2D_CR MMIO32(DMA2D_BASE + 0x0U) |
| DMA2D Control Register. More... | |
| #define | DMA2D_CR_MODE_SHIFT 16 |
| #define | DMA2D_CR_MODE_MASK 0x3 |
| #define | DMA2D_CR_MODE_M2M 0 /* memory to memory */ |
| #define | DMA2D_CR_MODE_M2MWPFC 1 /* memory to memory with pix convert */ |
| #define | DMA2D_CR_MODE_M2MWB 2 /* memory to memory with blend */ |
| #define | DMA2D_CR_MODE_R2M 3 /* register to memory */ |
| #define | DMA2D_CR_CEIE (1 << 13) |
| #define | DMA2D_CR_CTCIE (1 << 12) |
| #define | DMA2D_CR_CAEIE (1 << 11) |
| #define | DMA2D_CR_TWIE (1 << 10) |
| #define | DMA2D_CR_TCIE (1 << 9) |
| #define | DMA2D_CR_TEIE (1 << 8) |
| #define | DMA2D_CR_ABORT (1 << 2) |
| #define | DMA2D_CR_SUSP (1 << 1) |
| #define | DMA2D_CR_START (1 << 0) |
| #define | DMA2D_ISR MMIO32(DMA2D_BASE + 0x4U) |
| DMA2D Interrupt Status Register. More... | |
| #define | DMA2D_ISR_CEIF (1 << 5) |
| #define | DMA2D_ISR_CTCIF (1 << 4) |
| #define | DMA2D_ISR_CAEIF (1 << 3) |
| #define | DMA2D_ISR_TWIF (1 << 2) |
| #define | DMA2D_ISR_TCIF (1 << 1) |
| #define | DMA2D_ISR_TEIF (1 << 0) |
| #define | DMA2D_IFCR MMIO32(DMA2D_BASE + 0x8U) |
| DMA2D Interrupt Flag Clear Register. More... | |
| #define | DMA2D_IFCR_CCEIF (1 << 5) |
| #define | DMA2D_IFCR_CCTCIF (1 << 4) |
| #define | DMA2D_IFCR_CCAEIF (1 << 3) |
| #define | DMA2D_IFCR_CTWIF (1 << 2) |
| #define | DMA2D_IFCR_CTCIF (1 << 1) |
| #define | DMA2D_IFCR_CTEIF (1 << 0) |
| #define | DMA2D_FGMAR MMIO32(DMA2D_BASE + 0xCU) |
| DMA2D Foreground Memory Address Register. More... | |
| #define | DMA2D_FGOR MMIO32(DMA2D_BASE + 0x10U) |
| DMA2D Foreground Offset Register. More... | |
| #define | DMA2D_FGOR_LO_SHIFT 0 |
| #define | DMA2D_FGOR_LO_MASK 0x3fff |
| #define | DMA2D_BGMAR MMIO32(DMA2D_BASE + 0x14U) |
| DMA2D Background Memory Address Register. More... | |
| #define | DMA2D_BGOR MMIO32(DMA2D_BASE + 0x18U) |
| DMA2D Background Offset Register. More... | |
| #define | DMA2D_BGOR_LO_SHIFT 0 |
| #define | DMA2D_BGOR_LO_MASK 0x3fff |
| #define | DMA2D_FGPFCCR MMIO32(DMA2D_BASE + 0x1cU) |
| DMA2D Foreground and Background PFC Control Register. More... | |
| #define | DMA2D_BGPFCCR MMIO32(DMA2D_BASE + 0x24U) |
| #define | DMA2D_xPFCCR_ALPHA_SHIFT 24 |
| #define | DMA2D_xPFCCR_ALPHA_MASK 0xff |
| #define | DMA2D_xPFCCR_AM_SHIFT 16 |
| #define | DMA2D_xPFCCR_AM_MASK 0x3 |
| #define | DMA2D_xPFCCR_AM_NONE 0 |
| #define | DMA2D_xPFCCR_AM_FORCE 1 |
| #define | DMA2D_xPFCCR_AM_PRODUCT 2 |
| #define | DMA2D_xPFCCR_CS_SHIFT 8 |
| #define | DMA2D_xPFCCR_CS_MASK 0xff |
| #define | DMA2D_xPFCCR_START (1 << 5) |
| #define | DMA2D_xPFCCR_CCM_ARGB8888 (0 << 4) |
| #define | DMA2D_xPFCCR_CCM_RGB888 (1 << 4) |
| #define | DMA2D_xPFCCR_CM_SHIFT 0 |
| #define | DMA2D_xPFCCR_CM_MASK 0xf |
| #define | DMA2D_xPFCCR_CM_ARGB8888 0 |
| #define | DMA2D_xPFCCR_CM_RGB888 1 |
| #define | DMA2D_xPFCCR_CM_RGB565 2 |
| #define | DMA2D_xPFCCR_CM_ARGB1555 3 |
| #define | DMA2D_xPFCCR_CM_ARGB4444 4 |
| #define | DMA2D_xPFCCR_CM_L8 5 |
| #define | DMA2D_xPFCCR_CM_AL44 6 |
| #define | DMA2D_xPFCCR_CM_AL88 7 |
| #define | DMA2D_xPFCCR_CM_L4 8 |
| #define | DMA2D_xPFCCR_CM_A8 9 |
| #define | DMA2D_xPFCCR_CM_A4 10 |
| #define | DMA2D_FGCOLR MMIO32(DMA2D_BASE + 0x20U) |
| DMA2D Foreground and Background Color Register. More... | |
| #define | DMA2D_BGCOLR MMIO32(DMA2D_BASE + 0x28U) |
| #define | DMA2D_xCOLR_RED_SHIFT 16 |
| #define | DMA2D_xCOLR_RED_MASK 0xff |
| #define | DMA2D_xCOLR_GREEN_SHIFT 8 |
| #define | DMA2D_xCOLR_GREEN_MASK 0xff |
| #define | DMA2D_xCOLR_BLUE_SHIFT 0 |
| #define | DMA2D_xCOLR_BLUE_MASK 0xff |
| #define | DMA2D_FGCMAR MMIO32(DMA2D_BASE + 0x2CU) |
| DMA2D Foreground CLUT Memory Address Register. More... | |
| #define | DMA2D_BGCMAR MMIO32(DMA2D_BASE + 0x30U) |
| DMA2D Background CLUT Memory Address Register. More... | |
| #define | DMA2D_OPFCCR MMIO32(DMA2D_BASE + 0x34U) |
| DMA2D Output PFC Control Register. More... | |
| #define | DMA2D_OPFCCR_CM_SHIFT 0 |
| #define | DMA2D_OPFCCR_CM_MASK 0x3 |
| #define | DMA2D_OPFCCR_CM_ARGB8888 0 |
| #define | DMA2D_OPFCCR_CM_RGB888 1 |
| #define | DMA2D_OPFCCR_CM_RGB565 2 |
| #define | DMA2D_OPFCCR_CM_ARGB1555 3 |
| #define | DMA2D_OPFCCR_CM_ARGB4444 4 |
| #define | DMA2D_OCOLR MMIO32(DMA2D_BASE + 0x38U) |
| DMA2D Output Color Register. More... | |
| #define | DMA2D_OMAR MMIO32(DMA2D_BASE + 0x3CU) |
| DMA2D Output Memory Address Register. More... | |
| #define | DMA2D_OOR MMIO32(DMA2D_BASE + 0x40U) |
| DMA2D Output offset Register. More... | |
| #define | DMA2D_OOR_LO_SHIFT 0 |
| #define | DMA2D_OOR_LO_MASK 0x3fff |
| #define | DMA2D_NLR MMIO32(DMA2D_BASE + 0x44U) |
| DMA2D Number of Lines Register. More... | |
| #define | DMA2D_NLR_PL_SHIFT 16 |
| #define | DMA2D_NLR_PL_MASK 0x3fff |
| #define | DMA2D_NLR_NL_SHIFT 0 |
| #define | DMA2D_NLR_NL_MASK 0xffff |
| #define | DMA2D_LWR MMIO32(DMA2D_BASE + 0x48U) |
| DMA2D Line Watermark Register. More... | |
| #define | DMA2D_LWR_LW_SHIFT 0 |
| #define | DMA2D_LWR_LW_MASK 0xffff |
| #define | DMA2D_AMTCR MMIO32(DMA2D_BASE + 0x4CU) |
| DMA2D AHB Master Timer Config Register. More... | |
| #define | DMA2D_AMTCR_DT_SHIFT 8 |
| #define | DMA2D_AMTCR_DT_MASK 0xff |
| #define | DMA2D_AMTCR_EN (1 << 0) |
| #define | DMA2D_FG_CLUT (uint32_t *)(DMA2D_BASE + 0x400U) |
| DMA2D Foreground Color Lookup table. More... | |
| #define | DMA2D_BG_CLUT (uint32_t *)(DMA2D_BASE + 0x800U) |
| DMA2D Background Color Lookup table. More... | |
Detailed Description
Defined Constants and Types for the STM32F4xx DMA2D Peripheral
- Version
- 1.0.0
- Date
- 15 August 2016
This library supports the DMA2D Peripheral in the STM32F4xx and STM32F7xx series of ARM Cortex Microcontrollers by ST Microelectronics.
LGPL License Terms libopencm3 License
Macro Definition Documentation
◆ DMA2D_AMTCR
| #define DMA2D_AMTCR MMIO32(DMA2D_BASE + 0x4CU) |
DMA2D AHB Master Timer Config Register.
Definition at line 176 of file dma2d_common_f47.h.
◆ DMA2D_AMTCR_DT_MASK
| #define DMA2D_AMTCR_DT_MASK 0xff |
Definition at line 178 of file dma2d_common_f47.h.
◆ DMA2D_AMTCR_DT_SHIFT
| #define DMA2D_AMTCR_DT_SHIFT 8 |
Definition at line 177 of file dma2d_common_f47.h.
◆ DMA2D_AMTCR_EN
| #define DMA2D_AMTCR_EN (1 << 0) |
Definition at line 179 of file dma2d_common_f47.h.
◆ DMA2D_BG_CLUT
| #define DMA2D_BG_CLUT (uint32_t *)(DMA2D_BASE + 0x800U) |
DMA2D Background Color Lookup table.
Definition at line 185 of file dma2d_common_f47.h.
◆ DMA2D_BGCMAR
| #define DMA2D_BGCMAR MMIO32(DMA2D_BASE + 0x30U) |
DMA2D Background CLUT Memory Address Register.
Definition at line 139 of file dma2d_common_f47.h.
◆ DMA2D_BGCOLR
| #define DMA2D_BGCOLR MMIO32(DMA2D_BASE + 0x28U) |
Definition at line 127 of file dma2d_common_f47.h.
◆ DMA2D_BGMAR
| #define DMA2D_BGMAR MMIO32(DMA2D_BASE + 0x14U) |
DMA2D Background Memory Address Register.
Definition at line 88 of file dma2d_common_f47.h.
◆ DMA2D_BGOR
| #define DMA2D_BGOR MMIO32(DMA2D_BASE + 0x18U) |
DMA2D Background Offset Register.
Definition at line 91 of file dma2d_common_f47.h.
◆ DMA2D_BGOR_LO_MASK
| #define DMA2D_BGOR_LO_MASK 0x3fff |
Definition at line 93 of file dma2d_common_f47.h.
◆ DMA2D_BGOR_LO_SHIFT
| #define DMA2D_BGOR_LO_SHIFT 0 |
Definition at line 92 of file dma2d_common_f47.h.
◆ DMA2D_BGPFCCR
| #define DMA2D_BGPFCCR MMIO32(DMA2D_BASE + 0x24U) |
Definition at line 97 of file dma2d_common_f47.h.
◆ DMA2D_CR
| #define DMA2D_CR MMIO32(DMA2D_BASE + 0x0U) |
DMA2D Control Register.
Definition at line 44 of file dma2d_common_f47.h.
◆ DMA2D_CR_ABORT
| #define DMA2D_CR_ABORT (1 << 2) |
Definition at line 57 of file dma2d_common_f47.h.
◆ DMA2D_CR_CAEIE
| #define DMA2D_CR_CAEIE (1 << 11) |
Definition at line 53 of file dma2d_common_f47.h.
◆ DMA2D_CR_CEIE
| #define DMA2D_CR_CEIE (1 << 13) |
Definition at line 51 of file dma2d_common_f47.h.
◆ DMA2D_CR_CTCIE
| #define DMA2D_CR_CTCIE (1 << 12) |
Definition at line 52 of file dma2d_common_f47.h.
◆ DMA2D_CR_MODE_M2M
| #define DMA2D_CR_MODE_M2M 0 /* memory to memory */ |
Definition at line 47 of file dma2d_common_f47.h.
◆ DMA2D_CR_MODE_M2MWB
| #define DMA2D_CR_MODE_M2MWB 2 /* memory to memory with blend */ |
Definition at line 49 of file dma2d_common_f47.h.
◆ DMA2D_CR_MODE_M2MWPFC
| #define DMA2D_CR_MODE_M2MWPFC 1 /* memory to memory with pix convert */ |
Definition at line 48 of file dma2d_common_f47.h.
◆ DMA2D_CR_MODE_MASK
| #define DMA2D_CR_MODE_MASK 0x3 |
Definition at line 46 of file dma2d_common_f47.h.
◆ DMA2D_CR_MODE_R2M
| #define DMA2D_CR_MODE_R2M 3 /* register to memory */ |
Definition at line 50 of file dma2d_common_f47.h.
◆ DMA2D_CR_MODE_SHIFT
| #define DMA2D_CR_MODE_SHIFT 16 |
Definition at line 45 of file dma2d_common_f47.h.
◆ DMA2D_CR_START
| #define DMA2D_CR_START (1 << 0) |
Definition at line 59 of file dma2d_common_f47.h.
◆ DMA2D_CR_SUSP
| #define DMA2D_CR_SUSP (1 << 1) |
Definition at line 58 of file dma2d_common_f47.h.
◆ DMA2D_CR_TCIE
| #define DMA2D_CR_TCIE (1 << 9) |
Definition at line 55 of file dma2d_common_f47.h.
◆ DMA2D_CR_TEIE
| #define DMA2D_CR_TEIE (1 << 8) |
Definition at line 56 of file dma2d_common_f47.h.
◆ DMA2D_CR_TWIE
| #define DMA2D_CR_TWIE (1 << 10) |
Definition at line 54 of file dma2d_common_f47.h.
◆ DMA2D_FG_CLUT
| #define DMA2D_FG_CLUT (uint32_t *)(DMA2D_BASE + 0x400U) |
DMA2D Foreground Color Lookup table.
Definition at line 182 of file dma2d_common_f47.h.
◆ DMA2D_FGCMAR
| #define DMA2D_FGCMAR MMIO32(DMA2D_BASE + 0x2CU) |
DMA2D Foreground CLUT Memory Address Register.
Definition at line 136 of file dma2d_common_f47.h.
◆ DMA2D_FGCOLR
| #define DMA2D_FGCOLR MMIO32(DMA2D_BASE + 0x20U) |
DMA2D Foreground and Background Color Register.
Definition at line 126 of file dma2d_common_f47.h.
◆ DMA2D_FGMAR
| #define DMA2D_FGMAR MMIO32(DMA2D_BASE + 0xCU) |
DMA2D Foreground Memory Address Register.
Definition at line 80 of file dma2d_common_f47.h.
◆ DMA2D_FGOR
| #define DMA2D_FGOR MMIO32(DMA2D_BASE + 0x10U) |
DMA2D Foreground Offset Register.
Definition at line 83 of file dma2d_common_f47.h.
◆ DMA2D_FGOR_LO_MASK
| #define DMA2D_FGOR_LO_MASK 0x3fff |
Definition at line 85 of file dma2d_common_f47.h.
◆ DMA2D_FGOR_LO_SHIFT
| #define DMA2D_FGOR_LO_SHIFT 0 |
Definition at line 84 of file dma2d_common_f47.h.
◆ DMA2D_FGPFCCR
| #define DMA2D_FGPFCCR MMIO32(DMA2D_BASE + 0x1cU) |
DMA2D Foreground and Background PFC Control Register.
Definition at line 96 of file dma2d_common_f47.h.
◆ DMA2D_IFCR
| #define DMA2D_IFCR MMIO32(DMA2D_BASE + 0x8U) |
DMA2D Interrupt Flag Clear Register.
Definition at line 71 of file dma2d_common_f47.h.
◆ DMA2D_IFCR_CCAEIF
| #define DMA2D_IFCR_CCAEIF (1 << 3) |
Definition at line 74 of file dma2d_common_f47.h.
◆ DMA2D_IFCR_CCEIF
| #define DMA2D_IFCR_CCEIF (1 << 5) |
Definition at line 72 of file dma2d_common_f47.h.
◆ DMA2D_IFCR_CCTCIF
| #define DMA2D_IFCR_CCTCIF (1 << 4) |
Definition at line 73 of file dma2d_common_f47.h.
◆ DMA2D_IFCR_CTCIF
| #define DMA2D_IFCR_CTCIF (1 << 1) |
Definition at line 76 of file dma2d_common_f47.h.
◆ DMA2D_IFCR_CTEIF
| #define DMA2D_IFCR_CTEIF (1 << 0) |
Definition at line 77 of file dma2d_common_f47.h.
◆ DMA2D_IFCR_CTWIF
| #define DMA2D_IFCR_CTWIF (1 << 2) |
Definition at line 75 of file dma2d_common_f47.h.
◆ DMA2D_ISR
| #define DMA2D_ISR MMIO32(DMA2D_BASE + 0x4U) |
DMA2D Interrupt Status Register.
Definition at line 62 of file dma2d_common_f47.h.
◆ DMA2D_ISR_CAEIF
| #define DMA2D_ISR_CAEIF (1 << 3) |
Definition at line 65 of file dma2d_common_f47.h.
◆ DMA2D_ISR_CEIF
| #define DMA2D_ISR_CEIF (1 << 5) |
Definition at line 63 of file dma2d_common_f47.h.
◆ DMA2D_ISR_CTCIF
| #define DMA2D_ISR_CTCIF (1 << 4) |
Definition at line 64 of file dma2d_common_f47.h.
◆ DMA2D_ISR_TCIF
| #define DMA2D_ISR_TCIF (1 << 1) |
Definition at line 67 of file dma2d_common_f47.h.
◆ DMA2D_ISR_TEIF
| #define DMA2D_ISR_TEIF (1 << 0) |
Definition at line 68 of file dma2d_common_f47.h.
◆ DMA2D_ISR_TWIF
| #define DMA2D_ISR_TWIF (1 << 2) |
Definition at line 66 of file dma2d_common_f47.h.
◆ DMA2D_LWR
| #define DMA2D_LWR MMIO32(DMA2D_BASE + 0x48U) |
DMA2D Line Watermark Register.
Definition at line 171 of file dma2d_common_f47.h.
◆ DMA2D_LWR_LW_MASK
| #define DMA2D_LWR_LW_MASK 0xffff |
Definition at line 173 of file dma2d_common_f47.h.
◆ DMA2D_LWR_LW_SHIFT
| #define DMA2D_LWR_LW_SHIFT 0 |
Definition at line 172 of file dma2d_common_f47.h.
◆ DMA2D_NLR
| #define DMA2D_NLR MMIO32(DMA2D_BASE + 0x44U) |
DMA2D Number of Lines Register.
Definition at line 164 of file dma2d_common_f47.h.
◆ DMA2D_NLR_NL_MASK
| #define DMA2D_NLR_NL_MASK 0xffff |
Definition at line 168 of file dma2d_common_f47.h.
◆ DMA2D_NLR_NL_SHIFT
| #define DMA2D_NLR_NL_SHIFT 0 |
Definition at line 167 of file dma2d_common_f47.h.
◆ DMA2D_NLR_PL_MASK
| #define DMA2D_NLR_PL_MASK 0x3fff |
Definition at line 166 of file dma2d_common_f47.h.
◆ DMA2D_NLR_PL_SHIFT
| #define DMA2D_NLR_PL_SHIFT 16 |
Definition at line 165 of file dma2d_common_f47.h.
◆ DMA2D_OCOLR
| #define DMA2D_OCOLR MMIO32(DMA2D_BASE + 0x38U) |
DMA2D Output Color Register.
Definition at line 153 of file dma2d_common_f47.h.
◆ DMA2D_OMAR
| #define DMA2D_OMAR MMIO32(DMA2D_BASE + 0x3CU) |
DMA2D Output Memory Address Register.
Definition at line 156 of file dma2d_common_f47.h.
◆ DMA2D_OOR
| #define DMA2D_OOR MMIO32(DMA2D_BASE + 0x40U) |
DMA2D Output offset Register.
Definition at line 159 of file dma2d_common_f47.h.
◆ DMA2D_OOR_LO_MASK
| #define DMA2D_OOR_LO_MASK 0x3fff |
Definition at line 161 of file dma2d_common_f47.h.
◆ DMA2D_OOR_LO_SHIFT
| #define DMA2D_OOR_LO_SHIFT 0 |
Definition at line 160 of file dma2d_common_f47.h.
◆ DMA2D_OPFCCR
| #define DMA2D_OPFCCR MMIO32(DMA2D_BASE + 0x34U) |
DMA2D Output PFC Control Register.
Definition at line 142 of file dma2d_common_f47.h.
◆ DMA2D_OPFCCR_CM_ARGB1555
| #define DMA2D_OPFCCR_CM_ARGB1555 3 |
Definition at line 148 of file dma2d_common_f47.h.
◆ DMA2D_OPFCCR_CM_ARGB4444
| #define DMA2D_OPFCCR_CM_ARGB4444 4 |
Definition at line 149 of file dma2d_common_f47.h.
◆ DMA2D_OPFCCR_CM_ARGB8888
| #define DMA2D_OPFCCR_CM_ARGB8888 0 |
Definition at line 145 of file dma2d_common_f47.h.
◆ DMA2D_OPFCCR_CM_MASK
| #define DMA2D_OPFCCR_CM_MASK 0x3 |
Definition at line 144 of file dma2d_common_f47.h.
◆ DMA2D_OPFCCR_CM_RGB565
| #define DMA2D_OPFCCR_CM_RGB565 2 |
Definition at line 147 of file dma2d_common_f47.h.
◆ DMA2D_OPFCCR_CM_RGB888
| #define DMA2D_OPFCCR_CM_RGB888 1 |
Definition at line 146 of file dma2d_common_f47.h.
◆ DMA2D_OPFCCR_CM_SHIFT
| #define DMA2D_OPFCCR_CM_SHIFT 0 |
Definition at line 143 of file dma2d_common_f47.h.
◆ DMA2D_xCOLR_BLUE_MASK
| #define DMA2D_xCOLR_BLUE_MASK 0xff |
Definition at line 133 of file dma2d_common_f47.h.
◆ DMA2D_xCOLR_BLUE_SHIFT
| #define DMA2D_xCOLR_BLUE_SHIFT 0 |
Definition at line 132 of file dma2d_common_f47.h.
◆ DMA2D_xCOLR_GREEN_MASK
| #define DMA2D_xCOLR_GREEN_MASK 0xff |
Definition at line 131 of file dma2d_common_f47.h.
◆ DMA2D_xCOLR_GREEN_SHIFT
| #define DMA2D_xCOLR_GREEN_SHIFT 8 |
Definition at line 130 of file dma2d_common_f47.h.
◆ DMA2D_xCOLR_RED_MASK
| #define DMA2D_xCOLR_RED_MASK 0xff |
Definition at line 129 of file dma2d_common_f47.h.
◆ DMA2D_xCOLR_RED_SHIFT
| #define DMA2D_xCOLR_RED_SHIFT 16 |
Definition at line 128 of file dma2d_common_f47.h.
◆ DMA2D_xPFCCR_ALPHA_MASK
| #define DMA2D_xPFCCR_ALPHA_MASK 0xff |
Definition at line 100 of file dma2d_common_f47.h.
◆ DMA2D_xPFCCR_ALPHA_SHIFT
| #define DMA2D_xPFCCR_ALPHA_SHIFT 24 |
Definition at line 99 of file dma2d_common_f47.h.
◆ DMA2D_xPFCCR_AM_FORCE
| #define DMA2D_xPFCCR_AM_FORCE 1 |
Definition at line 104 of file dma2d_common_f47.h.
◆ DMA2D_xPFCCR_AM_MASK
| #define DMA2D_xPFCCR_AM_MASK 0x3 |
Definition at line 102 of file dma2d_common_f47.h.
◆ DMA2D_xPFCCR_AM_NONE
| #define DMA2D_xPFCCR_AM_NONE 0 |
Definition at line 103 of file dma2d_common_f47.h.
◆ DMA2D_xPFCCR_AM_PRODUCT
| #define DMA2D_xPFCCR_AM_PRODUCT 2 |
Definition at line 105 of file dma2d_common_f47.h.
◆ DMA2D_xPFCCR_AM_SHIFT
| #define DMA2D_xPFCCR_AM_SHIFT 16 |
Definition at line 101 of file dma2d_common_f47.h.
◆ DMA2D_xPFCCR_CCM_ARGB8888
| #define DMA2D_xPFCCR_CCM_ARGB8888 (0 << 4) |
Definition at line 109 of file dma2d_common_f47.h.
◆ DMA2D_xPFCCR_CCM_RGB888
| #define DMA2D_xPFCCR_CCM_RGB888 (1 << 4) |
Definition at line 110 of file dma2d_common_f47.h.
◆ DMA2D_xPFCCR_CM_A4
| #define DMA2D_xPFCCR_CM_A4 10 |
Definition at line 123 of file dma2d_common_f47.h.
◆ DMA2D_xPFCCR_CM_A8
| #define DMA2D_xPFCCR_CM_A8 9 |
Definition at line 122 of file dma2d_common_f47.h.
◆ DMA2D_xPFCCR_CM_AL44
| #define DMA2D_xPFCCR_CM_AL44 6 |
Definition at line 119 of file dma2d_common_f47.h.
◆ DMA2D_xPFCCR_CM_AL88
| #define DMA2D_xPFCCR_CM_AL88 7 |
Definition at line 120 of file dma2d_common_f47.h.
◆ DMA2D_xPFCCR_CM_ARGB1555
| #define DMA2D_xPFCCR_CM_ARGB1555 3 |
Definition at line 116 of file dma2d_common_f47.h.
◆ DMA2D_xPFCCR_CM_ARGB4444
| #define DMA2D_xPFCCR_CM_ARGB4444 4 |
Definition at line 117 of file dma2d_common_f47.h.
◆ DMA2D_xPFCCR_CM_ARGB8888
| #define DMA2D_xPFCCR_CM_ARGB8888 0 |
Definition at line 113 of file dma2d_common_f47.h.
◆ DMA2D_xPFCCR_CM_L4
| #define DMA2D_xPFCCR_CM_L4 8 |
Definition at line 121 of file dma2d_common_f47.h.
◆ DMA2D_xPFCCR_CM_L8
| #define DMA2D_xPFCCR_CM_L8 5 |
Definition at line 118 of file dma2d_common_f47.h.
◆ DMA2D_xPFCCR_CM_MASK
| #define DMA2D_xPFCCR_CM_MASK 0xf |
Definition at line 112 of file dma2d_common_f47.h.
◆ DMA2D_xPFCCR_CM_RGB565
| #define DMA2D_xPFCCR_CM_RGB565 2 |
Definition at line 115 of file dma2d_common_f47.h.
◆ DMA2D_xPFCCR_CM_RGB888
| #define DMA2D_xPFCCR_CM_RGB888 1 |
Definition at line 114 of file dma2d_common_f47.h.
◆ DMA2D_xPFCCR_CM_SHIFT
| #define DMA2D_xPFCCR_CM_SHIFT 0 |
Definition at line 111 of file dma2d_common_f47.h.
◆ DMA2D_xPFCCR_CS_MASK
| #define DMA2D_xPFCCR_CS_MASK 0xff |
Definition at line 107 of file dma2d_common_f47.h.
◆ DMA2D_xPFCCR_CS_SHIFT
| #define DMA2D_xPFCCR_CS_SHIFT 8 |
Definition at line 106 of file dma2d_common_f47.h.
◆ DMA2D_xPFCCR_START
| #define DMA2D_xPFCCR_START (1 << 5) |
Definition at line 108 of file dma2d_common_f47.h.
