libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
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Go to the source code of this file.
#define OTG_HS_CID MMIO32(USB_OTG_HS_BASE + OTG_CID) |
#define OTG_HS_DAINT MMIO32(USB_OTG_HS_BASE + OTG_DAINT) |
#define OTG_HS_DAINTMSK MMIO32(USB_OTG_HS_BASE + OTG_DAINTMSK) |
#define OTG_HS_DCFG MMIO32(USB_OTG_HS_BASE + OTG_DCFG) |
#define OTG_HS_DCTL MMIO32(USB_OTG_HS_BASE + OTG_DCTL) |
#define OTG_HS_DEACHHINT MMIO32(USB_OTG_HS_BASE + OTG_DEACHHINT) |
#define OTG_HS_DEACHHINTMSK MMIO32(USB_OTG_HS_BASE + OTG_DEACHHINTMSK) |
#define OTG_HS_DIEPCTL | ( | x | ) | MMIO32(USB_OTG_HS_BASE + OTG_DIEPCTL(x)) |
#define OTG_HS_DIEPCTL0 MMIO32(USB_OTG_HS_BASE + OTG_DIEPCTL0) |
#define OTG_HS_DIEPDMA | ( | x | ) | MMIO32(USB_OTG_HS_BASE + OTG_DIEPDMA(x)) |
#define OTG_HS_DIEPEACHMSK MMIO32(USB_OTG_HS_BASE + OTG_DIEPEACHMSK1) |
#define OTG_HS_DIEPEMPMSK MMIO32(USB_OTG_HS_BASE + OTG_DIEPEMPMSK) |
#define OTG_HS_DIEPINT | ( | x | ) | MMIO32(USB_OTG_HS_BASE + OTG_DIEPINT(x)) |
#define OTG_HS_DIEPMSK MMIO32(USB_OTG_HS_BASE + OTG_DIEPMSK) |
#define OTG_HS_DIEPTSIZ | ( | x | ) |
#define OTG_HS_DIEPTSIZ0 MMIO32(USB_OTG_HS_BASE + OTG_DIEPTSIZ0) |
#define OTG_HS_DIEPTXF | ( | x | ) | MMIO32(USB_OTG_HS_BASE + OTG_DIEPTXF(x)) |
#define OTG_HS_DOEPCTL | ( | x | ) | MMIO32(USB_OTG_HS_BASE + OTG_DOEPCTL(x)) |
#define OTG_HS_DOEPCTL0 MMIO32(USB_OTG_HS_BASE + OTG_DOEPCTL0) |
#define OTG_HS_DOEPDMA | ( | x | ) | MMIO32(USB_OTG_HS_BASE + OTG_DOEPDMA(x)) |
#define OTG_HS_DOEPEACHMSK MMIO32(USB_OTG_HS_BASE + OTG_DOEPEACHMSK1) |
#define OTG_HS_DOEPINT | ( | x | ) | MMIO32(USB_OTG_HS_BASE + OTG_DOEPINT(x)) |
#define OTG_HS_DOEPMSK MMIO32(USB_OTG_HS_BASE + OTG_DOEPMSK) |
#define OTG_HS_DOEPTSIZ | ( | x | ) |
#define OTG_HS_DOEPTSIZ0 MMIO32(USB_OTG_HS_BASE + OTG_DOEPTSIZ0) |
#define OTG_HS_DSTS MMIO32(USB_OTG_HS_BASE + OTG_DSTS) |
#define OTG_HS_DTXFSTS | ( | x | ) | MMIO32(USB_OTG_HS_BASE + OTG_DTXFSTS(x)) |
#define OTG_HS_DVBUSDIS MMIO32(USB_OTG_HS_BASE + OTG_DVBUSDIS) |
#define OTG_HS_DVBUSPULSE MMIO32(USB_OTG_HS_BASE + OTG_DVBUSPULSE) |
#define OTG_HS_FIFO | ( | x | ) | (&MMIO32(USB_OTG_HS_BASE + OTG_FIFO(x))) |
#define OTG_HS_GAHBCFG MMIO32(USB_OTG_HS_BASE + OTG_GAHBCFG) |
#define OTG_HS_GCCFG MMIO32(USB_OTG_HS_BASE + OTG_GCCFG) |
#define OTG_HS_GINTMSK MMIO32(USB_OTG_HS_BASE + OTG_GINTMSK) |
#define OTG_HS_GINTSTS MMIO32(USB_OTG_HS_BASE + OTG_GINTSTS) |
#define OTG_HS_GNPTXFSIZ MMIO32(USB_OTG_HS_BASE + OTG_GNPTXFSIZ) |
#define OTG_HS_GNPTXSTS MMIO32(USB_OTG_HS_BASE + OTG_GNPTXSTS) |
#define OTG_HS_GOTGCTL MMIO32(USB_OTG_HS_BASE + OTG_GOTGCTL) |
#define OTG_HS_GOTGINT MMIO32(USB_OTG_HS_BASE + OTG_GOTGINT) |
#define OTG_HS_GRSTCTL MMIO32(USB_OTG_HS_BASE + OTG_GRSTCTL) |
#define OTG_HS_GRXFSIZ MMIO32(USB_OTG_HS_BASE + OTG_GRXFSIZ) |
#define OTG_HS_GRXSTSP MMIO32(USB_OTG_HS_BASE + OTG_GRXSTSP) |
#define OTG_HS_GRXSTSR MMIO32(USB_OTG_HS_BASE + OTG_GRXSTSR) |
#define OTG_HS_GUSBCFG MMIO32(USB_OTG_HS_BASE + OTG_GUSBCFG) |
#define OTG_HS_HAINT MMIO32(USB_OTG_HS_BASE + OTG_HAINT) |
#define OTG_HS_HAINTMSK MMIO32(USB_OTG_HS_BASE + OTG_HAINTMSK) |
#define OTG_HS_HCCHAR | ( | x | ) | MMIO32(USB_OTG_HS_BASE + OTG_HCCHAR(x)) |
#define OTG_HS_HCDMA | ( | x | ) | MMIO32(USB_OTG_HS_BASE + OTG_HCDMA(x)) |
#define OTG_HS_HCFG MMIO32(USB_OTG_HS_BASE + OTG_HCFG) |
#define OTG_HS_HCINT | ( | x | ) | MMIO32(USB_OTG_HS_BASE + OTG_HCINT(x)) |
#define OTG_HS_HCINTMSK | ( | x | ) | MMIO32(USB_OTG_HS_BASE + OTG_HCINTMSK(x)) |
#define OTG_HS_HCSPLT | ( | x | ) | MMIO32(USB_OTG_HS_BASE + OTG_HCSPLT(x)) |
#define OTG_HS_HCTSIZ | ( | x | ) | MMIO32(USB_OTG_HS_BASE + OTG_HCTSIZ(x)) |
#define OTG_HS_HFIR MMIO32(USB_OTG_HS_BASE + OTG_HFIR) |
#define OTG_HS_HFNUM MMIO32(USB_OTG_HS_BASE + OTG_HFNUM) |
#define OTG_HS_HPRT MMIO32(USB_OTG_HS_BASE + OTG_HPRT) |
#define OTG_HS_HPTXFSIZ MMIO32(USB_OTG_HS_BASE + OTG_HPTXFSIZ) |
#define OTG_HS_HPTXSTS MMIO32(USB_OTG_HS_BASE + OTG_HPTXSTS) |
#define OTG_HS_PCGCCTL MMIO32(USB_OTG_HS_BASE + OTG_PCGCCTL) |