libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
pwr.h
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/** @defgroup pwr_defines PWR Defines
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@brief <b>Defined Constants and Types for the STM32F2xx PWR Control</b>
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@ingroup STM32F2xx_defines
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@version 1.0.0
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@date 4 March 2013
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LGPL License Terms @ref lgpl_license
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*/
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2011 Fergus Noble <fergusnoble@gmail.com>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef LIBOPENCM3_PWR_H
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#define LIBOPENCM3_PWR_H
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#include <libopencm3/stm32/common/pwr_common_v1.h>
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/*
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* This file extends the common STM32 version with definitions only
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* applicable to the STM32F2 series of devices.
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*/
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/* --- PWR_CR values ------------------------------------------------------- */
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/* Bits [31:10]: Reserved, always read as 0. */
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/* FPDS: Flash power down in stop mode */
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#define PWR_CR_FPDS (1 << 9)
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/* --- PWR_CSR values ------------------------------------------------------ */
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/* Bits [31:10]: Reserved, always read as 0. */
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/* BRE: Backup regulator enable */
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#define PWR_CSR_BRE (1 << 9)
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/* Bits [7:4]: Reserved, always read as 0. */
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#endif
include
libopencm3
stm32
f2
pwr.h
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