libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
clock.h File Reference
Include dependency graph for clock.h:

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Macros

#define CLK_SCS   MMIO32(SYSCON_BASE + 0x1a0)
 
#define CLK_CLKSRCSEL   MMIO32(SYSCON_BASE + 0x10c)
 
#define CLK_PLL0CON   MMIO32(SYSCON_BASE + 0x080)
 
#define CLK_PLL0CFG   MMIO32(SYSCON_BASE + 0x084)
 
#define CLK_PLL0STAT   MMIO32(SYSCON_BASE + 0x088)
 
#define CLK_PLL0FEED   MMIO32(SYSCON_BASE + 0x08c)
 
#define CLK_PLL1CON   MMIO32(SYSCON_BASE + 0x0a0)
 
#define CLK_PLL1CFG   MMIO32(SYSCON_BASE + 0x0a4)
 
#define CLK_PLL1STAT   MMIO32(SYSCON_BASE + 0x0a8)
 
#define CLK_PLL1FEED   MMIO32(SYSCON_BASE + 0x0ac)
 
#define CLK_CCLKCFG   MMIO32(SYSCON_BASE + 0x104)
 
#define CLK_USBCLKCFG   MMIO32(SYSCON_BASE + 0x108)
 
#define CLK_PCLKSEL0   MMIO32(SYSCON_BASE + 0x1a8)
 
#define CLK_PCLKSEL1   MMIO32(SYSCON_BASE + 0x1ac)
 
#define CLK_CLKOUTCFG   MMIO32(SYSCON_BASE + 0x1c8)
 
#define CLK_SCS_OSCRANGE_01_TO_20MHZ   (0)
 
#define CLK_SCS_OSCRANGE_15_TO_25MHZ   (1 << 4)
 
#define CLK_SCS_OSCEN   (1 << 5)
 
#define CLK_SCS_OSCSTAT   (1 << 6)
 
#define CLK_CLKSRCSEL_IRC   (0)
 
#define CLK_CLKSRCSEL_MAIN   (1 << 0)
 
#define CLK_CLKSRCSEL_RTC   (1 << 1)
 
#define CLK_PLLCON_ENABLE   (1 << 0)
 
#define CLK_PLLCON_CONNECT   (1 << 1)
 
#define CLK_PLL0_MSEL_SHIFT   0
 
#define CLK_PLL0_MSEL_MASK   0x7fff
 
#define CLK_PLL0_NSEL_SHIFT   16
 
#define CLK_PLL0_NSEL_MASK   0xff
 
#define CLK_PLL0STAT_ENABLE   (1 << 24)
 
#define CLK_PLL0STAT_CONNECT   (1 << 25)
 
#define CLK_PLL0STAT_PLOCK   (1 << 26)
 
#define CLK_PLL1_MSEL_SHIFT   0
 
#define CLK_PLL1_MSEL_MASK   0x1f
 
#define CLK_PLL1_PSEL_SHIFT   5
 
#define CLK_PLL1_PSEL_MASK   0x3
 
#define CLK_PLL1STAT_ENABLE   (1 << 8)
 
#define CLK_PLL1STAT_CONNECT   (1 << 9)
 
#define CLK_PLL1STAT_PLOCK   (1 << 10)
 
#define CLK_USBCLKCFG_DIV6   0x5
 
#define CLK_USBCLKCFG_DIV8   0x7
 
#define CLK_USBCLKCFG_DIV10   0x9
 
#define CLK_PCLKSEL_DIV4   0x00
 
#define CLK_PCLKSEL_DIV1   0x01
 
#define CLK_PCLKSEL_DIV2   0x02
 
#define CLK_PCLKSEL_DIV8   0x03
 
#define CLK_PCLKSEL0_WDT_SHIFT   0
 
#define CLK_PCLKSEL0_TIMER0_SHIFT   2
 
#define CLK_PCLKSEL0_TIMER1_SHIFT   4
 
#define CLK_PCLKSEL0_UART0_SHIFT   6
 
#define CLK_PCLKSEL0_UART1_SHIFT   8
 
#define CLK_PCLKSEL0_PWM1_SHIFT   12
 
#define CLK_PCLKSEL0_I2C0_SHIFT   14
 
#define CLK_PCLKSEL0_SPI_SHIFT   16
 
#define CLK_PCLKSEL0_SSP1_SHIFT   20
 
#define CLK_PCLKSEL0_DAC_SHIFT   22
 
#define CLK_PCLKSEL0_ADC_SHIFT   24
 
#define CLK_PCLKSEL0_CAN1_SHIFT   26
 
#define CLK_PCLKSEL0_CAN2_SHIFT   28
 
#define CLK_PCLKSEL0_ACF_SHIFT   30
 
#define CLK_PCLKSEL1_QEI_SHIFT   0
 
#define CLK_PCLKSEL1_GPIOINT_SHIFT   2
 
#define CLK_PCLKSEL1_PCB_SHIFT   4
 
#define CLK_PCLKSEL1_I2C1_SHIFT   6
 
#define CLK_PCLKSEL1_SSP0_SHIFT   10
 
#define CLK_PCLKSEL1_TIMER2_SHIFT   12
 
#define CLK_PCLKSEL1_TIMER3_SHIFT   14
 
#define CLK_PCLKSEL1_UART2_SHIFT   16
 
#define CLK_PCLKSEL1_UART3_SHIFT   18
 
#define CLK_PCLKSEL1_I2C2_SHIFT   20
 
#define CLK_PCLKSEL1_I2S_SHIFT   22
 
#define CLK_PCLKSEL1_RIT_SHIFT   26
 
#define CLK_PCLKSEL1_SYSCON_SHIFT   28
 
#define CLK_PCLKSEL1_MCPWM_SHIFT   30
 
#define CLK_CLKOUTCFG_SEL_CPU   0x00
 
#define CLK_CLKOUTCFG_SEL_MAIN   0x01
 
#define CLK_CLKOUTCFG_SEL_IRC   0x02
 
#define CLK_CLKOUTCFG_SEL_USB   0x03
 
#define CLK_CLKOUTCFG_SEL_RTC   0x04
 
#define CLK_CLKOUTCFG_DIV_SHIFT   4
 
#define CLK_CLKOUTCFG_ENABLE   (1 << 8)
 
#define CLK_CLKOUTCFG_ACTIVITY   (1 << 9)
 

Macro Definition Documentation

◆ CLK_CCLKCFG

#define CLK_CCLKCFG   MMIO32(SYSCON_BASE + 0x104)

Definition at line 56 of file clock.h.

◆ CLK_CLKOUTCFG

#define CLK_CLKOUTCFG   MMIO32(SYSCON_BASE + 0x1c8)

Definition at line 61 of file clock.h.

◆ CLK_CLKOUTCFG_ACTIVITY

#define CLK_CLKOUTCFG_ACTIVITY   (1 << 9)

Definition at line 157 of file clock.h.

◆ CLK_CLKOUTCFG_DIV_SHIFT

#define CLK_CLKOUTCFG_DIV_SHIFT   4

Definition at line 155 of file clock.h.

◆ CLK_CLKOUTCFG_ENABLE

#define CLK_CLKOUTCFG_ENABLE   (1 << 8)

Definition at line 156 of file clock.h.

◆ CLK_CLKOUTCFG_SEL_CPU

#define CLK_CLKOUTCFG_SEL_CPU   0x00

Definition at line 150 of file clock.h.

◆ CLK_CLKOUTCFG_SEL_IRC

#define CLK_CLKOUTCFG_SEL_IRC   0x02

Definition at line 152 of file clock.h.

◆ CLK_CLKOUTCFG_SEL_MAIN

#define CLK_CLKOUTCFG_SEL_MAIN   0x01

Definition at line 151 of file clock.h.

◆ CLK_CLKOUTCFG_SEL_RTC

#define CLK_CLKOUTCFG_SEL_RTC   0x04

Definition at line 154 of file clock.h.

◆ CLK_CLKOUTCFG_SEL_USB

#define CLK_CLKOUTCFG_SEL_USB   0x03

Definition at line 153 of file clock.h.

◆ CLK_CLKSRCSEL

#define CLK_CLKSRCSEL   MMIO32(SYSCON_BASE + 0x10c)

Definition at line 44 of file clock.h.

◆ CLK_CLKSRCSEL_IRC

#define CLK_CLKSRCSEL_IRC   (0)

Definition at line 72 of file clock.h.

◆ CLK_CLKSRCSEL_MAIN

#define CLK_CLKSRCSEL_MAIN   (1 << 0)

Definition at line 73 of file clock.h.

◆ CLK_CLKSRCSEL_RTC

#define CLK_CLKSRCSEL_RTC   (1 << 1)

Definition at line 74 of file clock.h.

◆ CLK_PCLKSEL0

#define CLK_PCLKSEL0   MMIO32(SYSCON_BASE + 0x1a8)

Definition at line 58 of file clock.h.

◆ CLK_PCLKSEL0_ACF_SHIFT

#define CLK_PCLKSEL0_ACF_SHIFT   30

Definition at line 131 of file clock.h.

◆ CLK_PCLKSEL0_ADC_SHIFT

#define CLK_PCLKSEL0_ADC_SHIFT   24

Definition at line 128 of file clock.h.

◆ CLK_PCLKSEL0_CAN1_SHIFT

#define CLK_PCLKSEL0_CAN1_SHIFT   26

Definition at line 129 of file clock.h.

◆ CLK_PCLKSEL0_CAN2_SHIFT

#define CLK_PCLKSEL0_CAN2_SHIFT   28

Definition at line 130 of file clock.h.

◆ CLK_PCLKSEL0_DAC_SHIFT

#define CLK_PCLKSEL0_DAC_SHIFT   22

Definition at line 127 of file clock.h.

◆ CLK_PCLKSEL0_I2C0_SHIFT

#define CLK_PCLKSEL0_I2C0_SHIFT   14

Definition at line 123 of file clock.h.

◆ CLK_PCLKSEL0_PWM1_SHIFT

#define CLK_PCLKSEL0_PWM1_SHIFT   12

Definition at line 122 of file clock.h.

◆ CLK_PCLKSEL0_SPI_SHIFT

#define CLK_PCLKSEL0_SPI_SHIFT   16

Definition at line 124 of file clock.h.

◆ CLK_PCLKSEL0_SSP1_SHIFT

#define CLK_PCLKSEL0_SSP1_SHIFT   20

Definition at line 126 of file clock.h.

◆ CLK_PCLKSEL0_TIMER0_SHIFT

#define CLK_PCLKSEL0_TIMER0_SHIFT   2

Definition at line 117 of file clock.h.

◆ CLK_PCLKSEL0_TIMER1_SHIFT

#define CLK_PCLKSEL0_TIMER1_SHIFT   4

Definition at line 118 of file clock.h.

◆ CLK_PCLKSEL0_UART0_SHIFT

#define CLK_PCLKSEL0_UART0_SHIFT   6

Definition at line 119 of file clock.h.

◆ CLK_PCLKSEL0_UART1_SHIFT

#define CLK_PCLKSEL0_UART1_SHIFT   8

Definition at line 120 of file clock.h.

◆ CLK_PCLKSEL0_WDT_SHIFT

#define CLK_PCLKSEL0_WDT_SHIFT   0

Definition at line 116 of file clock.h.

◆ CLK_PCLKSEL1

#define CLK_PCLKSEL1   MMIO32(SYSCON_BASE + 0x1ac)

Definition at line 59 of file clock.h.

◆ CLK_PCLKSEL1_GPIOINT_SHIFT

#define CLK_PCLKSEL1_GPIOINT_SHIFT   2

Definition at line 133 of file clock.h.

◆ CLK_PCLKSEL1_I2C1_SHIFT

#define CLK_PCLKSEL1_I2C1_SHIFT   6

Definition at line 135 of file clock.h.

◆ CLK_PCLKSEL1_I2C2_SHIFT

#define CLK_PCLKSEL1_I2C2_SHIFT   20

Definition at line 142 of file clock.h.

◆ CLK_PCLKSEL1_I2S_SHIFT

#define CLK_PCLKSEL1_I2S_SHIFT   22

Definition at line 143 of file clock.h.

◆ CLK_PCLKSEL1_MCPWM_SHIFT

#define CLK_PCLKSEL1_MCPWM_SHIFT   30

Definition at line 147 of file clock.h.

◆ CLK_PCLKSEL1_PCB_SHIFT

#define CLK_PCLKSEL1_PCB_SHIFT   4

Definition at line 134 of file clock.h.

◆ CLK_PCLKSEL1_QEI_SHIFT

#define CLK_PCLKSEL1_QEI_SHIFT   0

Definition at line 132 of file clock.h.

◆ CLK_PCLKSEL1_RIT_SHIFT

#define CLK_PCLKSEL1_RIT_SHIFT   26

Definition at line 145 of file clock.h.

◆ CLK_PCLKSEL1_SSP0_SHIFT

#define CLK_PCLKSEL1_SSP0_SHIFT   10

Definition at line 137 of file clock.h.

◆ CLK_PCLKSEL1_SYSCON_SHIFT

#define CLK_PCLKSEL1_SYSCON_SHIFT   28

Definition at line 146 of file clock.h.

◆ CLK_PCLKSEL1_TIMER2_SHIFT

#define CLK_PCLKSEL1_TIMER2_SHIFT   12

Definition at line 138 of file clock.h.

◆ CLK_PCLKSEL1_TIMER3_SHIFT

#define CLK_PCLKSEL1_TIMER3_SHIFT   14

Definition at line 139 of file clock.h.

◆ CLK_PCLKSEL1_UART2_SHIFT

#define CLK_PCLKSEL1_UART2_SHIFT   16

Definition at line 140 of file clock.h.

◆ CLK_PCLKSEL1_UART3_SHIFT

#define CLK_PCLKSEL1_UART3_SHIFT   18

Definition at line 141 of file clock.h.

◆ CLK_PCLKSEL_DIV1

#define CLK_PCLKSEL_DIV1   0x01

Definition at line 113 of file clock.h.

◆ CLK_PCLKSEL_DIV2

#define CLK_PCLKSEL_DIV2   0x02

Definition at line 114 of file clock.h.

◆ CLK_PCLKSEL_DIV4

#define CLK_PCLKSEL_DIV4   0x00

Definition at line 112 of file clock.h.

◆ CLK_PCLKSEL_DIV8

#define CLK_PCLKSEL_DIV8   0x03

Definition at line 115 of file clock.h.

◆ CLK_PLL0_MSEL_MASK

#define CLK_PLL0_MSEL_MASK   0x7fff

Definition at line 85 of file clock.h.

◆ CLK_PLL0_MSEL_SHIFT

#define CLK_PLL0_MSEL_SHIFT   0

Definition at line 84 of file clock.h.

◆ CLK_PLL0_NSEL_MASK

#define CLK_PLL0_NSEL_MASK   0xff

Definition at line 88 of file clock.h.

◆ CLK_PLL0_NSEL_SHIFT

#define CLK_PLL0_NSEL_SHIFT   16

Definition at line 87 of file clock.h.

◆ CLK_PLL0CFG

#define CLK_PLL0CFG   MMIO32(SYSCON_BASE + 0x084)

Definition at line 47 of file clock.h.

◆ CLK_PLL0CON

#define CLK_PLL0CON   MMIO32(SYSCON_BASE + 0x080)

Definition at line 46 of file clock.h.

◆ CLK_PLL0FEED

#define CLK_PLL0FEED   MMIO32(SYSCON_BASE + 0x08c)

Definition at line 49 of file clock.h.

◆ CLK_PLL0STAT

#define CLK_PLL0STAT   MMIO32(SYSCON_BASE + 0x088)

Definition at line 48 of file clock.h.

◆ CLK_PLL0STAT_CONNECT

#define CLK_PLL0STAT_CONNECT   (1 << 25)

Definition at line 91 of file clock.h.

◆ CLK_PLL0STAT_ENABLE

#define CLK_PLL0STAT_ENABLE   (1 << 24)

Definition at line 90 of file clock.h.

◆ CLK_PLL0STAT_PLOCK

#define CLK_PLL0STAT_PLOCK   (1 << 26)

Definition at line 92 of file clock.h.

◆ CLK_PLL1_MSEL_MASK

#define CLK_PLL1_MSEL_MASK   0x1f

Definition at line 97 of file clock.h.

◆ CLK_PLL1_MSEL_SHIFT

#define CLK_PLL1_MSEL_SHIFT   0

Definition at line 96 of file clock.h.

◆ CLK_PLL1_PSEL_MASK

#define CLK_PLL1_PSEL_MASK   0x3

Definition at line 99 of file clock.h.

◆ CLK_PLL1_PSEL_SHIFT

#define CLK_PLL1_PSEL_SHIFT   5

Definition at line 98 of file clock.h.

◆ CLK_PLL1CFG

#define CLK_PLL1CFG   MMIO32(SYSCON_BASE + 0x0a4)

Definition at line 52 of file clock.h.

◆ CLK_PLL1CON

#define CLK_PLL1CON   MMIO32(SYSCON_BASE + 0x0a0)

Definition at line 51 of file clock.h.

◆ CLK_PLL1FEED

#define CLK_PLL1FEED   MMIO32(SYSCON_BASE + 0x0ac)

Definition at line 54 of file clock.h.

◆ CLK_PLL1STAT

#define CLK_PLL1STAT   MMIO32(SYSCON_BASE + 0x0a8)

Definition at line 53 of file clock.h.

◆ CLK_PLL1STAT_CONNECT

#define CLK_PLL1STAT_CONNECT   (1 << 9)

Definition at line 102 of file clock.h.

◆ CLK_PLL1STAT_ENABLE

#define CLK_PLL1STAT_ENABLE   (1 << 8)

Definition at line 101 of file clock.h.

◆ CLK_PLL1STAT_PLOCK

#define CLK_PLL1STAT_PLOCK   (1 << 10)

Definition at line 103 of file clock.h.

◆ CLK_PLLCON_CONNECT

#define CLK_PLLCON_CONNECT   (1 << 1)

Definition at line 80 of file clock.h.

◆ CLK_PLLCON_ENABLE

#define CLK_PLLCON_ENABLE   (1 << 0)

Definition at line 79 of file clock.h.

◆ CLK_SCS

#define CLK_SCS   MMIO32(SYSCON_BASE + 0x1a0)

Definition at line 42 of file clock.h.

◆ CLK_SCS_OSCEN

#define CLK_SCS_OSCEN   (1 << 5)

Definition at line 67 of file clock.h.

◆ CLK_SCS_OSCRANGE_01_TO_20MHZ

#define CLK_SCS_OSCRANGE_01_TO_20MHZ   (0)

Definition at line 65 of file clock.h.

◆ CLK_SCS_OSCRANGE_15_TO_25MHZ

#define CLK_SCS_OSCRANGE_15_TO_25MHZ   (1 << 4)

Definition at line 66 of file clock.h.

◆ CLK_SCS_OSCSTAT

#define CLK_SCS_OSCSTAT   (1 << 6)

Definition at line 68 of file clock.h.

◆ CLK_USBCLKCFG

#define CLK_USBCLKCFG   MMIO32(SYSCON_BASE + 0x108)

Definition at line 57 of file clock.h.

◆ CLK_USBCLKCFG_DIV10

#define CLK_USBCLKCFG_DIV10   0x9

Definition at line 109 of file clock.h.

◆ CLK_USBCLKCFG_DIV6

#define CLK_USBCLKCFG_DIV6   0x5

Definition at line 107 of file clock.h.

◆ CLK_USBCLKCFG_DIV8

#define CLK_USBCLKCFG_DIV8   0x7

Definition at line 108 of file clock.h.