smc.h File Reference

#include <libopencm3/sam/memorymap.h>

Include dependency graph for smc.h:

Go to the source code of this file.

Macros
#define	SMC_CS_0   0
#define	SMC_CS_1   1
#define	SMC_CS_2   2
#define	SMC_CS_3   3
#define	SMC_SETUP(CS_number)
#define	SMC_PULSE(CS_number)
#define	SMC_CYCLE(CS_number)
#define	SMC_MODE(CS_number)
#define	SMC_OCMS   MMIO32(SMC_BASE + 0x80)
#define	SMC_KEY1   MMIO32(SMC_BASE + 0x84)
#define	SMC_KEY2   MMIO32(SMC_BASE + 0x88)
#define	SMC_WPMR   MMIO32(SMC_BASE + 0xE4)
#define	SMC_WPSR   MMIO32(SMC_BASE + 0xE8)
#define	SMC_SETUP_NCS_RD_SETUP_SHIFT   24
#define	SMC_SETUP_NCS_RD_SETUP_MASK   (0x3F << SMC_SETUP_NCS_RD_SETUP_SHIFT)
#define	SMC_SETUP_NRD_SETUP_SHIFT   16
#define	SMC_SETUP_NRD_SETUP_MASK   (0x3F << SMC_SETUP_NRD_SETUP_SHIFT)
#define	SMC_SETUP_NCS_WR_SETUP_SHIFT   8
#define	SMC_SETUP_NCS_WR_SETUP_MASK   (0x3F << SMC_SETUP_NCS_WR_SETUP_SHIFT)
#define	SMC_SETUP_NWE_SETUP_SHIFT   0
#define	SMC_SETUP_NWE_SETUP_MASK   (0x3F << SMC_SETUP_NWE_SETUP_SHIFT)
#define	SMC_PULSE_NCS_RD_PULSE_SHIFT   24
#define	SMC_PULSE_NCS_RD_PULSE_MASK   (0x7F << SMC_PULSE_NCS_RD_PULSE_SHIFT)
#define	SMC_PULSE_NRD_PULSE_SHIFT   16
#define	SMC_PULSE_NRD_PULSE_MASK   (0x7F << SMC_PULSE_NRD_PULSE_SHIFT)
#define	SMC_PULSE_NCS_WR_PULSE_SHIFT   8
#define	SMC_PULSE_NCS_WR_PULSE_MASK   (0x7F << SMC_PULSE_NCS_WR_PULSE_SHIFT)
#define	SMC_PULSE_NWE_PULSE_SHIFT   0
#define	SMC_PULSE_NWE_PULSE_MASK   (0x7F << SMC_PULSE_NWE_PULSE_SHIFT)
#define	SMC_CYCLE_NRD_CYCLE_SHIFT   16
#define	SMC_CYCLE_NRD_CYCLE_MASK   (0x1FF << SMC_CYCLE_NRD_CYCLE_SHIFT)
#define	SMC_CYCLE_NWE_CYCLE_SHIFT   0
#define	SMC_CYCLE_NWE_CYCLE_MASK   (0x1FF << SMC_CYCLE_NWE_CYCLE_SHIFT)
#define	SMC_MODE_PS_SHIFT   28
#define	SMC_MODE_PS_MASK   (0x03 << SMC_MODE_PS_SHIFT)
#define	SMC_MODE_PS_4_BYTE   (0x00 << SMC_MODE_PS_SHIFT)
#define	SMC_MODE_PS_8_BYTE   (0x01 << SMC_MODE_PS_SHIFT)
#define	SMC_MODE_PS_16_BYTE   (0x02 << SMC_MODE_PS_SHIFT)
#define	SMC_MODE_PS_32_BYTE   (0x03 << SMC_MODE_PS_SHIFT)
#define	SMC_MODE_PMEN   (1 << 24)
#define	SMC_MODE_TDF_MODE   (1 << 20)
#define	SMC_MODE_TDF_CYCLES_SHIFT   16
#define	SMC_MODE_TDF_CYCLES_MASK   (0x0F << SMC_MODE_TDF_CYCLES_SHIFT)
#define	SMC_MODE_DBW_SHIFT   12
#define	SMC_MODE_DBW_MASK   (0x03 << SMC_MODE_DBW_SHIFT)
#define	SMC_MODE_DBW_8_BIT   (0x00 << SMC_MODE_DBW_SHIFT)
#define	SMC_MODE_DBW_16_BIT   (0x01 << SMC_MODE_DBW_SHIFT)
#define	SMC_MODE_DBW_32_BIT   (0x02 << SMC_MODE_DBW_SHIFT)
#define	SMC_MODE_EXNW_MODE_SHIFT   4
#define	SMC_MODE_EXNW_MODE_MASK   (0x03 << SMC_MODE_EXNW_MODE_SHIFT)
#define	SMC_MODE_EXNW_MODE_DISABLED   (0x00 << SMC_MODE_EXNW_MODE_SHIFT)
#define	SMC_MODE_EXNW_MODE_FROZEN   (0x02 << SMC_MODE_EXNW_MODE_SHIFT)
#define	SMC_MODE_EXNW_MODE_READY   (0x03 << SMC_MODE_EXNW_MODE_SHIFT)
#define	SMC_MODE_WRITE_MODE   (1 << 1)
#define	SMC_MODE_READ_MODE   (1 << 0)
#define	SMC_OCMS_CS3SE   (1 << 19)
#define	SMC_OCMS_CS2SE   (1 << 18)
#define	SMC_OCMS_CS1SE   (1 << 17)
#define	SMC_OCMS_CS0SE   (1 << 16)
#define	SMC_OCMS_SMSE   (1 << 0)
#define	SMC_WPMR_WPKEY_SHIFT   8
#define	SMC_WPMR_WPKEY_KEY   (0x534D43 << SMC_WPMR_WPKEY_SHIFT)
#define	SMC_WPMR_WPEN   (1 << 0)
#define	SMC_WPSR_WP_VSRC_SHIFT   8
#define	SMC_WPSR_WP_VSRC_MASK   (0xFFFF << SMC_WPSR_WP_VSRC_SHIFT)
#define	SMC_WPSR_WPVS   (1 << 0)

Macro Definition Documentation

SMC_CS_0

#define SMC_CS_0   0

Definition at line 27 of file smc.h.

SMC_CS_1

#define SMC_CS_1   1

Definition at line 28 of file smc.h.

SMC_CS_2

#define SMC_CS_2   2

Definition at line 29 of file smc.h.

SMC_CS_3

#define SMC_CS_3   3

Definition at line 30 of file smc.h.

SMC_CYCLE

#define SMC_CYCLE

(

CS_number

)

Value:

                                                MMIO32(SMC_BASE + 0x10*(CS_number) \
                                                + 0x08)

Definition at line 44 of file smc.h.

SMC_CYCLE_NRD_CYCLE_MASK

#define SMC_CYCLE_NRD_CYCLE_MASK   (0x1FF << SMC_CYCLE_NRD_CYCLE_SHIFT)

Definition at line 112 of file smc.h.

SMC_CYCLE_NRD_CYCLE_SHIFT

#define SMC_CYCLE_NRD_CYCLE_SHIFT   16

Definition at line 111 of file smc.h.

SMC_CYCLE_NWE_CYCLE_MASK

#define SMC_CYCLE_NWE_CYCLE_MASK   (0x1FF << SMC_CYCLE_NWE_CYCLE_SHIFT)

Definition at line 116 of file smc.h.

SMC_CYCLE_NWE_CYCLE_SHIFT

#define SMC_CYCLE_NWE_CYCLE_SHIFT   0

Definition at line 115 of file smc.h.

SMC_KEY1

#define SMC_KEY1   MMIO32(SMC_BASE + 0x84)

Definition at line 55 of file smc.h.

SMC_KEY2

#define SMC_KEY2   MMIO32(SMC_BASE + 0x88)

Definition at line 58 of file smc.h.

SMC_MODE

#define SMC_MODE

(

CS_number

)

Value:

                                                MMIO32(SMC_BASE + 0x10*(CS_number) \
                                                + 0x0C)

Definition at line 48 of file smc.h.

SMC_MODE_DBW_16_BIT

#define SMC_MODE_DBW_16_BIT   (0x01 << SMC_MODE_DBW_SHIFT)

Definition at line 147 of file smc.h.

SMC_MODE_DBW_32_BIT

#define SMC_MODE_DBW_32_BIT   (0x02 << SMC_MODE_DBW_SHIFT)

Definition at line 148 of file smc.h.

SMC_MODE_DBW_8_BIT

#define SMC_MODE_DBW_8_BIT   (0x00 << SMC_MODE_DBW_SHIFT)

Definition at line 146 of file smc.h.

SMC_MODE_DBW_MASK

#define SMC_MODE_DBW_MASK   (0x03 << SMC_MODE_DBW_SHIFT)

Definition at line 143 of file smc.h.

SMC_MODE_DBW_SHIFT

#define SMC_MODE_DBW_SHIFT   12

Definition at line 142 of file smc.h.

SMC_MODE_EXNW_MODE_DISABLED

#define SMC_MODE_EXNW_MODE_DISABLED   (0x00 << SMC_MODE_EXNW_MODE_SHIFT)

Definition at line 155 of file smc.h.

SMC_MODE_EXNW_MODE_FROZEN

#define SMC_MODE_EXNW_MODE_FROZEN   (0x02 << SMC_MODE_EXNW_MODE_SHIFT)

Definition at line 156 of file smc.h.

SMC_MODE_EXNW_MODE_MASK

#define SMC_MODE_EXNW_MODE_MASK   (0x03 << SMC_MODE_EXNW_MODE_SHIFT)

Definition at line 152 of file smc.h.

SMC_MODE_EXNW_MODE_READY

#define SMC_MODE_EXNW_MODE_READY   (0x03 << SMC_MODE_EXNW_MODE_SHIFT)

Definition at line 157 of file smc.h.

SMC_MODE_EXNW_MODE_SHIFT

#define SMC_MODE_EXNW_MODE_SHIFT   4

Definition at line 151 of file smc.h.

SMC_MODE_PMEN

#define SMC_MODE_PMEN   (1 << 24)

Definition at line 132 of file smc.h.

SMC_MODE_PS_16_BYTE

#define SMC_MODE_PS_16_BYTE   (0x02 << SMC_MODE_PS_SHIFT)

Definition at line 128 of file smc.h.

SMC_MODE_PS_32_BYTE

#define SMC_MODE_PS_32_BYTE   (0x03 << SMC_MODE_PS_SHIFT)

Definition at line 129 of file smc.h.

SMC_MODE_PS_4_BYTE

#define SMC_MODE_PS_4_BYTE   (0x00 << SMC_MODE_PS_SHIFT)

Definition at line 126 of file smc.h.

SMC_MODE_PS_8_BYTE

#define SMC_MODE_PS_8_BYTE   (0x01 << SMC_MODE_PS_SHIFT)

Definition at line 127 of file smc.h.

SMC_MODE_PS_MASK

#define SMC_MODE_PS_MASK   (0x03 << SMC_MODE_PS_SHIFT)

Definition at line 123 of file smc.h.

SMC_MODE_PS_SHIFT

#define SMC_MODE_PS_SHIFT   28

Definition at line 122 of file smc.h.

SMC_MODE_READ_MODE

#define SMC_MODE_READ_MODE   (1 << 0)

Definition at line 163 of file smc.h.

SMC_MODE_TDF_CYCLES_MASK

#define SMC_MODE_TDF_CYCLES_MASK   (0x0F << SMC_MODE_TDF_CYCLES_SHIFT)

Definition at line 139 of file smc.h.

SMC_MODE_TDF_CYCLES_SHIFT

#define SMC_MODE_TDF_CYCLES_SHIFT   16

Definition at line 138 of file smc.h.

SMC_MODE_TDF_MODE

#define SMC_MODE_TDF_MODE   (1 << 20)

Definition at line 135 of file smc.h.

SMC_MODE_WRITE_MODE

#define SMC_MODE_WRITE_MODE   (1 << 1)

Definition at line 160 of file smc.h.

SMC_OCMS

#define SMC_OCMS   MMIO32(SMC_BASE + 0x80)

Definition at line 52 of file smc.h.

SMC_OCMS_CS0SE

#define SMC_OCMS_CS0SE   (1 << 16)

Definition at line 178 of file smc.h.

SMC_OCMS_CS1SE

#define SMC_OCMS_CS1SE   (1 << 17)

Definition at line 175 of file smc.h.

SMC_OCMS_CS2SE

#define SMC_OCMS_CS2SE   (1 << 18)

Definition at line 172 of file smc.h.

SMC_OCMS_CS3SE

#define SMC_OCMS_CS3SE   (1 << 19)

Definition at line 169 of file smc.h.

SMC_OCMS_SMSE

#define SMC_OCMS_SMSE   (1 << 0)

Definition at line 181 of file smc.h.

SMC_PULSE

#define SMC_PULSE

(

CS_number

)

Value:

                                                MMIO32(SMC_BASE + 0x10*(CS_number) \
                                                + 0x04)

Definition at line 40 of file smc.h.

SMC_PULSE_NCS_RD_PULSE_MASK

#define SMC_PULSE_NCS_RD_PULSE_MASK   (0x7F << SMC_PULSE_NCS_RD_PULSE_SHIFT)

Definition at line 93 of file smc.h.

SMC_PULSE_NCS_RD_PULSE_SHIFT

#define SMC_PULSE_NCS_RD_PULSE_SHIFT   24

Definition at line 92 of file smc.h.

SMC_PULSE_NCS_WR_PULSE_MASK

#define SMC_PULSE_NCS_WR_PULSE_MASK   (0x7F << SMC_PULSE_NCS_WR_PULSE_SHIFT)

Definition at line 101 of file smc.h.

SMC_PULSE_NCS_WR_PULSE_SHIFT

#define SMC_PULSE_NCS_WR_PULSE_SHIFT   8

Definition at line 100 of file smc.h.

SMC_PULSE_NRD_PULSE_MASK

#define SMC_PULSE_NRD_PULSE_MASK   (0x7F << SMC_PULSE_NRD_PULSE_SHIFT)

Definition at line 97 of file smc.h.

SMC_PULSE_NRD_PULSE_SHIFT

#define SMC_PULSE_NRD_PULSE_SHIFT   16

Definition at line 96 of file smc.h.

SMC_PULSE_NWE_PULSE_MASK

#define SMC_PULSE_NWE_PULSE_MASK   (0x7F << SMC_PULSE_NWE_PULSE_SHIFT)

Definition at line 105 of file smc.h.

SMC_PULSE_NWE_PULSE_SHIFT

#define SMC_PULSE_NWE_PULSE_SHIFT   0

Definition at line 104 of file smc.h.

SMC_SETUP

#define SMC_SETUP

(

CS_number

)

Value:

                                                MMIO32(SMC_BASE + 0x10*(CS_number) \
                                                + 0x00)

Definition at line 36 of file smc.h.

SMC_SETUP_NCS_RD_SETUP_MASK

#define SMC_SETUP_NCS_RD_SETUP_MASK   (0x3F << SMC_SETUP_NCS_RD_SETUP_SHIFT)

Definition at line 74 of file smc.h.

SMC_SETUP_NCS_RD_SETUP_SHIFT

#define SMC_SETUP_NCS_RD_SETUP_SHIFT   24

Definition at line 73 of file smc.h.

SMC_SETUP_NCS_WR_SETUP_MASK

#define SMC_SETUP_NCS_WR_SETUP_MASK   (0x3F << SMC_SETUP_NCS_WR_SETUP_SHIFT)

Definition at line 82 of file smc.h.

SMC_SETUP_NCS_WR_SETUP_SHIFT

#define SMC_SETUP_NCS_WR_SETUP_SHIFT   8

Definition at line 81 of file smc.h.

SMC_SETUP_NRD_SETUP_MASK

#define SMC_SETUP_NRD_SETUP_MASK   (0x3F << SMC_SETUP_NRD_SETUP_SHIFT)

Definition at line 78 of file smc.h.

SMC_SETUP_NRD_SETUP_SHIFT

#define SMC_SETUP_NRD_SETUP_SHIFT   16

Definition at line 77 of file smc.h.

SMC_SETUP_NWE_SETUP_MASK

#define SMC_SETUP_NWE_SETUP_MASK   (0x3F << SMC_SETUP_NWE_SETUP_SHIFT)

Definition at line 86 of file smc.h.

SMC_SETUP_NWE_SETUP_SHIFT

#define SMC_SETUP_NWE_SETUP_SHIFT   0

Definition at line 85 of file smc.h.

SMC_WPMR

#define SMC_WPMR   MMIO32(SMC_BASE + 0xE4)

Definition at line 61 of file smc.h.

SMC_WPMR_WPEN

#define SMC_WPMR_WPEN   (1 << 0)

Definition at line 191 of file smc.h.

SMC_WPMR_WPKEY_KEY

#define SMC_WPMR_WPKEY_KEY   (0x534D43 << SMC_WPMR_WPKEY_SHIFT)

Definition at line 188 of file smc.h.

SMC_WPMR_WPKEY_SHIFT

#define SMC_WPMR_WPKEY_SHIFT   8

Definition at line 187 of file smc.h.

SMC_WPSR

#define SMC_WPSR   MMIO32(SMC_BASE + 0xE8)

Definition at line 64 of file smc.h.

SMC_WPSR_WP_VSRC_MASK

#define SMC_WPSR_WP_VSRC_MASK   (0xFFFF << SMC_WPSR_WP_VSRC_SHIFT)

Definition at line 198 of file smc.h.

SMC_WPSR_WP_VSRC_SHIFT

#define SMC_WPSR_WP_VSRC_SHIFT   8

Definition at line 197 of file smc.h.

SMC_WPSR_WPVS

#define SMC_WPSR_WPVS   (1 << 0)

Definition at line 201 of file smc.h.