libopencm3 Defined Constants and Types for STM32 CAN More...
Collaboration diagram for CAN defines:
Modules | |
| CAN register base address | |
Macros | |
| #define | CAN_MCR(can_base) MMIO32((can_base) + 0x000) |
| #define | CAN_MSR(can_base) MMIO32((can_base) + 0x004) |
| #define | CAN_TSR(can_base) MMIO32((can_base) + 0x008) |
| #define | CAN_RF0R(can_base) MMIO32((can_base) + 0x00C) |
| #define | CAN_RF1R(can_base) MMIO32((can_base) + 0x010) |
| #define | CAN_IER(can_base) MMIO32((can_base) + 0x014) |
| #define | CAN_ESR(can_base) MMIO32((can_base) + 0x018) |
| #define | CAN_BTR(can_base) MMIO32((can_base) + 0x01C) |
| #define | CAN_MBOX0 0x180 |
| #define | CAN_MBOX1 0x190 |
| #define | CAN_MBOX2 0x1A0 |
| #define | CAN_FIFO0 0x1B0 |
| #define | CAN_FIFO1 0x1C0 |
| #define | CAN_TIxR(can_base, mbox) MMIO32((can_base) + (mbox) + 0x0) |
| #define | CAN_TI0R(can_base) CAN_TIxR(can_base, CAN_MBOX0) |
| #define | CAN_TI1R(can_base) CAN_TIxR(can_base, CAN_MBOX1) |
| #define | CAN_TI2R(can_base) CAN_TIxR(can_base, CAN_MBOX2) |
| #define | CAN_TDTxR(can_base, mbox) MMIO32((can_base) + (mbox) + 0x4) |
| #define | CAN_TDT0R(can_base) CAN_TDTxR((can_base), CAN_MBOX0) |
| #define | CAN_TDT1R(can_base) CAN_TDTxR((can_base), CAN_MBOX1) |
| #define | CAN_TDT2R(can_base) CAN_TDTxR((can_base), CAN_MBOX2) |
| #define | CAN_TDLxR(can_base, mbox) MMIO32((can_base) + (mbox) + 0x8) |
| #define | CAN_TDL0R(can_base) CAN_TDLxR((can_base), CAN_MBOX0) |
| #define | CAN_TDL1R(can_base) CAN_TDLxR((can_base), CAN_MBOX1) |
| #define | CAN_TDL2R(can_base) CAN_TDLxR((can_base), CAN_MBOX2) |
| #define | CAN_TDHxR(can_base, mbox) MMIO32((can_base) + (mbox) + 0xC) |
| #define | CAN_TDH0R(can_base) CAN_TDHxR((can_base), CAN_MBOX0) |
| #define | CAN_TDH1R(can_base) CAN_TDHxR((can_base), CAN_MBOX1) |
| #define | CAN_TDH2R(can_base) CAN_TDHxR((can_base), CAN_MBOX2) |
| #define | CAN_RIxR(can_base, fifo) MMIO32((can_base) + (fifo) + 0x0) |
| #define | CAN_RI0R(can_base) CAN_RIxR((can_base), CAN_FIFO0) |
| #define | CAN_RI1R(can_base) CAN_RIxR((can_base), CAN_FIFO1) |
| #define | CAN_RDTxR(can_base, fifo) MMIO32((can_base) + (fifo) + 0x4) |
| #define | CAN_RDT0R(can_base) CAN_RDTxR((can_base), CAN_FIFO0) |
| #define | CAN_RDT1R(can_base) CAN_RDTxR((can_base), CAN_FIFO1) |
| #define | CAN_RDLxR(can_base, fifo) MMIO32((can_base) + (fifo) + 0x8) |
| #define | CAN_RDL0R(can_base) CAN_RDLxR((can_base), CAN_FIFO0) |
| #define | CAN_RDL1R(can_base) CAN_RDLxR((can_base), CAN_FIFO1) |
| #define | CAN_RDHxR(can_base, fifo) MMIO32((can_base) + (fifo) + 0xC) |
| #define | CAN_RDH0R(can_base) CAN_RDHxR((can_base), CAN_FIFO0) |
| #define | CAN_RDH1R(can_base) CAN_RDHxR((can_base), CAN_FIFO1) |
| #define | CAN_FMR(can_base) MMIO32((can_base) + 0x200) |
| #define | CAN_FM1R(can_base) MMIO32((can_base) + 0x204) |
| #define | CAN_FS1R(can_base) MMIO32((can_base) + 0x20C) |
| #define | CAN_FFA1R(can_base) MMIO32((can_base) + 0x214) |
| #define | CAN_FA1R(can_base) MMIO32((can_base) + 0x21C) |
| #define | CAN_FiR1(can_base, bank) |
| #define | CAN_FiR2(can_base, bank) |
| #define | CAN_MCR_DBF (1 << 16) |
| #define | CAN_MCR_RESET (1 << 15) |
| #define | CAN_MCR_TTCM (1 << 7) |
| #define | CAN_MCR_ABOM (1 << 6) |
| #define | CAN_MCR_AWUM (1 << 5) |
| #define | CAN_MCR_NART (1 << 4) |
| #define | CAN_MCR_RFLM (1 << 3) |
| #define | CAN_MCR_TXFP (1 << 2) |
| #define | CAN_MCR_SLEEP (1 << 1) |
| #define | CAN_MCR_INRQ (1 << 0) |
| #define | CAN_MSR_RX (1 << 11) |
| #define | CAN_MSR_SAMP (1 << 10) |
| #define | CAN_MSR_RXM (1 << 9) |
| #define | CAN_MSR_TXM (1 << 8) |
| #define | CAN_MSR_SLAKI (1 << 4) |
| #define | CAN_MSR_WKUI (1 << 3) |
| #define | CAN_MSR_ERRI (1 << 2) |
| #define | CAN_MSR_SLAK (1 << 1) |
| #define | CAN_MSR_INAK (1 << 0) |
| #define | CAN_TSR_LOW2 (1 << 31) |
| #define | CAN_TSR_LOW1 (1 << 30) |
| #define | CAN_TSR_LOW0 (1 << 29) |
| #define | CAN_TSR_TME2 (1 << 28) |
| #define | CAN_TSR_TME1 (1 << 27) |
| #define | CAN_TSR_TME0 (1 << 26) |
| #define | CAN_TSR_CODE_MASK (0x3 << 24) |
| #define | CAN_TSR_ABRQ2 (1 << 23) |
| #define | CAN_TSR_TERR2 (1 << 19) |
| #define | CAN_TSR_ALST2 (1 << 18) |
| #define | CAN_TSR_TXOK2 (1 << 17) |
| #define | CAN_TSR_RQCP2 (1 << 16) |
| #define | CAN_TSR_ABRQ1 (1 << 15) |
| #define | CAN_TSR_TERR1 (1 << 11) |
| #define | CAN_TSR_ALST1 (1 << 10) |
| #define | CAN_TSR_TXOK1 (1 << 9) |
| #define | CAN_TSR_RQCP1 (1 << 8) |
| #define | CAN_TSR_ABRQ0 (1 << 7) |
| #define | CAN_TSR_TERR0 (1 << 3) |
| #define | CAN_TSR_ALST0 (1 << 2) |
| #define | CAN_TSR_TXOK0 (1 << 1) |
| #define | CAN_TSR_RQCP0 (1 << 0) |
| #define | CAN_RF0R_RFOM0 (1 << 5) |
| #define | CAN_RF0R_FOVR0 (1 << 4) |
| #define | CAN_RF0R_FULL0 (1 << 3) |
| #define | CAN_RF0R_FMP0_MASK (0x3 << 0) |
| #define | CAN_RF1R_RFOM1 (1 << 5) |
| #define | CAN_RF1R_FOVR1 (1 << 4) |
| #define | CAN_RF1R_FULL1 (1 << 3) |
| #define | CAN_RF1R_FMP1_MASK (0x3 << 0) |
| #define | CAN_IER_SLKIE (1 << 17) |
| #define | CAN_IER_WKUIE (1 << 16) |
| #define | CAN_IER_ERRIE (1 << 15) |
| #define | CAN_IER_LECIE (1 << 11) |
| #define | CAN_IER_BOFIE (1 << 10) |
| #define | CAN_IER_EPVIE (1 << 9) |
| #define | CAN_IER_EWGIE (1 << 8) |
| #define | CAN_IER_FOVIE1 (1 << 6) |
| #define | CAN_IER_FFIE1 (1 << 5) |
| #define | CAN_IER_FMPIE1 (1 << 4) |
| #define | CAN_IER_FOVIE0 (1 << 3) |
| #define | CAN_IER_FFIE0 (1 << 2) |
| #define | CAN_IER_FMPIE0 (1 << 1) |
| #define | CAN_IER_TMEIE (1 << 0) |
| #define | CAN_ESR_REC_MASK (0xF << 24) |
| #define | CAN_ESR_TEC_MASK (0xF << 16) |
| #define | CAN_ESR_LEC_NO_ERROR (0x0 << 4) |
| #define | CAN_ESR_LEC_STUFF_ERROR (0x1 << 4) |
| #define | CAN_ESR_LEC_FORM_ERROR (0x2 << 4) |
| #define | CAN_ESR_LEC_ACK_ERROR (0x3 << 4) |
| #define | CAN_ESR_LEC_REC_ERROR (0x4 << 4) |
| #define | CAN_ESR_LEC_DOM_ERROR (0x5 << 4) |
| #define | CAN_ESR_LEC_CRC_ERROR (0x6 << 4) |
| #define | CAN_ESR_LEC_SOFT_ERROR (0x7 << 4) |
| #define | CAN_ESR_LEC_MASK (0x7 << 4) |
| #define | CAN_ESR_BOFF (1 << 2) |
| #define | CAN_ESR_EPVF (1 << 1) |
| #define | CAN_ESR_EWGF (1 << 0) |
| #define | CAN_BTR_SILM (1 << 31) |
| #define | CAN_BTR_LBKM (1 << 30) |
| #define | CAN_BTR_SJW_1TQ (0x0 << 24) |
| #define | CAN_BTR_SJW_2TQ (0x1 << 24) |
| #define | CAN_BTR_SJW_3TQ (0x2 << 24) |
| #define | CAN_BTR_SJW_4TQ (0x3 << 24) |
| #define | CAN_BTR_SJW_MASK (0x3 << 24) |
| #define | CAN_BTR_SJW_SHIFT 24 |
| #define | CAN_BTR_TS2_1TQ (0x0 << 20) |
| #define | CAN_BTR_TS2_2TQ (0x1 << 20) |
| #define | CAN_BTR_TS2_3TQ (0x2 << 20) |
| #define | CAN_BTR_TS2_4TQ (0x3 << 20) |
| #define | CAN_BTR_TS2_5TQ (0x4 << 20) |
| #define | CAN_BTR_TS2_6TQ (0x5 << 20) |
| #define | CAN_BTR_TS2_7TQ (0x6 << 20) |
| #define | CAN_BTR_TS2_8TQ (0x7 << 20) |
| #define | CAN_BTR_TS2_MASK (0x7 << 20) |
| #define | CAN_BTR_TS2_SHIFT 20 |
| #define | CAN_BTR_TS1_1TQ (0x0 << 16) |
| #define | CAN_BTR_TS1_2TQ (0x1 << 16) |
| #define | CAN_BTR_TS1_3TQ (0x2 << 16) |
| #define | CAN_BTR_TS1_4TQ (0x3 << 16) |
| #define | CAN_BTR_TS1_5TQ (0x4 << 16) |
| #define | CAN_BTR_TS1_6TQ (0x5 << 16) |
| #define | CAN_BTR_TS1_7TQ (0x6 << 16) |
| #define | CAN_BTR_TS1_8TQ (0x7 << 16) |
| #define | CAN_BTR_TS1_9TQ (0x8 << 16) |
| #define | CAN_BTR_TS1_10TQ (0x9 << 16) |
| #define | CAN_BTR_TS1_11TQ (0xA << 16) |
| #define | CAN_BTR_TS1_12TQ (0xB << 16) |
| #define | CAN_BTR_TS1_13TQ (0xC << 16) |
| #define | CAN_BTR_TS1_14TQ (0xD << 16) |
| #define | CAN_BTR_TS1_15TQ (0xE << 16) |
| #define | CAN_BTR_TS1_16TQ (0xF << 16) |
| #define | CAN_BTR_TS1_MASK (0xF << 16) |
| #define | CAN_BTR_TS1_SHIFT 16 |
| #define | CAN_BTR_BRP_MASK (0x3FFUL << 0) |
| #define | CAN_TIxR_STID_MASK (0x7FF << 21) |
| #define | CAN_TIxR_STID_SHIFT 21 |
| #define | CAN_TIxR_EXID_MASK (0x1FFFFFF << 3) |
| #define | CAN_TIxR_EXID_SHIFT 3 |
| #define | CAN_TIxR_IDE (1 << 2) |
| #define | CAN_TIxR_RTR (1 << 1) |
| #define | CAN_TIxR_TXRQ (1 << 0) |
| #define | CAN_TDTxR_TIME_MASK (0xFFFF << 15) |
| #define | CAN_TDTxR_TIME_SHIFT 15 |
| #define | CAN_TDTxR_TGT (1 << 5) |
| #define | CAN_TDTxR_DLC_MASK (0xF << 0) |
| #define | CAN_TDTxR_DLC_SHIFT 0 |
| #define | CAN_RIxR_STID_MASK (0x7FF) |
| #define | CAN_RIxR_STID_SHIFT 21 |
| #define | CAN_RIxR_EXID_MASK (0x1FFFFFFF) |
| #define | CAN_RIxR_EXID_SHIFT 3 |
| #define | CAN_RIxR_IDE (1 << 2) |
| #define | CAN_RIxR_RTR (1 << 1) |
| #define | CAN_RDTxR_TIME_MASK (0xFFFF << 16) |
| #define | CAN_RDTxR_TIME_SHIFT 16 |
| #define | CAN_RDTxR_FMI_MASK (0xFF << 8) |
| #define | CAN_RDTxR_FMI_SHIFT 8 |
| #define | CAN_RDTxR_DLC_MASK (0xF << 0) |
| #define | CAN_RDTxR_DLC_SHIFT 0 |
| #define | CAN_FMR_CAN2SB_SHIFT 8 |
| #define | CAN_FMR_CAN2SB_MASK (0x3F << CAN_FMR_CAN2SB_SHIFT) |
| #define | CAN_FMR_FINIT (1 << 0) |
Functions | |
| void | can_reset (uint32_t canport) |
| CAN Reset. More... | |
| int | can_init (uint32_t canport, bool ttcm, bool abom, bool awum, bool nart, bool rflm, bool txfp, uint32_t sjw, uint32_t ts1, uint32_t ts2, uint32_t brp, bool loopback, bool silent) |
| CAN Init. More... | |
| void | can_filter_init (uint32_t nr, bool scale_32bit, bool id_list_mode, uint32_t fr1, uint32_t fr2, uint32_t fifo, bool enable) |
| CAN Filter Init. More... | |
| void | can_filter_id_mask_16bit_init (uint32_t nr, uint16_t id1, uint16_t mask1, uint16_t id2, uint16_t mask2, uint32_t fifo, bool enable) |
| CAN Initialize a 16bit Message ID Mask Filter. More... | |
| void | can_filter_id_mask_32bit_init (uint32_t nr, uint32_t id, uint32_t mask, uint32_t fifo, bool enable) |
| CAN Initialize a 32bit Message ID Mask Filter. More... | |
| void | can_filter_id_list_16bit_init (uint32_t nr, uint16_t id1, uint16_t id2, uint16_t id3, uint16_t id4, uint32_t fifo, bool enable) |
| CAN Initialize a 16bit Message ID List Filter. More... | |
| void | can_filter_id_list_32bit_init (uint32_t nr, uint32_t id1, uint32_t id2, uint32_t fifo, bool enable) |
| CAN Initialize a 32bit Message ID List Filter. More... | |
| void | can_enable_irq (uint32_t canport, uint32_t irq) |
| CAN Enable IRQ. More... | |
| void | can_disable_irq (uint32_t canport, uint32_t irq) |
| CAN Disable IRQ. More... | |
| int | can_transmit (uint32_t canport, uint32_t id, bool ext, bool rtr, uint8_t length, uint8_t *data) |
| CAN Transmit Message. More... | |
| void | can_receive (uint32_t canport, uint8_t fifo, bool release, uint32_t *id, bool *ext, bool *rtr, uint8_t *fmi, uint8_t *length, uint8_t *data, uint16_t *timestamp) |
| CAN Receive Message. More... | |
| void | can_fifo_release (uint32_t canport, uint8_t fifo) |
| CAN Release FIFO. More... | |
| bool | can_available_mailbox (uint32_t canport) |
Detailed Description
libopencm3 Defined Constants and Types for STM32 CAN
- Version
- 1.0.0
- Date
- 12 November 2012
LGPL License Terms libopencm3 License
Macro Definition Documentation
◆ CAN_BTR
◆ CAN_BTR_BRP_MASK
◆ CAN_BTR_LBKM
◆ CAN_BTR_SILM
◆ CAN_BTR_SJW_1TQ
◆ CAN_BTR_SJW_2TQ
◆ CAN_BTR_SJW_3TQ
◆ CAN_BTR_SJW_4TQ
◆ CAN_BTR_SJW_MASK
◆ CAN_BTR_SJW_SHIFT
◆ CAN_BTR_TS1_10TQ
◆ CAN_BTR_TS1_11TQ
◆ CAN_BTR_TS1_12TQ
◆ CAN_BTR_TS1_13TQ
◆ CAN_BTR_TS1_14TQ
◆ CAN_BTR_TS1_15TQ
◆ CAN_BTR_TS1_16TQ
◆ CAN_BTR_TS1_1TQ
◆ CAN_BTR_TS1_2TQ
◆ CAN_BTR_TS1_3TQ
◆ CAN_BTR_TS1_4TQ
◆ CAN_BTR_TS1_5TQ
◆ CAN_BTR_TS1_6TQ
◆ CAN_BTR_TS1_7TQ
◆ CAN_BTR_TS1_8TQ
◆ CAN_BTR_TS1_9TQ
◆ CAN_BTR_TS1_MASK
◆ CAN_BTR_TS1_SHIFT
◆ CAN_BTR_TS2_1TQ
◆ CAN_BTR_TS2_2TQ
◆ CAN_BTR_TS2_3TQ
◆ CAN_BTR_TS2_4TQ
◆ CAN_BTR_TS2_5TQ
◆ CAN_BTR_TS2_6TQ
◆ CAN_BTR_TS2_7TQ
◆ CAN_BTR_TS2_8TQ
◆ CAN_BTR_TS2_MASK
◆ CAN_BTR_TS2_SHIFT
◆ CAN_ESR
◆ CAN_ESR_BOFF
◆ CAN_ESR_EPVF
◆ CAN_ESR_EWGF
◆ CAN_ESR_LEC_ACK_ERROR
◆ CAN_ESR_LEC_CRC_ERROR
◆ CAN_ESR_LEC_DOM_ERROR
◆ CAN_ESR_LEC_FORM_ERROR
◆ CAN_ESR_LEC_MASK
◆ CAN_ESR_LEC_NO_ERROR
◆ CAN_ESR_LEC_REC_ERROR
◆ CAN_ESR_LEC_SOFT_ERROR
◆ CAN_ESR_LEC_STUFF_ERROR
◆ CAN_ESR_REC_MASK
◆ CAN_ESR_TEC_MASK
◆ CAN_FA1R
◆ CAN_FFA1R
◆ CAN_FIFO0
◆ CAN_FIFO1
◆ CAN_FiR1
| #define CAN_FiR1 | ( | can_base, | |
| bank | |||
| ) |
Value:
MMIO32((can_base) + 0x240 + \
((bank) * 0x8) + 0x0)
◆ CAN_FiR2
| #define CAN_FiR2 | ( | can_base, | |
| bank | |||
| ) |
◆ CAN_FM1R
◆ CAN_FMR
◆ CAN_FMR_CAN2SB_MASK
| #define CAN_FMR_CAN2SB_MASK (0x3F << CAN_FMR_CAN2SB_SHIFT) |
◆ CAN_FMR_CAN2SB_SHIFT
◆ CAN_FMR_FINIT
◆ CAN_FS1R
◆ CAN_IER
◆ CAN_IER_BOFIE
◆ CAN_IER_EPVIE
◆ CAN_IER_ERRIE
◆ CAN_IER_EWGIE
◆ CAN_IER_FFIE0
◆ CAN_IER_FFIE1
◆ CAN_IER_FMPIE0
◆ CAN_IER_FMPIE1
◆ CAN_IER_FOVIE0
◆ CAN_IER_FOVIE1
◆ CAN_IER_LECIE
◆ CAN_IER_SLKIE
◆ CAN_IER_TMEIE
◆ CAN_IER_WKUIE
◆ CAN_MBOX0
◆ CAN_MBOX1
◆ CAN_MBOX2
◆ CAN_MCR
◆ CAN_MCR_ABOM
◆ CAN_MCR_AWUM
◆ CAN_MCR_DBF
◆ CAN_MCR_INRQ
◆ CAN_MCR_NART
◆ CAN_MCR_RESET
◆ CAN_MCR_RFLM
◆ CAN_MCR_SLEEP
◆ CAN_MCR_TTCM
◆ CAN_MCR_TXFP
◆ CAN_MSR
◆ CAN_MSR_ERRI
◆ CAN_MSR_INAK
◆ CAN_MSR_RX
◆ CAN_MSR_RXM
◆ CAN_MSR_SAMP
◆ CAN_MSR_SLAK
◆ CAN_MSR_SLAKI
◆ CAN_MSR_TXM
◆ CAN_MSR_WKUI
◆ CAN_RDH0R
◆ CAN_RDH1R
◆ CAN_RDHxR
| #define CAN_RDHxR | ( | can_base, | |
| fifo | |||
| ) | MMIO32((can_base) + (fifo) + 0xC) |
◆ CAN_RDL0R
◆ CAN_RDL1R
◆ CAN_RDLxR
| #define CAN_RDLxR | ( | can_base, | |
| fifo | |||
| ) | MMIO32((can_base) + (fifo) + 0x8) |
◆ CAN_RDT0R
◆ CAN_RDT1R
◆ CAN_RDTxR
| #define CAN_RDTxR | ( | can_base, | |
| fifo | |||
| ) | MMIO32((can_base) + (fifo) + 0x4) |
◆ CAN_RDTxR_DLC_MASK
◆ CAN_RDTxR_DLC_SHIFT
◆ CAN_RDTxR_FMI_MASK
◆ CAN_RDTxR_FMI_SHIFT
◆ CAN_RDTxR_TIME_MASK
◆ CAN_RDTxR_TIME_SHIFT
◆ CAN_RF0R
◆ CAN_RF0R_FMP0_MASK
◆ CAN_RF0R_FOVR0
◆ CAN_RF0R_FULL0
◆ CAN_RF0R_RFOM0
◆ CAN_RF1R
◆ CAN_RF1R_FMP1_MASK
◆ CAN_RF1R_FOVR1
◆ CAN_RF1R_FULL1
◆ CAN_RF1R_RFOM1
◆ CAN_RI0R
◆ CAN_RI1R
◆ CAN_RIxR
| #define CAN_RIxR | ( | can_base, | |
| fifo | |||
| ) | MMIO32((can_base) + (fifo) + 0x0) |
◆ CAN_RIxR_EXID_MASK
◆ CAN_RIxR_EXID_SHIFT
◆ CAN_RIxR_IDE
◆ CAN_RIxR_RTR
◆ CAN_RIxR_STID_MASK
◆ CAN_RIxR_STID_SHIFT
◆ CAN_TDH0R
◆ CAN_TDH1R
◆ CAN_TDH2R
◆ CAN_TDHxR
| #define CAN_TDHxR | ( | can_base, | |
| mbox | |||
| ) | MMIO32((can_base) + (mbox) + 0xC) |
◆ CAN_TDL0R
◆ CAN_TDL1R
◆ CAN_TDL2R
◆ CAN_TDLxR
| #define CAN_TDLxR | ( | can_base, | |
| mbox | |||
| ) | MMIO32((can_base) + (mbox) + 0x8) |
◆ CAN_TDT0R
◆ CAN_TDT1R
◆ CAN_TDT2R
◆ CAN_TDTxR
| #define CAN_TDTxR | ( | can_base, | |
| mbox | |||
| ) | MMIO32((can_base) + (mbox) + 0x4) |
◆ CAN_TDTxR_DLC_MASK
◆ CAN_TDTxR_DLC_SHIFT
◆ CAN_TDTxR_TGT
◆ CAN_TDTxR_TIME_MASK
◆ CAN_TDTxR_TIME_SHIFT
◆ CAN_TI0R
◆ CAN_TI1R
◆ CAN_TI2R
◆ CAN_TIxR
| #define CAN_TIxR | ( | can_base, | |
| mbox | |||
| ) | MMIO32((can_base) + (mbox) + 0x0) |
◆ CAN_TIxR_EXID_MASK
◆ CAN_TIxR_EXID_SHIFT
◆ CAN_TIxR_IDE
◆ CAN_TIxR_RTR
◆ CAN_TIxR_STID_MASK
◆ CAN_TIxR_STID_SHIFT
◆ CAN_TIxR_TXRQ
◆ CAN_TSR
◆ CAN_TSR_ABRQ0
◆ CAN_TSR_ABRQ1
◆ CAN_TSR_ABRQ2
◆ CAN_TSR_ALST0
◆ CAN_TSR_ALST1
◆ CAN_TSR_ALST2
◆ CAN_TSR_CODE_MASK
◆ CAN_TSR_LOW0
◆ CAN_TSR_LOW1
◆ CAN_TSR_LOW2
◆ CAN_TSR_RQCP0
◆ CAN_TSR_RQCP1
◆ CAN_TSR_RQCP2
◆ CAN_TSR_TERR0
◆ CAN_TSR_TERR1
◆ CAN_TSR_TERR2
◆ CAN_TSR_TME0
◆ CAN_TSR_TME1
◆ CAN_TSR_TME2
◆ CAN_TSR_TXOK0
◆ CAN_TSR_TXOK1
◆ CAN_TSR_TXOK2
Function Documentation
◆ can_available_mailbox()
| bool can_available_mailbox | ( | uint32_t | canport | ) |
Definition at line 547 of file can.c.
References CAN_TSR, CAN_TSR_TME0, CAN_TSR_TME1, and CAN_TSR_TME2.
◆ can_disable_irq()
| void can_disable_irq | ( | uint32_t | canport, |
| uint32_t | irq | ||
| ) |
CAN Disable IRQ.
- Parameters
-
[in] canport Unsigned int32. CAN block register base CAN register base address. [in] irq Unsigned int32. IRQ bit(s).
Definition at line 337 of file can.c.
References CAN_IER.
◆ can_enable_irq()
| void can_enable_irq | ( | uint32_t | canport, |
| uint32_t | irq | ||
| ) |
CAN Enable IRQ.
- Parameters
-
[in] canport Unsigned int32. CAN block register base CAN register base address. [in] irq Unsigned int32. IRQ bit(s).
Definition at line 326 of file can.c.
References CAN_IER.
◆ can_fifo_release()
| void can_fifo_release | ( | uint32_t | canport, |
| uint8_t | fifo | ||
| ) |
CAN Release FIFO.
- Parameters
-
[in] canport Unsigned int32. CAN block register base CAN register base address. [in] fifo Unsigned int8. FIFO id.
Definition at line 446 of file can.c.
References CAN_RF0R, CAN_RF1R, and CAN_RF1R_RFOM1.
Referenced by can_receive().
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◆ can_filter_id_list_16bit_init()
| void can_filter_id_list_16bit_init | ( | uint32_t | nr, |
| uint16_t | id1, | ||
| uint16_t | id2, | ||
| uint16_t | id3, | ||
| uint16_t | id4, | ||
| uint32_t | fifo, | ||
| bool | enable | ||
| ) |
CAN Initialize a 16bit Message ID List Filter.
- Parameters
-
[in] nr Unsigned int32. ID number of the filter. [in] id1 Unsigned int16. First message ID to match. [in] id2 Unsigned int16. Second message ID to match. [in] id3 Unsigned int16. Third message ID to match. [in] id4 Unsigned int16. Fourth message ID to match. [in] fifo Unsigned int32. FIFO id. [in] enable bool. Enable filter?
Definition at line 294 of file can.c.
References can_filter_init().
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◆ can_filter_id_list_32bit_init()
| void can_filter_id_list_32bit_init | ( | uint32_t | nr, |
| uint32_t | id1, | ||
| uint32_t | id2, | ||
| uint32_t | fifo, | ||
| bool | enable | ||
| ) |
CAN Initialize a 32bit Message ID List Filter.
- Parameters
-
[in] nr Unsigned int32. ID number of the filter. [in] id1 Unsigned int32. First message ID to match. [in] id2 Unsigned int32. Second message ID to match. [in] fifo Unsigned int32. FIFO id. [in] enable bool. Enable filter?
Definition at line 313 of file can.c.
References can_filter_init().
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◆ can_filter_id_mask_16bit_init()
| void can_filter_id_mask_16bit_init | ( | uint32_t | nr, |
| uint16_t | id1, | ||
| uint16_t | mask1, | ||
| uint16_t | id2, | ||
| uint16_t | mask2, | ||
| uint32_t | fifo, | ||
| bool | enable | ||
| ) |
CAN Initialize a 16bit Message ID Mask Filter.
- Parameters
-
[in] nr Unsigned int32. ID number of the filter. [in] id1 Unsigned int16. First message ID to filter. [in] mask1 Unsigned int16. First message ID bit mask. [in] id2 Unsigned int16. Second message ID to filter. [in] mask2 Unsigned int16. Second message ID bit mask. [in] fifo Unsigned int32. FIFO id. [in] enable bool. Enable filter?
Definition at line 259 of file can.c.
References can_filter_init().
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◆ can_filter_id_mask_32bit_init()
| void can_filter_id_mask_32bit_init | ( | uint32_t | nr, |
| uint32_t | id, | ||
| uint32_t | mask, | ||
| uint32_t | fifo, | ||
| bool | enable | ||
| ) |
CAN Initialize a 32bit Message ID Mask Filter.
- Parameters
-
[in] nr Unsigned int32. ID number of the filter. [in] id Unsigned int32. Message ID to filter. [in] mask Unsigned int32. Message ID bit mask. [in] fifo Unsigned int32. FIFO id. [in] enable bool. Enable filter?
Definition at line 277 of file can.c.
References can_filter_init().
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◆ can_filter_init()
| void can_filter_init | ( | uint32_t | nr, |
| bool | scale_32bit, | ||
| bool | id_list_mode, | ||
| uint32_t | fr1, | ||
| uint32_t | fr2, | ||
| uint32_t | fifo, | ||
| bool | enable | ||
| ) |
CAN Filter Init.
Initialize incoming message filter and assign to FIFO.
- Parameters
-
[in] nr Unsigned int32. ID number of the filter. [in] scale_32bit true for single 32bit, false for dual 16bit [in] id_list_mode true for id lists, false for id/mask [in] fr1 Unsigned int32. First filter register content. [in] fr2 Unsigned int32. Second filter register content. [in] fifo Unsigned int32. FIFO id. [in] enable bool. Enable filter?
Definition at line 199 of file can.c.
References CAN1, CAN_FA1R, CAN_FFA1R, CAN_FiR1, CAN_FiR2, CAN_FM1R, CAN_FMR, CAN_FMR_FINIT, and CAN_FS1R.
Referenced by can_filter_id_list_16bit_init(), can_filter_id_list_32bit_init(), can_filter_id_mask_16bit_init(), and can_filter_id_mask_32bit_init().
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◆ can_init()
| int can_init | ( | uint32_t | canport, |
| bool | ttcm, | ||
| bool | abom, | ||
| bool | awum, | ||
| bool | nart, | ||
| bool | rflm, | ||
| bool | txfp, | ||
| uint32_t | sjw, | ||
| uint32_t | ts1, | ||
| uint32_t | ts2, | ||
| uint32_t | brp, | ||
| bool | loopback, | ||
| bool | silent | ||
| ) |
CAN Init.
Initialize the selected CAN peripheral block.
- Parameters
-
[in] canport Unsigend int32. CAN register base address CAN register base address. [in] ttcm bool. Time triggered communication mode. [in] abom bool. Automatic bus-off management. [in] awum bool. Automatic wakeup mode. [in] nart bool. No automatic retransmission. [in] rflm bool. Receive FIFO locked mode. [in] txfp bool. Transmit FIFO priority. [in] sjw Unsigned int32. Resynchronization time quanta jump width. [in] ts1 Unsigned int32. Time segment 1 time quanta width. [in] ts2 Unsigned int32. Time segment 2 time quanta width. [in] brp Unsigned int32. Baud rate prescaler.
- Returns
- int 0 on success, 1 on initialization failure.
Definition at line 92 of file can.c.
References CAN_BTR, CAN_BTR_BRP_MASK, CAN_BTR_LBKM, CAN_BTR_SILM, CAN_MCR, CAN_MCR_ABOM, CAN_MCR_AWUM, CAN_MCR_INRQ, CAN_MCR_NART, CAN_MCR_RFLM, CAN_MCR_TTCM, CAN_MCR_TXFP, CAN_MSR, CAN_MSR_INAK, and CAN_MSR_INAK_TIMEOUT.
◆ can_receive()
| void can_receive | ( | uint32_t | canport, |
| uint8_t | fifo, | ||
| bool | release, | ||
| uint32_t * | id, | ||
| bool * | ext, | ||
| bool * | rtr, | ||
| uint8_t * | fmi, | ||
| uint8_t * | length, | ||
| uint8_t * | data, | ||
| uint16_t * | timestamp | ||
| ) |
CAN Receive Message.
- Parameters
-
[in] canport Unsigned int32. CAN block register base CAN register base address. [in] fifo Unsigned int8. FIFO id. [in] release bool. Release the FIFO automatically after coping data out. [out] id Unsigned int32 pointer. Message ID. [out] ext bool pointer. The message ID is extended? [out] rtr bool pointer. Request of transmission? [out] fmi Unsigned int8 pointer. ID of the matched filter. [out] length Unsigned int8 pointer. Length of message payload. [out] data Unsigned int8[]. Message payload data. [out] timestamp Pointer to store the message timestamp. Only valid on time triggered CAN. Use NULL to ignore.
Definition at line 470 of file can.c.
References CAN_FIFO0, CAN_FIFO1, can_fifo_release(), CAN_RDHxR, CAN_RDLxR, CAN_RDTxR, CAN_RDTxR_DLC_MASK, CAN_RDTxR_FMI_MASK, CAN_RDTxR_FMI_SHIFT, CAN_RDTxR_TIME_MASK, CAN_RDTxR_TIME_SHIFT, CAN_RIxR, CAN_RIxR_EXID_MASK, CAN_RIxR_EXID_SHIFT, CAN_RIxR_IDE, CAN_RIxR_RTR, CAN_RIxR_STID_MASK, and CAN_RIxR_STID_SHIFT.
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◆ can_reset()
| void can_reset | ( | uint32_t | canport | ) |
CAN Reset.
The CAN peripheral and all its associated configuration registers are placed in the reset condition. The reset is effective via the RCC peripheral reset system.
- Parameters
-
[in] canport Unsigned int32. CAN block register address base CAN register base address.
Definition at line 63 of file can.c.
References CAN1, rcc_periph_reset_pulse(), and RST_CAN1.
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◆ can_transmit()
| int can_transmit | ( | uint32_t | canport, |
| uint32_t | id, | ||
| bool | ext, | ||
| bool | rtr, | ||
| uint8_t | length, | ||
| uint8_t * | data | ||
| ) |
CAN Transmit Message.
- Parameters
-
[in] canport Unsigned int32. CAN block register base CAN register base address. [in] id Unsigned int32. Message ID. [in] ext bool. Extended message ID? [in] rtr bool. Request transmit? [in] length Unsigned int8. Message payload length. [in] data Unsigned int8[]. Message payload data.
- Returns
- int 0, 1 or 2 on success and depending on which outgoing mailbox got selected. -1 if no mailbox was available and no transmission got queued.
Definition at line 354 of file can.c.
References CAN_MBOX0, CAN_MBOX1, CAN_MBOX2, CAN_TDHxR, CAN_TDLxR, CAN_TDTxR, CAN_TDTxR_DLC_MASK, CAN_TIxR, CAN_TIxR_EXID_SHIFT, CAN_TIxR_IDE, CAN_TIxR_RTR, CAN_TIxR_STID_SHIFT, CAN_TIxR_TXRQ, CAN_TSR, CAN_TSR_TME0, CAN_TSR_TME1, and CAN_TSR_TME2.
