libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
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Functions | |
void | adc_set_sample_time (uint32_t adc, uint8_t channel, uint8_t time) |
ADC Set the Sample Time for a Single Channel. More... | |
void | adc_set_sample_time_on_all_channels (uint32_t adc, uint8_t time) |
ADC Set the Sample Time for All Channels. More... | |
void | adc_set_multi_mode (uint32_t mode) |
ADC Set Dual/Triple Mode. More... | |
void | adc_enable_vbat_sensor (void) |
Enable The VBat Sensor. More... | |
void | adc_disable_vbat_sensor (void) |
Disable The VBat Sensor. More... | |
void | adc_power_off (uint32_t adc) |
ADC Off. More... | |
void | adc_enable_analog_watchdog_regular (uint32_t adc) |
ADC Enable Analog Watchdog for Regular Conversions. More... | |
void | adc_disable_analog_watchdog_regular (uint32_t adc) |
ADC Disable Analog Watchdog for Regular Conversions. More... | |
void | adc_enable_analog_watchdog_injected (uint32_t adc) |
ADC Enable Analog Watchdog for Injected Conversions. More... | |
void | adc_disable_analog_watchdog_injected (uint32_t adc) |
ADC Disable Analog Watchdog for Injected Conversions. More... | |
void | adc_enable_discontinuous_mode_regular (uint32_t adc, uint8_t length) |
ADC Enable Discontinuous Mode for Regular Conversions. More... | |
void | adc_disable_discontinuous_mode_regular (uint32_t adc) |
ADC Disable Discontinuous Mode for Regular Conversions. More... | |
void | adc_enable_discontinuous_mode_injected (uint32_t adc) |
ADC Enable Discontinuous Mode for Injected Conversions. More... | |
void | adc_disable_discontinuous_mode_injected (uint32_t adc) |
ADC Disable Discontinuous Mode for Injected Conversions. More... | |
void | adc_enable_automatic_injected_group_conversion (uint32_t adc) |
ADC Enable Automatic Injected Conversions. More... | |
void | adc_disable_automatic_injected_group_conversion (uint32_t adc) |
ADC Disable Automatic Injected Conversions. More... | |
void | adc_enable_analog_watchdog_on_all_channels (uint32_t adc) |
ADC Enable Analog Watchdog for All Regular and/or Injected Channels. More... | |
void | adc_enable_analog_watchdog_on_selected_channel (uint32_t adc, uint8_t channel) |
ADC Enable Analog Watchdog for a Selected Channel. More... | |
void | adc_enable_scan_mode (uint32_t adc) |
ADC Set Scan Mode. More... | |
void | adc_disable_scan_mode (uint32_t adc) |
ADC Disable Scan Mode. More... | |
void | adc_enable_eoc_interrupt_injected (uint32_t adc) |
ADC Enable Injected End-Of-Conversion Interrupt. More... | |
void | adc_disable_eoc_interrupt_injected (uint32_t adc) |
ADC Disable Injected End-Of-Conversion Interrupt. More... | |
void | adc_enable_awd_interrupt (uint32_t adc) |
ADC Enable Analog Watchdog Interrupt. More... | |
void | adc_disable_awd_interrupt (uint32_t adc) |
ADC Disable Analog Watchdog Interrupt. More... | |
void | adc_enable_eoc_interrupt (uint32_t adc) |
ADC Enable Regular End-Of-Conversion Interrupt. More... | |
void | adc_disable_eoc_interrupt (uint32_t adc) |
ADC Disable Regular End-Of-Conversion Interrupt. More... | |
void | adc_set_left_aligned (uint32_t adc) |
ADC Set the Data as Left Aligned. More... | |
void | adc_set_right_aligned (uint32_t adc) |
ADC Set the Data as Right Aligned. More... | |
bool | adc_eoc (uint32_t adc) |
ADC Read the End-of-Conversion Flag. More... | |
bool | adc_eoc_injected (uint32_t adc) |
ADC Read the End-of-Conversion Flag for Injected Conversion. More... | |
uint32_t | adc_read_regular (uint32_t adc) |
ADC Read from the Regular Conversion Result Register. More... | |
uint32_t | adc_read_injected (uint32_t adc, uint8_t reg) |
ADC Read from an Injected Conversion Result Register. More... | |
void | adc_set_continuous_conversion_mode (uint32_t adc) |
ADC Enable Continuous Conversion Mode. More... | |
void | adc_set_single_conversion_mode (uint32_t adc) |
ADC Enable Single Conversion Mode. More... | |
void | adc_set_watchdog_high_threshold (uint32_t adc, uint16_t threshold) |
ADC Set Analog Watchdog Upper Threshold. More... | |
void | adc_set_watchdog_low_threshold (uint32_t adc, uint16_t threshold) |
ADC Set Analog Watchdog Lower Threshold. More... | |
void | adc_set_regular_sequence (uint32_t adc, uint8_t length, uint8_t channel[]) |
ADC Set a Regular Channel Conversion Sequence. More... | |
void | adc_set_injected_sequence (uint32_t adc, uint8_t length, uint8_t channel[]) |
ADC Set an Injected Channel Conversion Sequence. More... | |
void | adc_set_injected_offset (uint32_t adc, uint8_t reg, uint32_t offset) |
ADC Set the Injected Channel Data Offset. More... | |
void | adc_start_conversion_regular (uint32_t adc) |
ADC Software Triggered Conversion on Regular Channels. More... | |
void | adc_start_conversion_injected (uint32_t adc) |
ADC Software Triggered Conversion on Injected Channels. More... | |
void | adc_enable_dma (uint32_t adc) |
ADC Enable DMA Transfers. More... | |
void | adc_disable_dma (uint32_t adc) |
ADC Disable DMA Transfers. More... | |
bool | adc_get_flag (uint32_t adc, uint32_t flag) |
Read a Status Flag. More... | |
void | adc_clear_flag (uint32_t adc, uint32_t flag) |
Clear a Status Flag. More... | |
void | adc_power_on (uint32_t adc) |
ADC Power On. More... | |
void | adc_set_clk_prescale (uint32_t prescale) |
ADC Set Clock Prescale The ADC clock can be prescaled. More... | |
void | adc_enable_external_trigger_regular (uint32_t adc, uint32_t trigger, uint32_t polarity) |
ADC Enable an External Trigger for Regular Channels. More... | |
void | adc_disable_external_trigger_regular (uint32_t adc) |
ADC Disable an External Trigger for Regular Channels. More... | |
void | adc_enable_external_trigger_injected (uint32_t adc, uint32_t trigger, uint32_t polarity) |
ADC Enable an External Trigger for Injected Channels. More... | |
void | adc_disable_external_trigger_injected (uint32_t adc) |
ADC Disable an External Trigger for Injected Channels. More... | |
void | adc_set_resolution (uint32_t adc, uint32_t resolution) |
ADC Set Resolution. More... | |
void | adc_enable_overrun_interrupt (uint32_t adc) |
ADC Enable the Overrun Interrupt. More... | |
void | adc_disable_overrun_interrupt (uint32_t adc) |
ADC Disable the Overrun Interrupt. More... | |
bool | adc_get_overrun_flag (uint32_t adc) |
ADC Read the Overrun Flag. More... | |
void | adc_clear_overrun_flag (uint32_t adc) |
ADC Clear Overrun Flags. More... | |
void | adc_eoc_after_each (uint32_t adc) |
ADC Enable an EOC for Each Conversion. More... | |
void | adc_eoc_after_group (uint32_t adc) |
ADC Disable the EOC for Each Conversion. More... | |
void | adc_set_dma_continue (uint32_t adc) |
ADC Set DMA to Continue. More... | |
void | adc_set_dma_terminate (uint32_t adc) |
ADC Set DMA to Terminate. More... | |
bool | adc_awd (uint32_t adc) |
ADC Read the Analog Watchdog Flag. More... | |
void | adc_enable_temperature_sensor (void) |
ADC Enable The Temperature Sensor. More... | |
void | adc_disable_temperature_sensor (void) |
ADC Disable The Temperature Sensor. More... | |
LGPL License Terms libopencm3 License
This library supports one style of the Analog to Digital Conversion System in the STM32 series of ARM Cortex Microcontrollers by ST Microelectronics.
The style of ADC Peripheral supported by this code is found in the F1, F2, F37x, F38x, F4, and L1 series devices (at the time of writing) but is quite different to the style found on the F0 and F30x and F31x. Devices can have up to three A/D converters each with their own set of registers. However all the A/D converters share a common clock. On most devices, this is prescaled from the APB2 clock by default by a minimum factor of 2 to a maximum of 8, though on the L1 this is always a divider from the HSI. (And therefore HSI must be enabled before attempting to enable the ADC)
Each A/D converter has up to ADC_MAX_CHANNELS channels:
The conversions can occur as a one-off conversion whereby the process stops once conversion is complete. The conversions can also be continuous wherein a new conversion starts immediately the previous conversion has ended.
Conversion can occur as a single channel conversion or a scan of a group of channels in either continuous or one-off mode. If more than one channel is converted in a scan group, DMA must be used to transfer the data as there is only one result register available. An interrupt can be set to occur at the end of conversion, which occurs after all channels have been scanned.
A discontinuous mode allows a subgroup of group of a channels to be converted in bursts of a given length.
Injected conversions allow a second group of channels to be converted separately from the regular group. An interrupt can be set to occur at the end of conversion, which occurs after all channels have been scanned.
Example 1: Simple single channel conversion polled. Enable the peripheral clock and ADC, reset ADC and set the prescaler divider. Set dual mode to independent (default). Enable triggering for a software trigger.
LGPL License Terms libopencm3 License
This library supports the A/D Converter Control System in the STM32 series of ARM Cortex Microcontrollers by ST Microelectronics.
Devices can have up to three A/D converters each with their own set of registers. However all the A/D converters share a common clock which is prescaled from the APB2 clock by default by a minimum factor of 2 to a maximum of 8. The ADC resolution can be set to 12, 10, 8 or 6 bits.
Each A/D converter has multiple channels, not all of which might be available externally. Internal channels can be used for the the temperature sensor, VBat monitoring, and the internal reference voltage VREFINT. Consult the Reference manual for the specifics of your part.
The conversions can occur as a one-off conversion whereby the process stops once conversion is complete. The conversions can also be continuous wherein a new conversion starts immediately the previous conversion has ended.
Conversion can occur as a single channel conversion or a scan of a group of channels in either continuous or one-off mode. If more than one channel is converted in a scan group, DMA must be used to transfer the data as there is only one result register available. An interrupt can be set to occur at the end of conversion, which occurs after all channels have been scanned.
A discontinuous mode allows a subgroup of group of a channels to be converted in bursts of a given length.
Injected conversions allow a second group of channels to be converted separately from the regular group. An interrupt can be set to occur at the end of conversion, which occurs after all channels have been scanned.
Example 1: Simple single channel conversion polled. Enable the peripheral clock and ADC, reset ADC and set the prescaler divider. Set the sample time to a minimum of 3 cycles. Set multiple mode to independent.
LGPL License Terms libopencm3 License
bool adc_awd | ( | uint32_t | adc | ) |
ADC Read the Analog Watchdog Flag.
This flag is set when the converted voltage crosses the high or low thresholds.
[in] | adc | Unsigned int32. ADC block register address base ADC register base addresses |
Definition at line 329 of file adc_common_v1_multi.c.
References ADC_SR, and ADC_SR_AWD.
void adc_clear_flag | ( | uint32_t | adc, |
uint32_t | flag | ||
) |
Clear a Status Flag.
[in] | adc | Unsigned int32. ADC register address base ADC register base addresses |
[in] | flag | Unsigned int32. Status register flag ADC Status Register Flags. |
Definition at line 771 of file adc_common_v1.c.
References ADC_SR.
void adc_clear_overrun_flag | ( | uint32_t | adc | ) |
ADC Clear Overrun Flags.
The overrun flag is cleared. Note that if an overrun occurs, DMA is terminated. The flag must be cleared and the DMA stream and ADC reinitialised to resume conversions (see the reference manual).
[in] | adc | Unsigned int32. ADC block register address base ADC register base addresses |
Definition at line 259 of file adc_common_v1_multi.c.
References ADC_SR.
void adc_disable_analog_watchdog_injected | ( | uint32_t | adc | ) |
ADC Disable Analog Watchdog for Injected Conversions.
[in] | adc | Unsigned int32. ADC block register address base ADC register base addresses |
Definition at line 161 of file adc_common_v1.c.
References ADC_CR1.
void adc_disable_analog_watchdog_regular | ( | uint32_t | adc | ) |
ADC Disable Analog Watchdog for Regular Conversions.
[in] | adc | Unsigned int32. ADC block register address base ADC register base addresses. |
Definition at line 135 of file adc_common_v1.c.
References ADC_CR1.
void adc_disable_automatic_injected_group_conversion | ( | uint32_t | adc | ) |
ADC Disable Automatic Injected Conversions.
[in] | adc | Unsigned int32. ADC block register address base ADC register base addresses |
Definition at line 251 of file adc_common_v1.c.
References ADC_CR1.
void adc_disable_awd_interrupt | ( | uint32_t | adc | ) |
ADC Disable Analog Watchdog Interrupt.
[in] | adc | Unsigned int32. ADC block register address base ADC register base addresses |
Definition at line 372 of file adc_common_v1.c.
References ADC_CR1.
void adc_disable_discontinuous_mode_injected | ( | uint32_t | adc | ) |
ADC Disable Discontinuous Mode for Injected Conversions.
[in] | adc | Unsigned int32. ADC block register address base ADC register base addresses |
Definition at line 223 of file adc_common_v1.c.
References ADC_CR1.
void adc_disable_discontinuous_mode_regular | ( | uint32_t | adc | ) |
ADC Disable Discontinuous Mode for Regular Conversions.
[in] | adc | Unsigned int32. ADC block register address base ADC register base addresses |
Definition at line 197 of file adc_common_v1.c.
References ADC_CR1.
void adc_disable_dma | ( | uint32_t | adc | ) |
ADC Disable DMA Transfers.
[in] | adc | Unsigned int32. ADC block register address base ADC register base addresses |
Definition at line 746 of file adc_common_v1.c.
References ADC_CR2.
void adc_disable_eoc_interrupt | ( | uint32_t | adc | ) |
ADC Disable Regular End-Of-Conversion Interrupt.
[in] | adc | Unsigned int32. ADC block register address base ADC register base addresses |
Definition at line 395 of file adc_common_v1.c.
References ADC_CR1.
void adc_disable_eoc_interrupt_injected | ( | uint32_t | adc | ) |
ADC Disable Injected End-Of-Conversion Interrupt.
[in] | adc | Unsigned int32. ADC block register address base ADC register base addresses |
Definition at line 350 of file adc_common_v1.c.
References ADC_CR1.
void adc_disable_external_trigger_injected | ( | uint32_t | adc | ) |
ADC Disable an External Trigger for Injected Channels.
[in] | adc | Unsigned int32. ADC block register address base ADC register base addresses |
Definition at line 182 of file adc_common_v1_multi.c.
References ADC_CR2.
Referenced by adc_enable_automatic_injected_group_conversion().
void adc_disable_external_trigger_regular | ( | uint32_t | adc | ) |
ADC Disable an External Trigger for Regular Channels.
[in] | adc | Unsigned int32. ADC block register address base ADC register base addresses |
Definition at line 149 of file adc_common_v1_multi.c.
References ADC_CR2.
void adc_disable_overrun_interrupt | ( | uint32_t | adc | ) |
ADC Disable the Overrun Interrupt.
[in] | adc | Unsigned int32. ADC block register address base ADC register base addresses |
Definition at line 227 of file adc_common_v1_multi.c.
References ADC_CR1.
void adc_disable_scan_mode | ( | uint32_t | adc | ) |
ADC Disable Scan Mode.
[in] | adc | Unsigned int32. ADC block register address base ADC register base addresses |
Definition at line 328 of file adc_common_v1.c.
References ADC_CR1.
void adc_disable_temperature_sensor | ( | void | ) |
ADC Disable The Temperature Sensor.
Disabling this will reduce power consumption from the sensor and the reference voltage measurements.
Definition at line 355 of file adc_common_v1_multi.c.
References ADC_CCR.
void adc_disable_vbat_sensor | ( | void | ) |
Disable The VBat Sensor.
Disabling this will reduce power consumption from the battery voltage measurement.
Definition at line 119 of file adc_common_f47.c.
References ADC_CCR.
void adc_enable_analog_watchdog_injected | ( | uint32_t | adc | ) |
ADC Enable Analog Watchdog for Injected Conversions.
The analog watchdog allows the monitoring of an analog signal between two threshold levels. The thresholds must be preset. Comparison is done before data alignment takes place, so the thresholds are left-aligned.
[in] | adc | Unsigned int32. ADC block register address base ADC register base addresses |
Definition at line 150 of file adc_common_v1.c.
References ADC_CR1, and ADC_CR1_JAWDEN.
void adc_enable_analog_watchdog_on_all_channels | ( | uint32_t | adc | ) |
ADC Enable Analog Watchdog for All Regular and/or Injected Channels.
The analog watchdog allows the monitoring of an analog signal between two threshold levels. The thresholds must be preset. Comparison is done before data alignment takes place, so the thresholds are left-aligned.
[in] | adc | Unsigned int32. ADC block register address base ADC register base addresses |
Definition at line 272 of file adc_common_v1.c.
References ADC_CR1.
void adc_enable_analog_watchdog_on_selected_channel | ( | uint32_t | adc, |
uint8_t | channel | ||
) |
ADC Enable Analog Watchdog for a Selected Channel.
The analog watchdog allows the monitoring of an analog signal between two threshold levels. The thresholds must be preset. Comparison is done before data alignment takes place, so the thresholds are left-aligned.
[in] | adc | Unsigned int32. ADC block register address base ADC register base addresses |
[in] | channel | Unsigned int8. ADC channel number ADC watchdog channel |
Definition at line 294 of file adc_common_v1.c.
References ADC_CR1, ADC_CR1_AWDCH_MAX, and ADC_CR1_AWDSGL.
void adc_enable_analog_watchdog_regular | ( | uint32_t | adc | ) |
ADC Enable Analog Watchdog for Regular Conversions.
The analog watchdog allows the monitoring of an analog signal between two threshold levels. The thresholds must be preset.
[in] | adc | Unsigned int32. ADC block register address base ADC register base addresses. |
Definition at line 123 of file adc_common_v1.c.
References ADC_CR1, and ADC_CR1_AWDEN.
void adc_enable_automatic_injected_group_conversion | ( | uint32_t | adc | ) |
ADC Enable Automatic Injected Conversions.
The ADC converts a defined injected group of channels immediately after the regular channels have been converted. The external trigger on the injected channels is disabled as required.
[in] | adc | Unsigned int32. ADC block register address base ADC register base addresses |
Definition at line 239 of file adc_common_v1.c.
References ADC_CR1, ADC_CR1_JAUTO, and adc_disable_external_trigger_injected().
void adc_enable_awd_interrupt | ( | uint32_t | adc | ) |
ADC Enable Analog Watchdog Interrupt.
[in] | adc | Unsigned int32. ADC block register address base ADC register base addresses |
Definition at line 361 of file adc_common_v1.c.
References ADC_CR1, and ADC_CR1_AWDIE.
void adc_enable_discontinuous_mode_injected | ( | uint32_t | adc | ) |
ADC Enable Discontinuous Mode for Injected Conversions.
In this mode the ADC converts sequentially one channel of the defined group of injected channels, cycling back to the first channel in the group once the entire group has been converted.
[in] | adc | Unsigned int32. ADC block register address base ADC register base addresses |
Definition at line 212 of file adc_common_v1.c.
References ADC_CR1, and ADC_CR1_JDISCEN.
void adc_enable_discontinuous_mode_regular | ( | uint32_t | adc, |
uint8_t | length | ||
) |
ADC Enable Discontinuous Mode for Regular Conversions.
In this mode the ADC converts, on each trigger, a subgroup of up to 8 of the defined regular channel group. The subgroup is defined by the number of consecutive channels to be converted. After a subgroup has been converted the next trigger will start conversion of the immediately following subgroup of the same length or until the whole group has all been converted. When the the whole group has been converted, the next trigger will restart conversion of the subgroup at the beginning of the whole group.
[in] | adc | Unsigned int32. ADC block register address base ADC register base addresses |
[in] | length | Unsigned int8. Number of channels in the group ADC Number of channels in discontinuous mode. |
Definition at line 182 of file adc_common_v1.c.
References ADC_CR1, ADC_CR1_DISCEN, and ADC_CR1_DISCNUM_SHIFT.
void adc_enable_dma | ( | uint32_t | adc | ) |
ADC Enable DMA Transfers.
[in] | adc | Unsigned int32. ADC block register address base ADC register base addresses |
Definition at line 735 of file adc_common_v1.c.
References ADC_CR2, and ADC_CR2_DMA.
void adc_enable_eoc_interrupt | ( | uint32_t | adc | ) |
ADC Enable Regular End-Of-Conversion Interrupt.
[in] | adc | Unsigned int32. ADC block register address base ADC register base addresses |
Definition at line 384 of file adc_common_v1.c.
References ADC_CR1, and ADC_CR1_EOCIE.
void adc_enable_eoc_interrupt_injected | ( | uint32_t | adc | ) |
ADC Enable Injected End-Of-Conversion Interrupt.
[in] | adc | Unsigned int32. ADC block register address base ADC register base addresses |
Definition at line 339 of file adc_common_v1.c.
References ADC_CR1, and ADC_CR1_JEOCIE.
void adc_enable_external_trigger_injected | ( | uint32_t | adc, |
uint32_t | trigger, | ||
uint32_t | polarity | ||
) |
ADC Enable an External Trigger for Injected Channels.
This enables an external trigger for set of defined injected channels, and sets the polarity of the trigger event: rising or falling edge or both.
[in] | adc | Unsigned int32. ADC block register address base ADC register base addresses |
[in] | trigger | Unsigned int8. Trigger identifier ADC Trigger Identifier for Injected group |
[in] | polarity | Unsigned int32. Trigger polarity ADC Injected Trigger Polarity |
Definition at line 166 of file adc_common_v1_multi.c.
References ADC_CR2, ADC_CR2_JEXTEN_MASK, and ADC_CR2_JEXTSEL_MASK.
void adc_enable_external_trigger_regular | ( | uint32_t | adc, |
uint32_t | trigger, | ||
uint32_t | polarity | ||
) |
ADC Enable an External Trigger for Regular Channels.
This enables an external trigger for set of defined regular channels, and sets the polarity of the trigger event: rising or falling edge or both. Note that if the trigger polarity is zero, triggering is disabled.
[in] | adc | Unsigned int32. ADC block register address base ADC register base addresses |
[in] | trigger | Unsigned int32. Trigger identifier ADC Trigger Identifier for Regular group |
[in] | polarity | Unsigned int32. Trigger polarity ADC Trigger Polarity |
Definition at line 133 of file adc_common_v1_multi.c.
References ADC_CR2, ADC_CR2_EXTEN_MASK, and ADC_CR2_EXTSEL_MASK.
void adc_enable_overrun_interrupt | ( | uint32_t | adc | ) |
ADC Enable the Overrun Interrupt.
The overrun interrupt is generated when data is not read from a result register before the next conversion is written. If DMA is enabled, all transfers are terminated and any conversion sequence is aborted.
[in] | adc | Unsigned int32. ADC block register address base ADC register base addresses |
Definition at line 216 of file adc_common_v1_multi.c.
References ADC_CR1, and ADC_CR1_OVRIE.
void adc_enable_scan_mode | ( | uint32_t | adc | ) |
ADC Set Scan Mode.
In this mode a conversion consists of a scan of the predefined set of channels, regular and injected, each channel conversion immediately following the previous one. It can use single, continuous or discontinuous mode.
[in] | adc | Unsigned int32. ADC block register address base ADC register base addresses |
Definition at line 317 of file adc_common_v1.c.
References ADC_CR1, and ADC_CR1_SCAN.
void adc_enable_temperature_sensor | ( | void | ) |
ADC Enable The Temperature Sensor.
This enables both the sensor and the reference voltage measurements on ADC1. On STM32F42x and STM32F43x, the temperature sensor is connected to ADC1 channel 18, the same as VBat. If both are enabled, only the VBat conversion is performed.
Definition at line 343 of file adc_common_v1_multi.c.
References ADC_CCR, and ADC_CCR_TSVREFE.
void adc_enable_vbat_sensor | ( | void | ) |
Enable The VBat Sensor.
This enables the battery voltage measurements on ADC1 channel 18. On STM32F42x and STM32F43x, this must be disabled when the temperature sensor is enabled. If both are enabled, only the VBat conversion is performed.
Definition at line 110 of file adc_common_f47.c.
References ADC_CCR, and ADC_CCR_VBATE.
bool adc_eoc | ( | uint32_t | adc | ) |
ADC Read the End-of-Conversion Flag.
This flag is set after all channels of a regular or injected group have been converted.
[in] | adc | Unsigned int32. ADC block register address base ADC register base addresses |
Definition at line 435 of file adc_common_v1.c.
References ADC_SR, and ADC_SR_EOC.
void adc_eoc_after_each | ( | uint32_t | adc | ) |
ADC Enable an EOC for Each Conversion.
The EOC is set after each conversion in a sequence rather than at the end of the sequence. Overrun detection is enabled only if DMA is enabled.
[in] | adc | Unsigned int32. ADC block register address base ADC register base addresses |
Definition at line 274 of file adc_common_v1_multi.c.
References ADC_CR2, and ADC_CR2_EOCS.
void adc_eoc_after_group | ( | uint32_t | adc | ) |
ADC Disable the EOC for Each Conversion.
The EOC is set at the end of each sequence rather than after each conversion in the sequence. Overrun detection is enabled always.
[in] | adc | Unsigned int32. ADC block register address base ADC register base addresses |
Definition at line 288 of file adc_common_v1_multi.c.
References ADC_CR2.
bool adc_eoc_injected | ( | uint32_t | adc | ) |
ADC Read the End-of-Conversion Flag for Injected Conversion.
This flag is set after all channels of an injected group have been converted.
[in] | adc | Unsigned int32. ADC block register address base ADC register base addresses |
Definition at line 449 of file adc_common_v1.c.
References ADC_SR, and ADC_SR_JEOC.
bool adc_get_flag | ( | uint32_t | adc, |
uint32_t | flag | ||
) |
Read a Status Flag.
[in] | adc | Unsigned int32. ADC register address base ADC register base addresses |
[in] | flag | Unsigned int32. Status register flag ADC Status Register Flags. |
Definition at line 759 of file adc_common_v1.c.
References ADC_SR.
bool adc_get_overrun_flag | ( | uint32_t | adc | ) |
ADC Read the Overrun Flag.
The overrun flag is set when data is not read from a result register before the next conversion is written. If DMA is enabled, all transfers are terminated and any conversion sequence is aborted.
[in] | adc | Unsigned int32. ADC block register address base ADC register base addresses |
Definition at line 243 of file adc_common_v1_multi.c.
References ADC_SR, and ADC_SR_OVR.
void adc_power_off | ( | uint32_t | adc | ) |
ADC Off.
Turn off the ADC to reduce power consumption to a few microamps.
[in] | adc | Unsigned int32. ADC block register address base ADC register base addresses. |
Definition at line 108 of file adc_common_v1.c.
References ADC_CR2.
void adc_power_on | ( | uint32_t | adc | ) |
ADC Power On.
If the ADC is in power-down mode then it is powered up. The application needs to wait a time of about 3 microseconds for stabilization before using the ADC. If the ADC is already on this function call will have no effect. NOTE Common with L1 and F2
[in] | adc | Unsigned int32. ADC block register address base ADC register base addresses |
Definition at line 102 of file adc_common_v1_multi.c.
References ADC_CR2, and ADC_CR2_ADON.
uint32_t adc_read_injected | ( | uint32_t | adc, |
uint8_t | reg | ||
) |
ADC Read from an Injected Conversion Result Register.
The result read back from the selected injected result register (one of four) is 12 bits, right or left aligned within the first 16 bits. The result can have a negative value if the injected channel offset has been set
[in] | adc | Unsigned int32. ADC block register address base ADC register base addresses |
[in] | reg | Unsigned int8. Register number (1 ... 4). |
Definition at line 483 of file adc_common_v1.c.
uint32_t adc_read_regular | ( | uint32_t | adc | ) |
ADC Read from the Regular Conversion Result Register.
The result read back is 12 bits, right or left aligned within the first 16 bits. For ADC1 only, the higher 16 bits will hold the result from ADC2 if an appropriate dual mode has been set
[in] | adc | Unsigned int32. ADC block register address base ADC register base addresses |
Definition at line 465 of file adc_common_v1.c.
References ADC_DR.
void adc_set_clk_prescale | ( | uint32_t | prescale | ) |
ADC Set Clock Prescale The ADC clock can be prescaled.
The Clock sources and scaler values are part specific.
[in] | prescale | Prescale value for ADC Clock ADC Prescale |
Definition at line 114 of file adc_common_v1_multi.c.
References ADC_CCR.
void adc_set_continuous_conversion_mode | ( | uint32_t | adc | ) |
ADC Enable Continuous Conversion Mode.
In this mode the ADC starts a new conversion of a single channel or a channel group immediately following completion of the previous channel group conversion.
[in] | adc | Unsigned int32. ADC block register address base ADC register base addresses |
Definition at line 507 of file adc_common_v1.c.
References ADC_CR2, and ADC_CR2_CONT.
void adc_set_dma_continue | ( | uint32_t | adc | ) |
ADC Set DMA to Continue.
This must be set to allow DMA to continue to operate after the last conversion in the DMA sequence. This allows DMA to be used in continuous circular mode.
[in] | adc | Unsigned int32. ADC block register address base ADC register base addresses |
Definition at line 302 of file adc_common_v1_multi.c.
References ADC_CR2, and ADC_CR2_DDS.
void adc_set_dma_terminate | ( | uint32_t | adc | ) |
ADC Set DMA to Terminate.
This must be set to allow DMA to terminate after the last conversion in the DMA sequence. This can avoid overrun errors.
[in] | adc | Unsigned int32. ADC block register address base ADC register base addresses |
Definition at line 316 of file adc_common_v1_multi.c.
References ADC_CR2.
void adc_set_injected_offset | ( | uint32_t | adc, |
uint8_t | reg, | ||
uint32_t | offset | ||
) |
ADC Set the Injected Channel Data Offset.
This value is subtracted from the injected channel results after conversion is complete, and can result in negative results. A separate value can be specified for each injected data register.
[in] | adc | Unsigned int32. ADC block register address base ADC register base addresses |
[in] | reg | Unsigned int8. Register number (1 ... 4). |
[in] | offset | Unsigned int32. |
Definition at line 662 of file adc_common_v1.c.
void adc_set_injected_sequence | ( | uint32_t | adc, |
uint8_t | length, | ||
uint8_t | channel[] | ||
) |
ADC Set an Injected Channel Conversion Sequence.
Defines a sequence of channels to be converted as an injected group with a length from 1 to 4 channels. If this is called during conversion, the current conversion is reset and conversion begins again with the newly defined group.
[in] | adc | Unsigned int32. ADC block register address base ADC register base addresses |
[in] | length | Unsigned int8. Number of channels in the group. |
[in] | channel | Unsigned int8[]. Set of channels in sequence, integers 0..18 |
Definition at line 630 of file adc_common_v1.c.
References ADC_JSQR, ADC_JSQR_JL_VAL, and ADC_JSQR_JSQ_VAL.
void adc_set_left_aligned | ( | uint32_t | adc | ) |
ADC Set the Data as Left Aligned.
[in] | adc | Unsigned int32. ADC block register address base ADC register base addresses. |
Definition at line 408 of file adc_common_v1.c.
References ADC_CR2, and ADC_CR2_ALIGN.
void adc_set_multi_mode | ( | uint32_t | mode | ) |
ADC Set Dual/Triple Mode.
The multiple mode uses ADC1 as master, ADC2 and optionally ADC3 in a slave arrangement. This setting is applied to ADC1 only.
The various modes possible are described in the reference manual.
[in] | mode | Unsigned int32. Multiple mode selection from ADC Multi mode selection |
Definition at line 99 of file adc_common_f47.c.
References ADC_CCR.
void adc_set_regular_sequence | ( | uint32_t | adc, |
uint8_t | length, | ||
uint8_t | channel[] | ||
) |
ADC Set a Regular Channel Conversion Sequence.
Define a sequence of channels to be converted as a regular group with a length from 1 to ADC_REGULAR_SEQUENCE_MAX channels. If this is called during conversion, the current conversion is reset and conversion begins again with the newly defined group.
[in] | adc | Unsigned int32. ADC block base address ADC register base addresses. |
[in] | length | Unsigned int8. Number of channels in the group. |
[in] | channel | Unsigned int8[]. Set of channels in sequence, integers 0..31. |
Definition at line 574 of file adc_common_v1.c.
References ADC_SQR1, ADC_SQR1_L_LSB, ADC_SQR2, ADC_SQR3, and ADC_SQR_MAX_CHANNELS_REGULAR.
void adc_set_resolution | ( | uint32_t | adc, |
uint32_t | resolution | ||
) |
ADC Set Resolution.
ADC Resolution can be reduced from 12 bits to 10, 8 or 6 bits for a corresponding reduction in conversion time (resolution + 3 ADC clock cycles).
[in] | adc | Unsigned int32. ADC block register address base ADC register base addresses |
[in] | resolution | Unsigned int32. Resolution value ADC Resolution. |
Definition at line 197 of file adc_common_v1_multi.c.
References ADC_CR1.
void adc_set_right_aligned | ( | uint32_t | adc | ) |
ADC Set the Data as Right Aligned.
[in] | adc | Unsigned int32. ADC block register address base ADC register base addresses. |
Definition at line 420 of file adc_common_v1.c.
References ADC_CR2.
void adc_set_sample_time | ( | uint32_t | adc, |
uint8_t | channel, | ||
uint8_t | time | ||
) |
ADC Set the Sample Time for a Single Channel.
The sampling time can be selected in ADC clock cycles from 1.5 to 239.5.
[in] | adc | Unsigned int32. ADC block register address base ADC register base addresses |
[in] | channel | Unsigned int8. ADC Channel integer 0..18 or from ADC Channel Numbers |
[in] | time | Unsigned int8. Sampling time selection from ADC Sample Time Selection for All Channels NOTE Common with f1, f2 and f37x |
Definition at line 45 of file adc_common_f47.c.
void adc_set_sample_time_on_all_channels | ( | uint32_t | adc, |
uint8_t | time | ||
) |
ADC Set the Sample Time for All Channels.
The sampling time can be selected in ADC clock cycles from 1.5 to 239.5, same for all channels.
[in] | adc | Unsigned int32. ADC block register address base ADC register base addresses |
[in] | time | Unsigned int8. Sampling time selection from ADC Sample Time Selection for All Channels NOTE Common with f1, f2 and f37x |
Definition at line 72 of file adc_common_f47.c.
void adc_set_single_conversion_mode | ( | uint32_t | adc | ) |
ADC Enable Single Conversion Mode.
In this mode the ADC performs a conversion of one channel or a channel group and stops.
[in] | adc | Unsigned int32. ADC block register address base ADC register base addresses. |
Definition at line 523 of file adc_common_v1.c.
References ADC_CR2.
void adc_set_watchdog_high_threshold | ( | uint32_t | adc, |
uint16_t | threshold | ||
) |
ADC Set Analog Watchdog Upper Threshold.
[in] | adc | Unsigned int32. ADC block register address base ADC register base addresses |
[in] | threshold | Upper threshold value, 12bit right aligned. |
Definition at line 535 of file adc_common_v1.c.
References ADC_HT_MSK, and ADC_HTR.
void adc_set_watchdog_low_threshold | ( | uint32_t | adc, |
uint16_t | threshold | ||
) |
ADC Set Analog Watchdog Lower Threshold.
[in] | adc | Unsigned int32. ADC block register address base ADC register base addresses |
[in] | threshold | Lower threshold value, 12bit right aligned. |
Definition at line 551 of file adc_common_v1.c.
References ADC_LT_MSK, and ADC_LTR.
void adc_start_conversion_injected | ( | uint32_t | adc | ) |
ADC Software Triggered Conversion on Injected Channels.
This starts conversion on a set of defined injected channels if the ADC trigger is set to be a software trigger. It is cleared by hardware once conversion starts.
Special F1 Note this is a software trigger and requires triggering to be enabled and the trigger source to be set appropriately otherwise conversion will not start. This is not the same as the ADC start conversion operation.
[in] | adc | Unsigned int32. ADC block register address base ADC register base addresses. |
Definition at line 719 of file adc_common_v1.c.
References ADC_CR2, and ADC_CR2_JSWSTART.
void adc_start_conversion_regular | ( | uint32_t | adc | ) |
ADC Software Triggered Conversion on Regular Channels.
This starts conversion on a set of defined regular channels if the ADC trigger is set to be a software trigger. It is cleared by hardware once conversion starts.
Special F1 Note this is a software trigger and requires triggering to be enabled and the trigger source to be set appropriately otherwise conversion will not start. This is not the same as the ADC start conversion operation.
[in] | adc | Unsigned int32. ADC block register address base ADC register base addresses. |
Definition at line 695 of file adc_common_v1.c.
References ADC_CR2, and ADC_CR2_SWSTART.