libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
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BDCR Backup Domain Control Register
Collaboration diagram for BDCR Backup Domain Control Register:

Modules

 RTCSEL RTC Clock source selection
 
 LSEDRV LSE Oscillator drive capacity
 

Macros

#define RCC_BDCR_LSCOSEL   (1 << 25)
 
#define RCC_BDCR_LSCOEN   (1 << 24)
 
#define RCC_BDCR_BDRST   (1 << 16)
 
#define RCC_BDCR_RTCEN   (1 << 15)
 
#define RCC_BDCR_RTCSEL_SHIFT   8
 
#define RCC_BDCR_RTCSEL_MASK   0x3
 
#define RCC_BDCR_LSEDRV_SHIFT   3
 
#define RCC_BDCR_LSEDRV_MASK   0x3
 
#define RCC_BDCR_LSEBYP   (1 << 2)
 
#define RCC_BDCR_LSERDY   (1 << 1)
 
#define RCC_BDCR_LSEON   (1 << 0)
 

Detailed Description

Macro Definition Documentation

◆ RCC_BDCR_BDRST

#define RCC_BDCR_BDRST   (1 << 16)

Definition at line 587 of file g0/rcc.h.

◆ RCC_BDCR_LSCOEN

#define RCC_BDCR_LSCOEN   (1 << 24)

Definition at line 586 of file g0/rcc.h.

◆ RCC_BDCR_LSCOSEL

#define RCC_BDCR_LSCOSEL   (1 << 25)

Definition at line 585 of file g0/rcc.h.

◆ RCC_BDCR_LSEBYP

#define RCC_BDCR_LSEBYP   (1 << 2)

Definition at line 610 of file g0/rcc.h.

◆ RCC_BDCR_LSEDRV_MASK

#define RCC_BDCR_LSEDRV_MASK   0x3

Definition at line 601 of file g0/rcc.h.

◆ RCC_BDCR_LSEDRV_SHIFT

#define RCC_BDCR_LSEDRV_SHIFT   3

Definition at line 600 of file g0/rcc.h.

◆ RCC_BDCR_LSEON

#define RCC_BDCR_LSEON   (1 << 0)

Definition at line 612 of file g0/rcc.h.

◆ RCC_BDCR_LSERDY

#define RCC_BDCR_LSERDY   (1 << 1)

Definition at line 611 of file g0/rcc.h.

◆ RCC_BDCR_RTCEN

#define RCC_BDCR_RTCEN   (1 << 15)

Definition at line 588 of file g0/rcc.h.

◆ RCC_BDCR_RTCSEL_MASK

#define RCC_BDCR_RTCSEL_MASK   0x3

Definition at line 591 of file g0/rcc.h.

◆ RCC_BDCR_RTCSEL_SHIFT

#define RCC_BDCR_RTCSEL_SHIFT   8

Definition at line 590 of file g0/rcc.h.