libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
f0/comparator.h
Go to the documentation of this file.
1/** @defgroup comp_defines COMP Defines
2 *
3 * @brief <b>libopencm3 Defined Constants and Types for the STM32F0xx
4 * Comparator module</b>
5 *
6 * @ingroup STM32F0xx_defines
7 *
8 * @version 1.0.0
9 *
10 * @date 29 Jun 2013
11 *
12 *LGPL License Terms @ref lgpl_license
13 */
14/*
15 * This file is part of the libopencm3 project.
16 *
17 * Copyright (C) 2013 Frantisek Burian <BuFran@seznam.cz>
18 *
19 * This library is free software: you can redistribute it and/or modify
20 * it under the terms of the GNU Lesser General Public License as published by
21 * the Free Software Foundation, either version 3 of the License, or
22 * (at your option) any later version.
23 *
24 * This library is distributed in the hope that it will be useful,
25 * but WITHOUT ANY WARRANTY; without even the implied warranty of
26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 * GNU Lesser General Public License for more details.
28 *
29 * You should have received a copy of the GNU Lesser General Public License
30 * along with this library. If not, see <http://www.gnu.org/licenses/>.
31 */
32
33#ifndef LIBOPENCM3_COMP_H
34#define LIBOPENCM3_COMP_H
35/**@{*/
36
37/*****************************************************************************/
38/* Module definitions */
39/*****************************************************************************/
40
41#define COMP1 0
42#define COMP2 1
43
44/*****************************************************************************/
45/* Register definitions */
46/*****************************************************************************/
47
48#define COMP_CSR(i) MMIO16(SYSCFG_COMP_BASE + 0x1c + (i)*2)
49#define COMP_CSR1 COMP_CSR(COMP1)
50#define COMP_CSR2 COMP_CSR(COMP2)
51
52/*****************************************************************************/
53/* Register values */
54/*****************************************************************************/
55
56/* COMP_CSR Values ----------------------------------------------------------*/
57
58#define COMP_CSR_LOCK (1 << 15)
59#define COMP_CSR_OUT (1 << 14)
60
61#define COMP_CSR_HYST_SHIFT 12
62#define COMP_CSR_HYST (3 << COMP_CSR_HYST_SHIFT)
63#define COMP_CSR_HYST_NO (0 << COMP_CSR_HYST_SHIFT)
64#define COMP_CSR_HYST_LOW (1 << COMP_CSR_HYST_SHIFT)
65#define COMP_CSR_HYST_MED (2 << COMP_CSR_HYST_SHIFT)
66#define COMP_CSR_HYST_HIGH (3 << COMP_CSR_HYST_SHIFT)
67
68#define COMP_CSR_POL (1 << 11)
69
70#define COMP_CSR_OUTSEL_SHIFT 8
71#define COMP_CSR_OUTSEL (7 << COMP_CSR_OUTSEL_SHIFT)
72#define COMP_CSR_OUTSEL_NONE (0 << COMP_CSR_OUTSEL_SHIFT)
73#define COMP_CSR_OUTSEL_TIM1_BRK (1 << COMP_CSR_OUTSEL_SHIFT)
74#define COMP_CSR_OUTSEL_TIM1_IC1 (2 << COMP_CSR_OUTSEL_SHIFT)
75#define COMP_CSR_OUTSEL_TIM1_OCRCLR (3 << COMP_CSR_OUTSEL_SHIFT)
76#define COMP_CSR_OUTSEL_TIM2_IC4 (4 << COMP_CSR_OUTSEL_SHIFT)
77#define COMP_CSR_OUTSEL_TIM2_OCRCLR (5 << COMP_CSR_OUTSEL_SHIFT)
78#define COMP_CSR_OUTSEL_TIM3_IC1 (6 << COMP_CSR_OUTSEL_SHIFT)
79#define COMP_CSR_OUTSEL_TIM3_OCRCLR (7 << COMP_CSR_OUTSEL_SHIFT)
80
81#define COMP_CSR_WINDWEN (1 << 23)
82
83#define COMP_CSR_INSEL_SHIFT 4
84#define COMP_CSR_INSEL (7 << COMP_CSR_INSEL_SHIFT)
85#define COMP_CSR_INSEL_1_4_VREFINT (0 << COMP_CSR_INSEL_SHIFT)
86#define COMP_CSR_INSEL_2_4_VREFINT (1 << COMP_CSR_INSEL_SHIFT)
87#define COMP_CSR_INSEL_3_4_VREFINT (2 << COMP_CSR_INSEL_SHIFT)
88#define COMP_CSR_INSEL_4_4_VREFINT (3 << COMP_CSR_INSEL_SHIFT)
89#define COMP_CSR_INSEL_VREFINT (3 << COMP_CSR_INSEL_SHIFT)
90#define COMP_CSR_INSEL_INM4 (4 << COMP_CSR_INSEL_SHIFT)
91#define COMP_CSR_INSEL_INM5 (5 << COMP_CSR_INSEL_SHIFT)
92#define COMP_CSR_INSEL_INM6 (6 << COMP_CSR_INSEL_SHIFT)
93
94#define COMP_CSR_SPEED_SHIFT 2
95#define COMP_CSR_SPEED (3 << COMP_CSR_SPEED_SHIFT)
96#define COMP_CSR_SPEED_HIGH (0 << COMP_CSR_SPEED_SHIFT)
97#define COMP_CSR_SPEED_MED (1 << COMP_CSR_SPEED_SHIFT)
98#define COMP_CSR_SPEED_LOW (2 << COMP_CSR_SPEED_SHIFT)
99#define COMP_CSR_SPEED_VERYLOW (3 << COMP_CSR_SPEED_SHIFT)
100
101#define COMP_CSR_SW1 (1 << 1)
102#define COMP_CSR_EN (1 << 0)
103
104/*****************************************************************************/
105/* API definitions */
106/*****************************************************************************/
107
108/*****************************************************************************/
109/* API Functions */
110/*****************************************************************************/
111
113
114void comp_enable(uint8_t id);
115void comp_disable(uint8_t id);
116void comp_select_input(uint8_t id, uint32_t input);
117void comp_select_output(uint8_t id, uint32_t output);
118void comp_select_hyst(uint8_t id, uint32_t hyst);
119void comp_select_speed(uint8_t id, uint32_t speed);
120
122/**@}*/
123
124#endif
#define END_DECLS
Definition: common.h:34
#define BEGIN_DECLS
Definition: common.h:33
void comp_select_speed(uint8_t id, uint32_t speed)
Definition: comparator.c:58
void comp_enable(uint8_t id)
Definition: comparator.c:33
void comp_select_hyst(uint8_t id, uint32_t hyst)
Definition: comparator.c:53
void comp_select_input(uint8_t id, uint32_t input)
Definition: comparator.c:43
void comp_disable(uint8_t id)
Definition: comparator.c:38
void comp_select_output(uint8_t id, uint32_t output)
Definition: comparator.c:48