libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
fpb.h
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1/*
2 * This file is part of the libopencm3 project.
3 *
4 * Copyright (C) 2011 Gareth McMullin <gareth@blacksphere.co.nz>
5 *
6 * This library is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU Lesser General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public License
17 * along with this library. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#ifndef LIBOPENCM3_CM3_FPB_H
21#define LIBOPENCM3_CM3_FPB_H
22
23/**
24 * @defgroup cm_fpb Cortex-M Flash Patch and Breakpoint (FPB) unit
25 * @ingroup CM3_defines
26 * @{
27 */
28
29/* Those defined only on ARMv7 and above */
30#if !defined(__ARM_ARCH_7M__) && !defined(__ARM_ARCH_7EM__)
31#error "Flash Patch and Breakpoint not available in CM0"
32#endif
33
34/* Note: We always use "FPB" as abbreviation, docs sometimes use only "FP". */
35
36/* --- FPB registers ------------------------------------------------------- */
37
38/* Flash Patch Control (FPB_CTRL) */
39#define FPB_CTRL MMIO32(FPB_BASE + 0)
40
41/* Flash Patch Remap (FPB_REMAP) */
42#define FPB_REMAP MMIO32(FPB_BASE + 4)
43
44/* Flash Patch Comparator (FPB_COMPx) */
45#define FPB_COMP (&MMIO32(FPB_BASE + 8))
46
47/* CoreSight Lock Status Register for this peripheral */
48#define FPB_LSR MMIO32(FPB_BASE + CORESIGHT_LSR_OFFSET)
49/* CoreSight Lock Access Register for this peripheral */
50#define FPB_LAR MMIO32(FPB_BASE + CORESIGHT_LAR_OFFSET)
51
52
53/* TODO: PID, CID */
54
55/* --- FPB_CTRL values ----------------------------------------------------- */
56
57/* Bits [31:15]: Reserved, read as zero, writes ignored */
58
59#define FPB_CTRL_NUM_CODE2_MASK (0x7 << 12)
60
61#define FPB_CTRL_NUM_LIT_MASK (0xf << 8)
62
63#define FPB_CTRL_NUM_CODE1_MASK (0xf << 4)
64
65/* Bits [3:2]: Reserved */
66
67#define FPB_CTRL_KEY (1 << 1)
68
69#define FPB_CTRL_ENABLE (1 << 0)
70
71/* --- FPB_REMAP values ---------------------------------------------------- */
72
73/* TODO */
74
75/* --- FPB_COMPx values ---------------------------------------------------- */
76
77#define FPB_COMP_REPLACE_REMAP (0x0 << 30)
78#define FPB_COMP_REPLACE_BREAK_LOWER (0x1 << 30)
79#define FPB_COMP_REPLACE_BREAK_UPPER (0x2 << 30)
80#define FPB_COMP_REPLACE_BREAK_BOTH (0x3 << 30)
81#define FPB_COMP_REPLACE_MASK (0x3 << 30)
82
83/* Bit 29: Reserved */
84
85/* TODO */
86
87/* Bit 1: Reserved */
88
89#define FPB_COMP_ENABLE (1 << 0)
90
91/**@}*/
92
93#endif