libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
sam/3n/memorymap.h
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1/*
2 * This file is part of the libopencm3 project.
3 *
4 * Copyright (C) 2012 Gareth McMullin <gareth@blacksphere.co.nz>
5 *
6 * This library is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU Lesser General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public License
17 * along with this library. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#ifndef SAM3N_MEMORYMAP_H
21#define SAM3N_MEMORYMAP_H
22
24
25/* --- SAM3N peripheral space -------------------------------------------- */
26
27#define SPI_BASE (0x40008000U)
28#define TC0_BASE (0x40010000U)
29#define TC1_BASE (0x40010040U)
30#define TC2_BASE (0x40010080U)
31#define TC3_BASE (0x40014000U)
32#define TC4_BASE (0x40014040U)
33#define TC5_BASE (0x40014080U)
34#define TWI0_BASE (0x40018000U)
35#define TWI1_BASE (0x4001C000U)
36#define PWM_BASE (0x40020000U)
37#define USART0_BASE (0x40024000U)
38#define USART1_BASE (0x40028000U)
39#define ADC_BASE (0x40038000U)
40#define DACC_BASE (0x4003C000U)
41
42/* --- SAM3N system controller space ------------------------------------- */
43#define SMC_BASE (0x400E0000U)
44#define MATRIX_BASE (0x400E0200U)
45#define PMC_BASE (0x400E0400U)
46#define UART0_BASE (0x400E0600U)
47#define CHIPID_BASE (0x400E0740U)
48#define UART1_BASE (0x400E0800U)
49#define EEFC_BASE (0x400E0A00U)
50#define PIOA_BASE (0x400E0E00U)
51#define PIOB_BASE (0x400E1000U)
52#define PIOC_BASE (0x400E1200U)
53#define RSTC_BASE (0x400E1400U)
54#define SUPC_BASE (0x400E1410U)
55#define RTT_BASE (0x400E1430U)
56#define WDT_BASE (0x400E1450U)
57#define RTC_BASE (0x400E1460U)
58#define GPBR_BASE (0x400E1490U)
59
60#endif