ADC Set operation mode.
There are some operation modes, common for entire stm32 branch. In the text the braces are describing result to single trigger event. The trigger event is described by character T in the description. The ADC is configured to convert list of inputs [0, 1, 2, 3]. In Grouped modes, there is used group size of 2 conversions in the examples
ADC_MODE_SEQUENTIAL:
T(0) T(1) T(2) T(3)[EOSEQ] T(0) T(1) T(2) ...
In this mode, after the trigger event a single channel is converted and the next channel in the list is prepared to convert on next trigger edge.
- Note
- This mode can be emulated by ADC_MODE_GROUPED with group size of 1.
ADC_MODE_SCAN:
T(0123)[EOSEQ] T(0123)[EOSEQ] T(0123)[EOSEQ]
In this mode, after the trigger event, all channels will be converted once, storing results sequentially.
- Note
- The DMA must be configured properly for more than single channel to convert.
ADC_MODE_SCAN_INFINITE:
T(0123[EOSEQ]0123[EOSEQ]0123[EOSEQ]...)
In this mode, after the trigger event, all channels from the list are converted. At the end of list, the conversion continues from the beginning.
- Note
- The DMA must be configured properly to operate in this mode.
ADC_MODE_GROUPED:
T(12) T(34)[EOSEQ] T(12) T(34)[EOSEQ] T(12)
In this mode, after the trigger event, a specified group size of channels are converted. If the end of channel list occurs, the EOSEQ is generated and on the next trigger it wraps to the beginning.
- Note
- The DMA must be configured properly to operate on more than single channel conversion groups.
- Warning
- not all families supports all modes of operation of ADC.
ADC Set conversion operation mode
- Note
- on SEQUENTIAL mode, the trigger event is necessary to start conversion.
- Parameters
-
Definition at line 120 of file adc.c.
References ADC_CFGR1, ADC_CFGR1_CONT, ADC_CFGR1_DISCEN, ADC_MODE_SCAN, ADC_MODE_SCAN_INFINITE, and ADC_MODE_SEQUENTIAL.