RCC_AHB1RSTR reset values
Collaboration diagram for RCC_AHB1RSTR reset values:
Macros | |
| #define | RCC_AHB1RSTR_OTGHSRST (1 << 29) |
| #define | RCC_AHB1RSTR_ETHMACRST (1 << 25) |
| #define | RCC_AHB1RSTR_DMA2DRST (1 << 23) |
| #define | RCC_AHB1RSTR_DMA2RST (1 << 22) |
| #define | RCC_AHB1RSTR_DMA1RST (1 << 21) |
| #define | RCC_AHB1RSTR_CRCRST (1 << 12) |
| #define | RCC_AHB1RSTR_GPIOKRST (1 << 10) |
| #define | RCC_AHB1RSTR_GPIOJRST (1 << 9) |
| #define | RCC_AHB1RSTR_GPIOIRST (1 << 8) |
| #define | RCC_AHB1RSTR_GPIOHRST (1 << 7) |
| #define | RCC_AHB1RSTR_GPIOGRST (1 << 6) |
| #define | RCC_AHB1RSTR_GPIOFRST (1 << 5) |
| #define | RCC_AHB1RSTR_GPIOERST (1 << 4) |
| #define | RCC_AHB1RSTR_GPIODRST (1 << 3) |
| #define | RCC_AHB1RSTR_GPIOCRST (1 << 2) |
| #define | RCC_AHB1RSTR_GPIOBRST (1 << 1) |
| #define | RCC_AHB1RSTR_GPIOARST (1 << 0) |
