libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
f7/flash.h
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1/** @defgroup flash_defines FLASH Defines
2 *
3 * @ingroup STM32F7xx_defines
4 *
5 * @author @htmlonly © @endhtmlonly 2017
6 * Matthew Lai <m@matthewlai.ca>
7 * @author @htmlonly &copy; @endhtmlonly 2010
8 * Thomas Otto <tommi@viadmin.org>
9 * @author @htmlonly &copy; @endhtmlonly 2010
10 * Mark Butler <mbutler@physics.otago.ac.nz>
11 *
12 * Differences between F7 and F4:
13 * 1. icache and dcache are now combined into a unified ART cache. The CPU has
14 * its own d/i-caches, but those are unrelated to this. They are on the
15 * AXIM bus.
16 * 4. FLASH_SR_PGSERR (programming sequence error) is now FLASH_SR_ERSERR (
17 * erase sequence error).
18 * 6. There are now two watchdogs - IWDG (independent watchdog) and WWDG (
19 * window watchdog).
20 *
21 */
22/*
23 * This file is part of the libopencm3 project.
24 *
25 * Copyright (C) 2017 Matthew Lai <m@matthewlai.ca>
26 * Copyright (C) 2010 Thomas Otto <tommi@viadmin.org>
27 * Copyright (C) 2010 Mark Butler <mbutler@physics.otago.ac.nz>
28 *
29 * This library is free software: you can redistribute it and/or modify
30 * it under the terms of the GNU Lesser General Public License as published by
31 * the Free Software Foundation, either version 3 of the License, or
32 * (at your option) any later version.
33 *
34 * This library is distributed in the hope that it will be useful,
35 * but WITHOUT ANY WARRANTY; without even the implied warranty of
36 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
37 * GNU Lesser General Public License for more details.
38 *
39 * You should have received a copy of the GNU Lesser General Public License
40 * along with this library. If not, see <http://www.gnu.org/licenses/>.
41 */
42
43#ifndef LIBOPENCM3_FLASH_H
44#define LIBOPENCM3_FLASH_H
45
49
50/**@{*/
51
52/* --- FLASH_ACR values ---------------------------------------------------- */
53
54/** @addtogroup flash_acr_values FLASH_ACR values
55 * @ingroup flash_registers
56@{*/
57#define FLASH_ACR_ARTRST (1 << 11)
58#define FLASH_ACR_ARTEN (1 << 9)
59#define FLASH_ACR_PRFTEN (1 << 8)
60/**@}*/
61
62#define FLASH_SR_ERSERR (1 << 7)
63
64/* --- FLASH_OPTCR values -------------------------------------------------- */
65
66#define FLASH_OPTCR_IWDG_STOP (1 << 31)
67#define FLASH_OPTCR_IWDG_STDBY (1 << 30)
68
69#define FLASH_OPTCR_NWRP_SHIFT 16
70#define FLASH_OPTCR_NWRP_MASK 0xff
71
72#define FLASH_OPTCR_RDP_SHIFT 8
73#define FLASH_OPTCR_RDP_MASK 0xff
74
75#define FLASH_OPTCR_IWDG_SW (1 << 5)
76#define FLASH_OPTCR_WWDG_SW (1 << 4)
77
78#define FLASH_OPTCR_OPTSTRT (1 << 1)
79#define FLASH_OPTCR_OPTLOCK (1 << 0)
80
81/* --- FLASH_OPTCR1 values ------------------------------------------------- */
82#define FLASH_OPTCR1_BOOT_ADD1_MASK 0xffff
83#define FLASH_OPTCR1_BOOT_ADD1_SHIFT 16
84#define FLASH_OPTCR1_BOOT_ADD0_MASK 0xffff
85#define FLASH_OPTCR1_BOOT_ADD0_SHIFT 0
86
87/* --- Function prototypes ------------------------------------------------- */
88
90
92void flash_art_enable(void);
93void flash_art_reset(void);
94
96/**@}*/
97
98#endif
99
#define END_DECLS
Definition: common.h:34
#define BEGIN_DECLS
Definition: common.h:33
void flash_art_reset(void)
Reset the ART Cache.
Definition: flash.c:101
void flash_art_enable(void)
Enable the ART Cache.
Definition: flash.c:90
void flash_clear_erserr_flag(void)
Clear the Erase Sequence Error Flag.
Definition: flash.c:65