libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
flash.c
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1/** @defgroup flash_file FLASH peripheral API
2 *
3 * @ingroup peripheral_apis
4 */
5
6/*
7 * This file is part of the libopencm3 project.
8 *
9 * Copyright (C) 2017 Matthew Lai @m@matthewlai.ca>
10 * Copyright (C) 2010 Thomas Otto <tommi@viadmin.org>
11 * Copyright (C) 2010 Mark Butler <mbutler@physics.otago.ac.nz>
12 *
13 * This library is free software: you can redistribute it and/or modify
14 * it under the terms of the GNU Lesser General Public License as published by
15 * the Free Software Foundation, either version 3 of the License, or
16 * (at your option) any later version.
17 *
18 * This library is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU Lesser General Public License for more details.
22 *
23 * You should have received a copy of the GNU Lesser General Public License
24 * along with this library. If not, see <http://www.gnu.org/licenses/>.
25 */
26
27/**@{*/
28
30
31/*---------------------------------------------------------------------------*/
32/** @brief Issue Pipeline Stall
33
34Issue a pipeline stall to make sure all write operations completed.
35
36RM0385: After performing a data write operation and before polling the BSY bit
37to be cleared, the software can issue a DSB instruction to guarantee the
38completion of a previous data write operation.
39
40*/
41
42static inline void flash_pipeline_stall(void)
43{
44 __asm__ volatile("dsb":::"memory");
45}
46
47/*---------------------------------------------------------------------------*/
48/** @brief Wait until Last Operation has Ended
49
50This loops indefinitely until an operation (write or erase) has completed by
51testing the busy flag.
52*/
54{
56 while ((FLASH_SR & FLASH_SR_BSY) == FLASH_SR_BSY);
57}
58
59/*---------------------------------------------------------------------------*/
60/** @brief Clear the Erase Sequence Error Flag
61
62This flag is set when an erase operation is performed with control register has
63not been correctly set.
64*/
66{
68}
69
70/*---------------------------------------------------------------------------*/
71/** @brief Clear All Status Flags
72
73Program error, end of operation, write protect error.
74*/
75
77{
83}
84
85/*---------------------------------------------------------------------------*/
86/** @brief Enable the ART Cache
87
88*/
89
91{
93}
94
95/*---------------------------------------------------------------------------*/
96/** @brief Reset the ART Cache
97
98The ART cache must be disabled for this to have effect.
99*/
100
102{
104}
105
106/**@}*/
#define FLASH_ACR_ARTRST
Definition: f7/flash.h:57
#define FLASH_ACR_ARTEN
Definition: f7/flash.h:58
void flash_clear_pgperr_flag(void)
Clear programming parallelism error flag.
#define FLASH_SR_BSY
void flash_clear_pgaerr_flag(void)
Clear the Programming Alignment Error Flag.
#define FLASH_SR_ERSERR
Definition: f7/flash.h:62
void flash_clear_wrperr_flag(void)
Clear the Write Protect Error Flag.
static void flash_pipeline_stall(void)
Issue Pipeline Stall.
Definition: flash.c:42
void flash_art_reset(void)
Reset the ART Cache.
Definition: flash.c:101
void flash_wait_for_last_operation(void)
Wait until Last Operation has Ended.
Definition: flash.c:53
void flash_art_enable(void)
Enable the ART Cache.
Definition: flash.c:90
void flash_clear_eop_flag(void)
Clear the End of OPeration flag.
void flash_clear_status_flags(void)
Clear All Status Flags.
Definition: flash.c:76
void flash_clear_erserr_flag(void)
Clear the Erase Sequence Error Flag.
Definition: flash.c:65
#define FLASH_ACR
Flash Access Control register.
#define FLASH_SR
Flash Status register.